Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDPACT 1997: San Francisco, CA, USA
- Proceedings of the 1997 Conference on Parallel Architectures and Compilation Techniques (PACT '97), San Francisco, CA, USA, October 11-15, 1997. IEEE Computer Society 1997, ISBN 0-8186-8090-3
Analysis and Code Optimizations
- Yingchun Zhu, Laurie J. Hendren:
Locality Analysis for Parallel C Programs. 2-13 - Xinan Tang, Rakesh Ghiya, Laurie J. Hendren, Guang R. Gao:
Heap Analysis and Optimizations for Threaded Programs. 14-25 - Jens Knoop, Eduard Mehofer:
Interprocedural Distribution Assignment Placement: More than Just Enhancing Intraprocedural Placing Techniques. 26-
Networks/Communication Optimization
- Sunil Kim, Alexander V. Veidenbaum:
The Effect of Limited Network Bandwidth and its Utilization by Latency Hiding Techniques in Large-Scale Shared Memory Systems. 40-51 - Fabrizio Petrini, Marco Vanneschi:
Efficient Personalized Communication on Wormhole Networks. 52-63 - Dianne Miller, Walid A. Najjar:
Empirical Evaluation of Deterministic and Adaptive Routing with Constant-Area Routers. 64-
ILP Optimization/Code Scheduling
- Rad Silvera, Jian Wang, Ramaswamy Govindarajan, Guang R. Gao:
A Register Pressure Sensitive Instruction Scheduler for Dynamic Issue Processors. 78-89 - Yu-Kwong Kwok, Ishfaq Ahmad:
A Parallel Algorithm for Compile-Time Scheduling of Parallel Programs on Multiprocessors. 90-101 - Rajiv Gupta, David A. Berson, Jesse Zhixi Fang:
Path Profile Guided Partial Dead Code Elimation Using Predication. 102-
Short Papers Presentations
- Carrie J. Brownhill, Alexandru Nicolau, Steven Novack, Constantine D. Polychronopoulos:
The PROMIS Compiler Prototype. 116-125 - David H. Albonesi, Israel Koren:
Improving the Memory Bandwidth of Highly-Integrated, Wide-Issue, Microprocessor-Based Systems. 126-135 - Yuetsu Kodama, Hirofumi Sakane, Hanpei Koike, Mitsuhisa Sato, Shuichi Sakai, Yoshinori Yamaguchi:
Parallel Execution of Radix Sort Program Using Fine-Grain Communication. 136-145 - Michal Cierniak, Wei Li:
Interprocedural Array Remapping. 146-155 - Ireneusz Karkowski, Henk Corporaal:
Design of Heterogenous Multi-Processor Embedded Systems: Applying Functional Pipelining. 156-165 - Soohong P. Kim, Raymond Hoare, Henry G. Dietz:
VLIW Across Multiple Superscalar Processors on a Single Chip. 166-
Profiling and Prediction based Optimizations
- Kishore N. Menezes, Sumedh W. Sathaye, Thomas M. Conte:
Path Prediction for High Issue-Rate Processors. 178-188 - Thomas Fahringer, Eduard Mehofer:
Buffer-Safe Communication Optimization Based on Data Flow Analysis and Performance Prediction. 189-200 - Jeffrey K. Hollingsworth, Barton P. Miller, M. J. R. Goncalves, Oscar Naim, Zhichen Xu, Ling Zheng:
MDL: A Language and Compiler for Dynamic Program Instrumentation. 201-
Compilation Issues for Multiprocessors
- Ramakrishnan Rajamony, Alan L. Cox:
Optimally Synchronizing DOACROSS Loops on Shared Memory Multiprocessors. 214-224 - Eric Hung-Yu Tseng, Jean-Luc Gaudiot:
Two Techniques for Static Array Partitioning on Message-Passing Parallel Machines. 225-235 - Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary:
Compiler Algorithms for Optimizing Locality and Parallelism on Shared and Distributed Memory Machines. 236-
Compiler/Architecture Interaction in Parallelism Exploitation
- Luis Villa, Roger Espasa, Mateo Valero:
Effective Usage of Vector Registers in Advanced Vector Architectures. 250-260 - F. Jesús Sánchez, Antonio González, Mateo Valero:
Static Locality Analysis for Cache Management. 261-271 - Jonas Skeppstedt:
Overcoming Limitations of Prefetching in Multiprocessors by Compiler-Initiated Coherence Actions. 272-
High-Level Parallelization
- Jeffrey Hammes, A. P. Wim Böhm:
Towards a Time and Space Efficient Functional Implementation of a Monte Carlo Photon Transport Code. 286-294 - Kei Karasawa, Makoto Iwata, Hiroaki Terada:
Direct Generation of Data-Driven Program for Stream-Oriented Processing. 295-306 - Frederic Desprez, Jack J. Dongarra, Fabrice Rastello, Yves Robert:
Determining the Idle Time of Tiling: New Results. 307-317
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-04-25 05:26 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
