ISQED 2007: San Jose, California, USA

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Tutorials

Evening Panel Discussion EP1

Plenary Session 1P

Session 1A: Design for Manufacturing

Session 1B: Device and Circuit Reliability

Session 1C: Power and Thermal Management

Session 1D: Analog and Mixed Signal Design

Luncheon Speech

Session 2A: Quality and Reliability

Session 2B: Advances in Timing and Power in Physical Design

Session 2C: Power-Aware System Design Methodologies

Session 2D: Poster Papers

Session 3A: Electrical Quality

Session 3B: Analog and RF Testing

Session 3C: Low Power Circuits

Plenary Session 2P

Session 4A: Package Circuit Co-Design

Session 4B: High Level Optimization

Session 4C: Interconnects and Power Grids

Session 4D: Parametric Variations in Design

Luncheon Panel Discussion LP2

Session 5A: DFM Statistics

Session 5B: Timing Test and Reliability

Session 5C: Variation Analysis and Design

Session 5D: Lithography and OPC

Session 6A: DFM Process

Session 6B: PDM Physical Planning

Session 6C: Reliability and Interconnect at the System Level

Session 6D: Design and Modeling for Soft Error Reliability

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