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ORCIDBibTeX records: M. Balakrishnan
@article{DBLP:journals/cacm/Balakrishnan22,
author = {M. Balakrishnan},
title = {Computing and assistive technology solutions for the visually impaired},
journal = {Commun. {ACM}},
volume = {65},
number = {11},
pages = {44--47},
year = {2022},
url = {https://doi.org/10.1145/3551634},
doi = {10.1145/3551634},
timestamp = {Mon, 07 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cacm/Balakrishnan22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/GoelKSB22,
author = {Shikha Goel and
Rajesh Kedia and
Rijurekha Sen and
M. Balakrishnan},
title = {{EXPRESS:} {CNN} EXecution Time PREdiction for {DPU} DeSign Space
Exploration},
booktitle = {International Conference on Field-Programmable Technology, {(IC)FPT}
2022, Hong Kong, December 5-9, 2022},
pages = {1--2},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ICFPT56656.2022.9974299},
doi = {10.1109/ICFPT56656.2022.9974299},
timestamp = {Wed, 21 Dec 2022 13:47:20 +0100},
biburl = {https://dblp.org/rec/conf/fpt/GoelKSB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipin/UpadhyayRB22,
author = {Vikas Upadhyay and
Kashi Roy and
M. Balakrishnan},
title = {Beacon Placement and Signal Strength Estimation to Improve Localization
Coverage and Accuracy},
booktitle = {12th {IEEE} International Conference on Indoor Positioning and Indoor
Navigation, {IPIN} 2022, Beijing, China, September 5-8, 2022},
pages = {1--8},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/IPIN54987.2022.9918130},
doi = {10.1109/IPIN54987.2022.9918130},
timestamp = {Tue, 08 Nov 2022 21:42:43 +0100},
biburl = {https://dblp.org/rec/conf/ipin/UpadhyayRB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esl/KediaGBPS21,
author = {Rajesh Kedia and
Shikha Goel and
M. Balakrishnan and
Kolin Paul and
Rijurekha Sen},
title = {Design Space Exploration of FPGA-Based System With Multiple {DNN}
Accelerators},
journal = {{IEEE} Embed. Syst. Lett.},
volume = {13},
number = {3},
pages = {114--117},
year = {2021},
url = {https://doi.org/10.1109/LES.2020.3017455},
doi = {10.1109/LES.2020.3017455},
timestamp = {Thu, 16 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esl/KediaGBPS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/AberaBK21,
author = {Solomon Abera and
M. Balakrishnan and
Anshul Kumar},
title = {Performance-Energy Trade-off in Modern CMPs},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {18},
number = {1},
pages = {3:1--3:26},
year = {2021},
url = {https://doi.org/10.1145/3427092},
doi = {10.1145/3427092},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/AberaBK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/birthday/Balakrishnan21,
author = {M. Balakrishnan},
editor = {Jian{-}Jia Chen},
title = {{ASSISTECH:} An Accidental Journey into Assistive Technology},
booktitle = {A Journey of Embedded and Cyber-Physical Systems - Essays Dedicated
to Peter Marwedel on the Occasion of His 70th Birthday},
pages = {57--77},
publisher = {Springer},
year = {2021},
url = {https://doi.org/10.1007/978-3-030-47487-4\_5},
doi = {10.1007/978-3-030-47487-4\_5},
timestamp = {Fri, 14 May 2021 08:34:22 +0200},
biburl = {https://dblp.org/rec/conf/birthday/Balakrishnan21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GoelBS21,
author = {Shikha Goel and
M. Balakrishnan and
Rijurekha Sen},
title = {EnergyNN: Energy Estimation for Neural Network Inference Tasks on
{DPU}},
booktitle = {31st International Conference on Field-Programmable Logic and Applications,
{FPL} 2021, Dresden, Germany, August 30 - Sept. 3, 2021},
pages = {64--68},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/FPL53798.2021.00019},
doi = {10.1109/FPL53798.2021.00019},
timestamp = {Mon, 18 Oct 2021 17:08:51 +0200},
biburl = {https://dblp.org/rec/conf/fpl/GoelBS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mm/SobtiMB021,
author = {Anupam Sobti and
Vaibhav Mavi and
M. Balakrishnan and
Chetan Arora},
editor = {Heng Tao Shen and
Yueting Zhuang and
John R. Smith and
Yang Yang and
Pablo C{\'{e}}sar and
Florian Metze and
Balakrishnan Prabhakaran},
title = {VmAP: {A} Fair Metric for Video Object Detection},
booktitle = {{MM} '21: {ACM} Multimedia Conference, Virtual Event, China, October
20 - 24, 2021},
pages = {2224--2232},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3474085.3475383},
doi = {10.1145/3474085.3475383},
timestamp = {Mon, 22 Apr 2024 21:24:20 +0200},
biburl = {https://dblp.org/rec/conf/mm/SobtiMB021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ficta/KrishnasamyBC20,
author = {Balasamy Krishnasamy and
M. Balakrishnan and
Arockia Christopher},
editor = {Suresh Chandra Satapathy and
Yu{-}Dong Zhang and
Vikrant Bhateja and
Ritanjali Majhi},
title = {A Genetic Algorithm Based Medical Image Watermarking for Improving
Robustness and Fidelity in Wavelet Domain},
booktitle = {Intelligent Data Engineering and Analytics - Frontiers in Intelligent
Computing: Theory and Applications {(FICTA} 2020), Volume 2, Karnataka,
Surathkal, India, January 4-5, 2020},
series = {Advances in Intelligent Systems and Computing},
volume = {1177},
pages = {289--299},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-981-15-5679-1\_27},
doi = {10.1007/978-981-15-5679-1\_27},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ficta/KrishnasamyBC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icfpt/GoelKBS20,
author = {Shikha Goel and
Rajesh Kedia and
M. Balakrishnan and
Rijurekha Sen},
title = {{INFER:} INterFerence-aware Estimation of Runtime for Concurrent {CNN}
Execution on DPUs},
booktitle = {International Conference on Field-Programmable Technology, {(IC)FPT}
2020, Maui, HI, USA, December 9-11, 2020},
pages = {66--71},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ICFPT51103.2020.00018},
doi = {10.1109/ICFPT51103.2020.00018},
timestamp = {Tue, 11 May 2021 10:41:35 +0200},
biburl = {https://dblp.org/rec/conf/icfpt/GoelKBS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/DevadossPB19,
author = {Rajeswari Devadoss and
Kolin Paul and
M. Balakrishnan},
title = {Equivalence Checking and Compaction of n-input Majority Terms Using
Implicants of Majority},
journal = {J. Electron. Test.},
volume = {35},
number = {5},
pages = {679--694},
year = {2019},
url = {https://doi.org/10.1007/s10836-019-05831-x},
doi = {10.1007/S10836-019-05831-X},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/DevadossPB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/KediaBP19,
author = {Rajesh Kedia and
M. Balakrishnan and
Kolin Paul},
title = {A case for design space exploration of context-aware adaptive embedded
systems: work-in-progress},
booktitle = {Proceedings of the International Conference on Hardware/Software Codesign
and System Synthesis Companion, {CODES+ISSS} 2019, part of {ESWEEK}
2019, New York, NY, USA, October 13-18, 2019},
pages = {12:1--12:2},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3349567.3351714},
doi = {10.1145/3349567.3351714},
timestamp = {Wed, 27 Nov 2019 17:07:16 +0100},
biburl = {https://dblp.org/rec/conf/codes/KediaBP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/KediaBP19,
author = {Rajesh Kedia and
M. Balakrishnan and
Kolin Paul},
title = {GRanDE: Graphical Representation and Design Space Exploration of Embedded
Systems},
booktitle = {22nd Euromicro Conference on Digital System Design, {DSD} 2019, Kallithea,
Greece, August 28-30, 2019},
pages = {4--12},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DSD.2019.00012},
doi = {10.1109/DSD.2019.00012},
timestamp = {Wed, 23 Oct 2019 17:11:33 +0200},
biburl = {https://dblp.org/rec/conf/dsd/KediaBP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/SobtiB019,
author = {Anupam Sobti and
M. Balakrishnan and
Chetan Arora},
title = {Multi-sensor Energy Efficient Obstacle Detection},
booktitle = {22nd Euromicro Conference on Digital System Design, {DSD} 2019, Kallithea,
Greece, August 28-30, 2019},
pages = {19--26},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DSD.2019.00014},
doi = {10.1109/DSD.2019.00014},
timestamp = {Wed, 23 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/SobtiB019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/haptics/GuptaRBM19,
author = {Richa Gupta and
P. V. M. Rao and
M. Balakrishnan and
S. Mannheimer},
title = {Evaluating the Use of Variable Height in Tactile Graphics},
booktitle = {2019 {IEEE} World Haptics Conference, {WHC} 2019, Tokyo, Japan, July
9-12, 2019},
pages = {121--126},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/WHC.2019.8816083},
doi = {10.1109/WHC.2019.8816083},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/haptics/GuptaRBM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/springsim/BekeleBK19,
author = {Solomon Abera Bekele and
M. Balakrishnan and
Anshul Kumar},
editor = {Alberto A. Del Barrio and
Christopher J. Lynch and
Fernando J. Barros and
Xiaolin Hu and
Andrea D'Ambrogio},
title = {{ML} Guided Energy-Performance Trade-Off Estimation For Uncore Frequency
Scaling},
booktitle = {2019 Spring Simulation Conference, SpringSim 2019, Tucson, AZ, USA,
April 29 - May 2, 2019},
pages = {1--12},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/SpringSim.2019.8732878},
doi = {10.23919/SPRINGSIM.2019.8732878},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/springsim/BekeleBK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KediaSRCSMLVB019,
author = {Rajesh Kedia and
Anupam Sobti and
Mukund Rungta and
Sarvesh Chandoliya and
Akhil Soni and
Anil Kumar Meena and
Chrystle Myrna Lobo and
Richa Verma and
M. Balakrishnan and
Chetan Arora},
title = {{MAVI:} Mobility Assistant for Visually Impaired with Optional Use
of Local and Cloud Resources},
booktitle = {32nd International Conference on {VLSI} Design and 18th International
Conference on Embedded Systems, {VLSID} 2019, Delhi, India, January
5-9, 2019},
pages = {227--232},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSID.2019.00058},
doi = {10.1109/VLSID.2019.00058},
timestamp = {Mon, 14 Nov 2022 15:28:06 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KediaSRCSMLVB019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DevadossPB19,
author = {Rajeswari Devadoss and
Kolin Paul and
M. Balakrishnan},
title = {Majority Logic: Prime Implicants and n-Input Majority Term Equivalence},
booktitle = {32nd International Conference on {VLSI} Design and 18th International
Conference on Embedded Systems, {VLSID} 2019, Delhi, India, January
5-9, 2019},
pages = {464--469},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSID.2019.00098},
doi = {10.1109/VLSID.2019.00098},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DevadossPB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/Ananthanarayanan18,
author = {Gayathri Ananthanarayanan and
Smruti R. Sarangi and
M. Balakrishnan},
title = {Task Assignment Algorithms for Multicore Platforms with Process Variations},
journal = {J. Low Power Electron.},
volume = {14},
number = {2},
pages = {302--317},
year = {2018},
url = {https://doi.org/10.1166/jolpe.2018.1550},
doi = {10.1166/JOLPE.2018.1550},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/Ananthanarayanan18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/AberaBK18,
author = {Solomon Abera and
M. Balakrishnan and
Anshul Kumar},
editor = {Mladen Berekovic and
Rainer Buchty and
Heiko Hamann and
Dirk Koch and
Thilo Pionteck},
title = {Performance-Energy Trade-off in CMPs with Per-Core {DVFS}},
booktitle = {Architecture of Computing Systems - {ARCS} 2018 - 31st International
Conference, Braunschweig, Germany, April 9-12, 2018, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10793},
pages = {225--238},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-319-77610-1\_17},
doi = {10.1007/978-3-319-77610-1\_17},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/AberaBK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/MuralikrishnanS18,
author = {Suman Adhepalli Muralikrishnan and
Pulkit Sapra and
Saurabh Agrawal and
Piyush Chanana and
M. Balakrishnan and
P. V. M. Rao},
title = {FPGA-Based Controllers for Compact Low Power Refreshable Braille Display},
booktitle = {2018 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2018,
Hong Kong, China, July 8-11, 2018},
pages = {632--637},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ISVLSI.2018.00120},
doi = {10.1109/ISVLSI.2018.00120},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/MuralikrishnanS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wacv/Sobti0B18,
author = {Anupam Sobti and
Chetan Arora and
M. Balakrishnan},
title = {Object Detection in Real-Time Systems: Going Beyond Precision},
booktitle = {2018 {IEEE} Winter Conference on Applications of Computer Vision,
{WACV} 2018, Lake Tahoe, NV, USA, March 12-15, 2018},
pages = {1020--1028},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/WACV.2018.00117},
doi = {10.1109/WACV.2018.00117},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/wacv/Sobti0B18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dafes/MoghaddamBC17,
author = {Mansureh Shahraki Moghaddam and
M. Balakrishnan and
Kiyoung Choi},
title = {Optimal mapping of program overlays onto many-core platforms with
limited memory capacity},
journal = {Des. Autom. Embed. Syst.},
volume = {21},
number = {3-4},
pages = {173--194},
year = {2017},
url = {https://doi.org/10.1007/s10617-017-9193-9},
doi = {10.1007/S10617-017-9193-9},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dafes/MoghaddamBC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijes/VarmaPBL17,
author = {B. Sharat Chandra Varma and
Kolin Paul and
M. Balakrishnan and
Dominique Lavenier},
title = {Hardware acceleration of de novo genome assembly},
journal = {Int. J. Embed. Syst.},
volume = {9},
number = {1},
pages = {74--89},
year = {2017},
url = {https://doi.org/10.1504/IJES.2017.10002593},
doi = {10.1504/IJES.2017.10002593},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijes/VarmaPBL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/AberaBK17,
author = {Solomon Abera and
M. Balakrishnan and
Anshul Kumar},
editor = {Jens Knoop and
Wolfgang Karl and
Martin Schulz and
Koji Inoue and
Thilo Pionteck},
title = {{PLSS:} {A} Scheduler for Multi-core Embedded Systems},
booktitle = {Architecture of Computing Systems - {ARCS} 2017 - 30th International
Conference, Vienna, Austria, April 3-6, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10172},
pages = {164--176},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-54999-6\_13},
doi = {10.1007/978-3-319-54999-6\_13},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/AberaBK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KediaYDFAB17,
author = {Rajesh Kedia and
K. K. Yoosuf and
Pappireddy Dedeepya and
Munib Fazal and
Chetan Arora and
M. Balakrishnan},
title = {{MAVI:} An Embedded Device to Assist Mobility of Visually Impaired},
booktitle = {30th International Conference on {VLSI} Design and 16th International
Conference on Embedded Systems, {VLSID} 2017, Hyderabad, India, January
7-11, 2017},
pages = {213--218},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VLSID.2017.38},
doi = {10.1109/VLSID.2017.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KediaYDFAB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/Ananthanarayanan16,
author = {Gayathri Ananthanarayanan and
Smruti R. Sarangi and
M. Balakrishnan},
title = {Leakage Power Aware Task Assignment Algorithms for Multicore Platforms},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2016, Pittsburgh,
PA, USA, July 11-13, 2016},
pages = {607--612},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISVLSI.2016.43},
doi = {10.1109/ISVLSI.2016.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/Ananthanarayanan16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/endm/BalakrishnanMA15,
author = {M. Balakrishnan and
G. Marimuthu and
S. Arumugam},
title = {Vertex in-magic arc labelings of digraphs},
journal = {Electron. Notes Discret. Math.},
volume = {48},
pages = {33--39},
year = {2015},
url = {https://doi.org/10.1016/j.endm.2015.05.006},
doi = {10.1016/J.ENDM.2015.05.006},
timestamp = {Tue, 12 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/endm/BalakrishnanMA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/endm/ArumugamBM15,
author = {S. Arumugam and
M. Balakrishnan and
G. Marimuthu},
title = {E-Super Vertex In-Magic Total Labelings of Digraphs},
journal = {Electron. Notes Discret. Math.},
volume = {48},
pages = {111--118},
year = {2015},
url = {https://doi.org/10.1016/j.endm.2015.05.016},
doi = {10.1016/J.ENDM.2015.05.016},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/endm/ArumugamBM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/endm/MarimuthuKB15,
author = {G. Marimuthu and
S. Kavitha and
M. Balakrishnan},
title = {Super Edge Magic Graceful Labeling of Generalized Petersen Graphs},
journal = {Electron. Notes Discret. Math.},
volume = {48},
pages = {235--241},
year = {2015},
url = {https://doi.org/10.1016/j.endm.2015.05.035},
doi = {10.1016/J.ENDM.2015.05.035},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/endm/MarimuthuKB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpsa/ParakhBP15,
author = {Arun Parakh and
M. Balakrishnan and
Kolin Paul},
title = {Improving Map-Reduce for GPUs with cache},
journal = {Int. J. High Perform. Syst. Archit.},
volume = {5},
number = {3},
pages = {166--177},
year = {2015},
url = {https://doi.org/10.1504/IJHPSA.2015.070392},
doi = {10.1504/IJHPSA.2015.070392},
timestamp = {Tue, 24 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijhpsa/ParakhBP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/JaiswalVSBPC15,
author = {Manish Kumar Jaiswal and
B. Sharat Chandra Varma and
Hayden Kwok{-}Hay So and
M. Balakrishnan and
Kolin Paul and
Ray C. C. Cheung},
title = {Configurable Architectures for Multi-Mode Floating Point Adders},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {8},
pages = {2079--2090},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2015.2452351},
doi = {10.1109/TCSI.2015.2452351},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/JaiswalVSBPC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/MoghaddamBP15,
author = {Mansureh Shahraki Moghaddam and
M. Balakrishnan and
Kolin Paul},
editor = {Kentaro Sano and
Dimitrios Soudris and
Michael H{\"{u}}bner and
Pedro C. Diniz},
title = {Partial Reconfiguration for Dynamic Mapping of Task Graphs onto 2D
Mesh Platform},
booktitle = {Applied Reconfigurable Computing - 11th International Symposium, {ARC}
2015, Bochum, Germany, April 13-17, 2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9040},
pages = {373--382},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-16214-0\_33},
doi = {10.1007/978-3-319-16214-0\_33},
timestamp = {Wed, 28 Apr 2021 16:06:56 +0200},
biburl = {https://dblp.org/rec/conf/arc/MoghaddamBP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/JaiswalCBP14,
author = {Manish Kumar Jaiswal and
Ray C. C. Cheung and
M. Balakrishnan and
Kolin Paul},
title = {Series Expansion based Efficient Architectures for Double Precision
Floating Point Division},
journal = {Circuits Syst. Signal Process.},
volume = {33},
number = {11},
pages = {3499--3526},
year = {2014},
url = {https://doi.org/10.1007/s00034-014-9811-8},
doi = {10.1007/S00034-014-9811-8},
timestamp = {Sun, 21 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cssp/JaiswalCBP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/isci/MarimuthuB14,
author = {G. Marimuthu and
M. Balakrishnan},
title = {Super edge magic graceful graphs},
journal = {Inf. Sci.},
volume = {287},
pages = {140--151},
year = {2014},
url = {https://doi.org/10.1016/j.ins.2014.07.027},
doi = {10.1016/J.INS.2014.07.027},
timestamp = {Sat, 27 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/isci/MarimuthuB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/JaiswalCBP14,
author = {Manish Kumar Jaiswal and
Ray C. C. Cheung and
M. Balakrishnan and
Kolin Paul},
title = {Unified Architecture for Double/Two-Parallel Single Precision Floating
Point Adder},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {61-II},
number = {7},
pages = {521--525},
year = {2014},
url = {https://doi.org/10.1109/TCSII.2014.2327314},
doi = {10.1109/TCSII.2014.2327314},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/JaiswalCBP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SarangiAB14,
author = {Smruti R. Sarangi and
Gayathri Ananthanarayanan and
M. Balakrishnan},
title = {LightSim: {A} leakage aware ultrafast temperature simulator},
booktitle = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2014, Singapore, January 20-23, 2014},
pages = {855--860},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ASPDAC.2014.6742997},
doi = {10.1109/ASPDAC.2014.6742997},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SarangiAB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/VarmaPB14,
author = {B. Sharat Chandra Varma and
Kolin Paul and
M. Balakrishnan},
title = {High Level Design Approach to Accelerate De Novo Genome Assembly Using
FPGAs},
booktitle = {17th Euromicro Conference on Digital System Design, {DSD} 2014, Verona,
Italy, August 27-29, 2014},
pages = {66--73},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/DSD.2014.95},
doi = {10.1109/DSD.2014.95},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/VarmaPB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/MoghaddamPB14,
author = {Mansureh Shahraki Moghaddam and
Kolin Paul and
M. Balakrishnan},
title = {Mapping Tasks to a Dynamically Reconfigurable Coarse Grained Array},
booktitle = {22nd {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2014, Boston, MA, USA, May 11-13, 2014},
pages = {33},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/FCCM.2014.20},
doi = {10.1109/FCCM.2014.20},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/MoghaddamPB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icchp/MechKDCPB14,
author = {Mrinal Mech and
Kunal Kwatra and
Supriya Das and
Piyush Chanana and
Rohan Paul and
M. Balakrishnan},
editor = {Klaus Miesenberger and
Deborah I. Fels and
Dominique Archambault and
Petr Pen{\'{a}}z and
Wolfgang L. Zagler},
title = {Edutactile - {A} Tool for Rapid Generation of Accurate Guideline-Compliant
Tactile Graphics for Science and Mathematics},
booktitle = {Computers Helping People with Special Needs - 14th International Conference,
{ICCHP} 2014, Paris, France, July 9-11, 2014, Proceedings, Part {II}},
series = {Lecture Notes in Computer Science},
volume = {8548},
pages = {34--41},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-08599-9\_6},
doi = {10.1007/978-3-319-08599-9\_6},
timestamp = {Tue, 29 Dec 2020 18:41:23 +0100},
biburl = {https://dblp.org/rec/conf/icchp/MechKDCPB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/JaiswalCBP14,
author = {Manish Kumar Jaiswal and
Ray C. C. Cheung and
M. Balakrishnan and
Kolin Paul},
title = {Configurable Architecture for Double/Two-Parallel Single Precision
Floating Point Division},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2014, Tampa,
FL, USA, July 9-11, 2014},
pages = {332--337},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISVLSI.2014.45},
doi = {10.1109/ISVLSI.2014.45},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/JaiswalCBP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VarmaPB14,
author = {B. Sharat Chandra Varma and
Kolin Paul and
M. Balakrishnan},
title = {Accelerating Genome Assembly Using Hard Embedded Blocks in FPGAs},
booktitle = {2014 27th International Conference on {VLSI} Design, {VLSID} 2014,
and 2014 13th International Conference on Embedded Systems, Mumbai,
India, January 5-9, 2014},
pages = {306--311},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/VLSID.2014.59},
doi = {10.1109/VLSID.2014.59},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VarmaPB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpsa/AnanthanarayananMBS13,
author = {Gayathri Ananthanarayanan and
Geetika Malhotra and
M. Balakrishnan and
Smruti R. Sarangi},
title = {Amdahl's law in the era of process variation},
journal = {Int. J. High Perform. Syst. Archit.},
volume = {4},
number = {4},
pages = {218--230},
year = {2013},
url = {https://doi.org/10.1504/IJHPSA.2013.058984},
doi = {10.1504/IJHPSA.2013.058984},
timestamp = {Tue, 24 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijhpsa/AnanthanarayananMBS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/assets/JainJPKB13,
author = {Dhruv Jain and
Akhil Jain and
Rohan Paul and
Akhila Komarika and
M. Balakrishnan},
title = {A path-guided audio based indoor navigation system for persons with
visual impairment},
booktitle = {The 15th International {ACM} {SIGACCESS} Conference on Computers and
Accessibility, {ASSETS} '13, Bellevue, WA, USA, October 21-23, 2013},
pages = {33:1--33:2},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2513383.2513410},
doi = {10.1145/2513383.2513410},
timestamp = {Thu, 11 Mar 2021 17:04:51 +0100},
biburl = {https://dblp.org/rec/conf/assets/JainJPKB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/VarmaPBL13,
author = {B. Sharat Chandra Varma and
Kolin Paul and
M. Balakrishnan and
Dominique Lavenier},
title = {FAssem: {FPGA} Based Acceleration of De Novo Genome Assembly},
booktitle = {21st {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2013, Seattle, WA, USA, April 28-30, 2013},
pages = {173--176},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/FCCM.2013.25},
doi = {10.1109/FCCM.2013.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/VarmaPBL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/MoghaddamPB13,
author = {Mansureh Shahraki Moghaddam and
Kolin Paul and
M. Balakrishnan},
title = {Design and Implementation of High Performance Architectures with Partially
Reconfigurable CGRAs},
booktitle = {2013 {IEEE} International Symposium on Parallel {\&} Distributed
Processing, Workshops and Phd Forum, Cambridge, MA, USA, May 20-24,
2013},
pages = {202--211},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/IPDPSW.2013.121},
doi = {10.1109/IPDPSW.2013.121},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/MoghaddamPB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VarmaPB13,
author = {B. Sharat Chandra Varma and
Kolin Paul and
M. Balakrishnan},
title = {Accelerating 3D-FFT Using Hard Embedded Blocks in FPGAs},
booktitle = {26th International Conference on {VLSI} Design and 12th International
Conference on Embedded Systems, Pune, India, January 5-10, 2013},
pages = {92--97},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/VLSID.2013.169},
doi = {10.1109/VLSID.2013.169},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VarmaPB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dam/MarimuthuB12,
author = {G. Marimuthu and
M. Balakrishnan},
title = {E-super vertex magic labelings of graphs},
journal = {Discret. Appl. Math.},
volume = {160},
number = {12},
pages = {1766--1774},
year = {2012},
url = {https://doi.org/10.1016/j.dam.2012.03.016},
doi = {10.1016/J.DAM.2012.03.016},
timestamp = {Thu, 11 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dam/MarimuthuB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChouhanBB12,
author = {Sonali Chouhan and
M. Balakrishnan and
Ranjan Bose},
title = {System-Level Design Space Exploration Methodology for Energy-Efficient
Sensor Node Configurations: An Experimental Validation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {31},
number = {4},
pages = {586--596},
year = {2012},
url = {https://doi.org/10.1109/TCAD.2011.2176729},
doi = {10.1109/TCAD.2011.2176729},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChouhanBB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/twc/BalakrishnanHAMPJ12,
author = {M. Balakrishnan and
Hong Huang and
Rafael Asorey{-}Cacheda and
Satyajayant Misra and
Sandeep Pawar and
Yousef Jaradat},
title = {Measures and Countermeasures for Null Frequency Jamming of On-Demand
Routing Protocols in Wireless Ad Hoc Networks},
journal = {{IEEE} Trans. Wirel. Commun.},
volume = {11},
number = {11},
pages = {3860--3868},
year = {2012},
url = {https://doi.org/10.1109/TWC.2012.092112.110678},
doi = {10.1109/TWC.2012.092112.110678},
timestamp = {Wed, 21 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/twc/BalakrishnanHAMPJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ic3/Balakrishnan12,
author = {M. Balakrishnan},
editor = {Manish Parashar and
Dinesh K. Kaushik and
Omer F. Rana and
Ravi Samtaney and
Yuanyuan Yang and
Albert Y. Zomaya},
title = {Power Consumption in Multi-core Processors},
booktitle = {Contemporary Computing - 5th International Conference, {IC3} 2012,
Noida, India, August 6-8, 2012. Proceedings},
series = {Communications in Computer and Information Science},
volume = {306},
pages = {3},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-32129-0\_3},
doi = {10.1007/978-3-642-32129-0\_3},
timestamp = {Wed, 24 May 2017 08:31:09 +0200},
biburl = {https://dblp.org/rec/conf/ic3/Balakrishnan12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/ParakhBP12,
author = {Arun Parakh and
M. Balakrishnan and
Kolin Paul},
title = {Performance Estimation of GPUs with Cache},
booktitle = {26th {IEEE} International Parallel and Distributed Processing Symposium
Workshops {\&} PhD Forum, {IPDPS} 2012, Shanghai, China, May 21-25,
2012},
pages = {2384--2393},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/IPDPSW.2012.328},
doi = {10.1109/IPDPSW.2012.328},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/ParakhBP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/DevadossPB11,
author = {Rajeswari Devadoss and
Kolin Paul and
M. Balakrishnan},
title = {p-QCA: {A} Tiled Programmable Fabric Architecture Using Molecular
Quantum-Dot Cellular Automata},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {7},
number = {3},
pages = {13:1--13:20},
year = {2011},
url = {https://doi.org/10.1145/2000502.2000506},
doi = {10.1145/2000502.2000506},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/DevadossPB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PandaBV11,
author = {Preeti Ranjan Panda and
M. Balakrishnan and
Anant Vishnoi},
title = {Compressing Cache State for Postsilicon Processor Debug},
journal = {{IEEE} Trans. Computers},
volume = {60},
number = {4},
pages = {484--497},
year = {2011},
url = {https://doi.org/10.1109/TC.2010.123},
doi = {10.1109/TC.2010.123},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PandaBV11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/DevadossPB11,
author = {Rajeswari Devadoss and
Kolin Paul and
M. Balakrishnan},
editor = {Russell Tessier},
title = {Architecture and tools for programmable {QCA}},
booktitle = {2011 International Conference on Field-Programmable Technology, {FPT}
2011, New Delhi, India, December 12-14, 2011},
pages = {1--4},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/FPT.2011.6132689},
doi = {10.1109/FPT.2011.6132689},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/DevadossPB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/DevadossPB10,
author = {Rajeswari Devadoss and
Kolin Paul and
M. Balakrishnan},
editor = {Jinian Bian and
Qiang Zhou and
Peter Athanas and
Yajun Ha and
Kang Zhao},
title = {A tiled programmable fabric using {QCA}},
booktitle = {Proceedings of the International Conference on Field-Programmable
Technology, {FPT} 2010, 8-10 December 2010, Tsinghua University, Beijing,
China},
pages = {9--16},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/FPT.2010.5681534},
doi = {10.1109/FPT.2010.5681534},
timestamp = {Thu, 01 Feb 2018 14:20:39 +0100},
biburl = {https://dblp.org/rec/conf/fpt/DevadossPB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/PandaVB10,
author = {Preeti Ranjan Panda and
Anant Vishnoi and
M. Balakrishnan},
title = {Enhancing post-silicon processor debug with Incremental Cache state
Dumping},
booktitle = {18th {IEEE/IFIP} VLSI-SoC 2010, {IEEE/IFIP} {WG} 10.5 International
Conference on Very Large Scale Integration of System-on-Chip, Madrid,
Spain, 27-29 September 2010},
pages = {55--60},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/VLSISOC.2010.5642623},
doi = {10.1109/VLSISOC.2010.5642623},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/PandaVB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DevadossPB10,
author = {Rajeswari Devadoss and
Kolin Paul and
M. Balakrishnan},
title = {Clocking-Based Coplanar Wire Crossing Scheme for {QCA}},
booktitle = {{VLSI} Design 2010: 23rd International Conference on {VLSI} Design,
9th International Conference on Embedded Systems, Bangalore, India,
3-7 January 2010},
pages = {339--344},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/VLSI.Design.2010.39},
doi = {10.1109/VLSI.DESIGN.2010.39},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DevadossPB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChouhanBB09,
author = {Sonali Chouhan and
Ranjan Bose and
M. Balakrishnan},
title = {A Framework for Energy-Consumption-Based Design Space Exploration
for Wireless Sensor Nodes},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {28},
number = {7},
pages = {1017--1024},
year = {2009},
url = {https://doi.org/10.1109/TCAD.2009.2018865},
doi = {10.1109/TCAD.2009.2018865},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChouhanBB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/twc/ChouhanBB09,
author = {Sonali Chouhan and
Ranjan Bose and
M. Balakrishnan},
title = {Integrated energy analysis of error correcting codes and modulation
for energy efficient wireless sensor nodes},
journal = {{IEEE} Trans. Wirel. Commun.},
volume = {8},
number = {10},
pages = {5348--5355},
year = {2009},
url = {https://doi.org/10.1109/TWC.2009.090279},
doi = {10.1109/TWC.2009.090279},
timestamp = {Sun, 06 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/twc/ChouhanBB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/VishnoiPB09,
author = {Anant Vishnoi and
Preeti Ranjan Panda and
M. Balakrishnan},
title = {Online cache state dumping for processor debug},
booktitle = {Proceedings of the 46th Design Automation Conference, {DAC} 2009,
San Francisco, CA, USA, July 26-31, 2009},
pages = {358--363},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629911.1630007},
doi = {10.1145/1629911.1630007},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/VishnoiPB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/VishnoiPB09,
author = {Anant Vishnoi and
Preeti Ranjan Panda and
M. Balakrishnan},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Cache aware compression for processor debug support},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {208--213},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090659},
doi = {10.1109/DATE.2009.5090659},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/VishnoiPB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SahuBP09,
author = {Aryabartta Sahu and
M. Balakrishnan and
Preeti Ranjan Panda},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {A generic platform for estimation of multi-threaded program performance
on heterogeneous multiprocessors},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {1018--1023},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090813},
doi = {10.1109/DATE.2009.5090813},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SahuBP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/ChouhanBB09,
author = {Sonali Chouhan and
M. Balakrishnan and
Ranjan Bose},
editor = {J{\"{o}}rg Henkel and
Ali Keshavarzi and
Naehyuck Chang and
Tahir Ghani},
title = {An experimental validation of system level design space exploration
methodology for energy efficient sensor nodes},
booktitle = {Proceedings of the 2009 International Symposium on Low Power Electronics
and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009},
pages = {355--358},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1594233.1594321},
doi = {10.1145/1594233.1594321},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/ChouhanBB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/ChouhanBB08,
author = {Sonali Chouhan and
M. Balakrishnan and
Ranjan Bose},
editor = {Vijaykrishnan Narayanan and
C. P. Ravikumar and
J{\"{o}}rg Henkel and
Ali Keshavarzi and
Vojin G. Oklobdzija and
Barry M. Pangrle},
title = {A framework for energy consumption based design space exploration
for wireless sensor nodes},
booktitle = {Proceedings of the 2008 International Symposium on Low Power Electronics
and Design, 2008, Bangalore, India, August 11-13, 2008},
pages = {329--334},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1393921.1394009},
doi = {10.1145/1393921.1394009},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/ChouhanBB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/GangwarBPK07,
author = {Anup Gangwar and
M. Balakrishnan and
Preeti Ranjan Panda and
Anshul Kumar},
title = {Evaluation of Bus Based Interconnect Mechanisms in Clustered {VLIW}
Architectures},
journal = {Int. J. Parallel Program.},
volume = {35},
number = {6},
pages = {507--527},
year = {2007},
url = {https://doi.org/10.1007/s10766-007-0045-2},
doi = {10.1007/S10766-007-0045-2},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/GangwarBPK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/GangwarBK07,
author = {Anup Gangwar and
M. Balakrishnan and
Anshul Kumar},
title = {Impact of intercluster communication mechanisms on {ILP} in clustered
{VLIW} architectures},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {12},
number = {1},
pages = {1:1--1:29},
year = {2007},
url = {https://doi.org/10.1145/1217088.1217089},
doi = {10.1145/1217088.1217089},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/GangwarBK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PalB07,
author = {Ashutosh Pal and
M. Balakrishnan},
editor = {Koen Bertels and
Walid A. Najjar and
Arjan J. van Genderen and
Stamatis Vassiliadis},
title = {A Behavioral Synthesis Approach for Distributed Memory {FPGA} Architectures},
booktitle = {{FPL} 2007, International Conference on Field Programmable Logic and
Applications, Amsterdam, The Netherlands, 27-29 August 2007},
pages = {517--520},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/FPL.2007.4380706},
doi = {10.1109/FPL.2007.4380706},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PalB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iicai/BalakrishnanRMEA07,
author = {M. Balakrishnan and
N. Ravisankar and
K. Meena and
R. Elanchezhian and
S. K. Zamir Ahmed},
editor = {Bhanu Prasad},
title = {Yield Prediction Through Feed Forward Neural Network Approach for
Direct Seeded Rice (Oryza sativa) in Bay Islands},
booktitle = {Proceedings of the 3rd Indian International Conference on Artificial
Intelligence, Pune, India, December 17-19, 2007},
pages = {1533--1541},
publisher = {{IICAI}},
year = {2007},
timestamp = {Fri, 15 Dec 2023 18:26:01 +0100},
biburl = {https://dblp.org/rec/conf/iicai/BalakrishnanRMEA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/emsoft/DhandDB06,
author = {Harsh Dhand and
Basant Kumar Dwivedi and
M. Balakrishnan},
editor = {Sang Lyul Min and
Wang Yi},
title = {New approach to architectural synthesis: incorporating QoS constraint},
booktitle = {Proceedings of the 6th {ACM} {\&} {IEEE} International conference
on Embedded software, {EMSOFT} 2006, October 22-25, 2006, Seoul, Korea},
pages = {301--310},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176887.1176931},
doi = {10.1145/1176887.1176931},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/emsoft/DhandDB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DwivediKBK06,
author = {Basant Kumar Dwivedi and
Arun Kejariwal and
M. Balakrishnan and
Anshul Kumar},
title = {Rapid Resource-Constrained Hardware Performance Estimation},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {40--46},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.33},
doi = {10.1109/RSP.2006.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DwivediKBK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MathurFBM06,
author = {Anmol Mathur and
Masahiro Fujita and
M. Balakrishnan and
Raj S. Mitra},
title = {Sequential Equivalence Checking},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {18--19},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.145},
doi = {10.1109/VLSID.2006.145},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MathurFBM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GangwarBPK05,
author = {Anup Gangwar and
M. Balakrishnan and
Preeti Ranjan Panda and
Anshul Kumar},
title = {Evaluation of Bus Based Interconnect Mechanisms in Clustered {VLIW}
Architectures},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {730--735},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.141},
doi = {10.1109/DATE.2005.141},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/GangwarBPK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MathurAMGBB05,
author = {Ankit Mathur and
Mayank Agarwal and
Soumyadeb Mitra and
Anup Gangwar and
M. Balakrishnan and
Subhashis Banerjee},
editor = {Herman Schmit and
Steven J. E. Wilton},
title = {{SMPS:} an FPGA-based prototyping environment for multiprocessor embedded
systems (abstract only)},
booktitle = {Proceedings of the {ACM/SIGDA} 13th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2005, Monterey, California, USA,
February 20-22, 2005},
pages = {273},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1046192.1046250},
doi = {10.1145/1046192.1046250},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/MathurAMGBB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mse/BalakrishnanP05,
author = {M. Balakrishnan and
B. S. Panwar},
title = {A Specialized Graduate Program in {VLSI} Design Tools and Technology},
booktitle = {2005 International Conference on Microelectronics Systems Education,
{MSE} 2005, Anaheim, CA, USA, June 12-13, 2005},
pages = {83--84},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/MSE.2005.13},
doi = {10.1109/MSE.2005.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mse/BalakrishnanP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainBK05,
author = {Manoj Kumar Jain and
M. Balakrishnan and
Anshul Kumar},
title = {Integrated On-Chip Storage Evaluation in {ASIP} Synthesis},
booktitle = {18th International Conference on {VLSI} Design {(VLSI} Design 2005),
with the 4th International Conference on Embedded Systems Design,
3-7 January 2005, Kolkata, India},
pages = {274--279},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ICVD.2005.112},
doi = {10.1109/ICVD.2005.112},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainBK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AroraSNB05,
author = {Gaurav Arora and
Abhishek Sharma and
D. Nagchoudhuri and
M. Balakrishnan},
title = {{ADOPT:} An Approach to Activity Based Delay Optimization},
booktitle = {18th International Conference on {VLSI} Design {(VLSI} Design 2005),
with the 4th International Conference on Embedded Systems Design,
3-7 January 2005, Kolkata, India},
pages = {411--416},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ICVD.2005.43},
doi = {10.1109/ICVD.2005.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AroraSNB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JainBK04,
author = {Manoj Kumar Jain and
M. Balakrishnan and
Anshul Kumar},
title = {An efficient technique for exploring register file size in {ASIP}
design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {23},
number = {12},
pages = {1693--1699},
year = {2004},
url = {https://doi.org/10.1109/TCAD.2004.837717},
doi = {10.1109/TCAD.2004.837717},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JainBK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/DwivediKB04,
author = {Basant Kumar Dwivedi and
Anshul Kumar and
M. Balakrishnan},
editor = {Alex Orailoglu and
Pai H. Chou and
Petru Eles and
Axel Jantsch},
title = {Automatic synthesis of system on chip multiprocessor architectures
for process networks},
booktitle = {Proceedings of the 2nd {IEEE/ACM/IFIP} International Conference on
Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2004,
Stockholm, Sweden, September 8-10, 2004},
pages = {60--65},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1016720.1016737},
doi = {10.1145/1016720.1016737},
timestamp = {Wed, 04 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/codes/DwivediKB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DwivediKB04,
author = {Basant Kumar Dwivedi and
Anshul Kumar and
M. Balakrishnan},
title = {Synthesis of Application Specific Multiprocessor Architectures for
Process Networks},
booktitle = {17th International Conference on {VLSI} Design {(VLSI} Design 2004),
with the 3rd International Conference on Embedded Systems Design,
5-9 January 2004, Mumbai, India},
pages = {780--783},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ICVD.2004.1261027},
doi = {10.1109/ICVD.2004.1261027},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DwivediKB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/JainBK03,
author = {Manoj Kumar Jain and
M. Balakrishnan and
Anshul Kumar},
title = {Exploring Storage Organization in {ASIP} Synthesis},
booktitle = {2003 Euromicro Symposium on Digital Systems Design {(DSD} 2003), Architectures,
Methods and Tools, 3-5 September 2003, Belek-Antalya, Turkey},
pages = {120--127},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/DSD.2003.1231909},
doi = {10.1109/DSD.2003.1231909},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/JainBK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SinghCGDBK03,
author = {Amarjeet Singh and
Amit Chhabra and
Anup Gangwar and
Basant Kumar Dwivedi and
M. Balakrishnan and
Anshul Kumar},
title = {SoC Synthesis with Automatic Hardware Software Interface Generation},
booktitle = {16th International Conference on {VLSI} Design {(VLSI} Design 2003),
4-8 January 2003, New Delhi, India},
pages = {585},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ICVD.2003.1183197},
doi = {10.1109/ICVD.2003.1183197},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SinghCGDBK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JainBK02,
author = {Manoj Kumar Jain and
M. Balakrishnan and
Anshul Kumar},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {An efficient technique for exploring register file size in {ASIP}
synthesis},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {252--261},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581671},
doi = {10.1145/581630.581671},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JainBK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/BanakarSLBM02,
author = {Rajeshwari Banakar and
Stefan Steinke and
Bo{-}Sik Lee and
M. Balakrishnan and
Peter Marwedel},
editor = {J{\"{o}}rg Henkel and
Xiaobo Sharon Hu and
Rajesh Gupta and
Sri Parameswaran},
title = {Scratchpad memory: design alternative for cache on-chip memory in
embedded systems},
booktitle = {Proceedings of the Tenth International Symposium on Hardware/Software
Codesign, {CODES} 2002, Estes Park, Colorado, USA, May 6-8, 2002},
pages = {73--78},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/774789.774805},
doi = {10.1145/774789.774805},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/codes/BanakarSLBM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BalakrishnanKIGM02,
author = {M. Balakrishnan and
Anshul Kumar and
Paolo Ienne and
Anup Gangwar and
Bhuvan Middha},
editor = {El Mostapha Aboulhamid and
Yukihiro Nakamura},
title = {A Trimaran Based Framework for Exploring the Design Space of {VLIW}
ASIPs with Coarse Grain Functional Units},
booktitle = {Proceedings of the 15th International Symposium on System Synthesis
{(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
pages = {2--7},
publisher = {{ACM} / {IEEE} Computer Society},
year = {2002},
url = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227143},
doi = {10.1109/ISSS.2002.1227143},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isss/BalakrishnanKIGM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BalakrishnanKJ02,
author = {M. Balakrishnan and
Anshul Kumar and
C. P. Joshi},
editor = {El Mostapha Aboulhamid and
Yukihiro Nakamura},
title = {A New Performance Evaluation Approach for System Level Design Space
Exploration},
booktitle = {Proceedings of the 15th International Symposium on System Synthesis
{(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
pages = {180--185},
publisher = {{ACM} / {IEEE} Computer Society},
year = {2002},
url = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227174},
doi = {10.1109/ISSS.2002.1227174},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isss/BalakrishnanKJ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/BalakrishnanMWGBS02,
author = {M. Balakrishnan and
Peter Marwedel and
Lars Wehmeyer and
Nils Grunwald and
Rajeshwari Banakar and
Stefan Steinke},
editor = {El Mostapha Aboulhamid and
Yukihiro Nakamura},
title = {Reducing Energy Consumption by Dynamic Copying of Instructions onto
Onchip Memory},
booktitle = {Proceedings of the 15th International Symposium on System Synthesis
{(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
pages = {213--218},
publisher = {{ACM} / {IEEE} Computer Society},
year = {2002},
url = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227180},
doi = {10.1109/ISSS.2002.1227180},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isss/BalakrishnanMWGBS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhattBK02,
author = {Vishal P. Bhatt and
M. Balakrishnan and
Anshul Kumar},
title = {Exploring the Number of Register Windows in {ASIP} Synthesis},
booktitle = {Proceedings of the 7th Asia and South Pacific Design Automation Conference
{(ASP-DAC} 2002), and the 15th International Conference on {VLSI}
Design {(VLSI} Design 2002), Bangalore, India, January 7-11, 2002},
pages = {233--238},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASPDAC.2002.994927},
doi = {10.1109/ASPDAC.2002.994927},
timestamp = {Mon, 14 Nov 2022 15:28:09 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhattBK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MohanKKB02,
author = {Murali Mohan and
Rohini Krishnan and
Anshul Kumar and
M. Balakrishnan},
title = {A New Divide and Conquer Method for Achieving High Speed Division
in Hardware},
booktitle = {Proceedings of the 7th Asia and South Pacific Design Automation Conference
{(ASP-DAC} 2002), and the 15th International Conference on {VLSI}
Design {(VLSI} Design 2002), Bangalore, India, January 7-11, 2002},
pages = {535--540},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASPDAC.2002.994974},
doi = {10.1109/ASPDAC.2002.994974},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MohanKKB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WehmeyerJSMB01,
author = {Lars Wehmeyer and
Manoj Kumar Jain and
Stefan Steinke and
Peter Marwedel and
M. Balakrishnan},
title = {Analysis of the influence of register file size on energyconsumption,
code size, and execution time},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {20},
number = {11},
pages = {1329--1337},
year = {2001},
url = {https://doi.org/10.1109/43.959862},
doi = {10.1109/43.959862},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WehmeyerJSMB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/DwivediHSB01,
author = {Basant Kumar Dwivedi and
Jan Hoogerbrugge and
Paul Stravers and
M. Balakrishnan},
editor = {Jan Madsen and
J{\"{o}}rg Henkel and
Xiaobo Sharon Hu},
title = {Exploring design space of parallel realizations: {MPEG-2} decoder
case study},
booktitle = {Proceedings of the Ninth International Symposium on Hardware/Software
Codesign, {CODES} 2001, Copenhagen, Denmark, 2001},
pages = {92--97},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/371636.371692},
doi = {10.1145/371636.371692},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/codes/DwivediHSB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/JainWSMB01,
author = {Manoj Kumar Jain and
Lars Wehmeyer and
Stefan Steinke and
Peter Marwedel and
M. Balakrishnan},
editor = {Jan Madsen and
J{\"{o}}rg Henkel and
Xiaobo Sharon Hu},
title = {Evaluating register file size in {ASIP} design},
booktitle = {Proceedings of the Ninth International Symposium on Hardware/Software
Codesign, {CODES} 2001, Copenhagen, Denmark, 2001},
pages = {109--114},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/371636.371698},
doi = {10.1145/371636.371698},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/JainWSMB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mse/Balakrishnan01,
author = {M. Balakrishnan},
title = {A Specialized Graduate Program in {VLSI} Design: {A} Success Story},
booktitle = {2001 International Conference on Microelectronics Systems Education,
{MSE} 2001, Las Vegas, NV, USA, July 17-18, 2001},
pages = {85--86},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/MSE.2001.932426},
doi = {10.1109/MSE.2001.932426},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mse/Balakrishnan01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RastogiBK01,
author = {Anupam Rastogi and
M. Balakrishnan and
Anshul Kumar},
title = {Integrating Communication Cost Estimation in Embedded Systems Design
: {A} {PCI} Case Study},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {23--28},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902635},
doi = {10.1109/ICVD.2001.902635},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RastogiBK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainBK01,
author = {Manoj Kumar Jain and
M. Balakrishnan and
Anshul Kumar},
title = {{ASIP} Design Methodologies : Survey and Issues},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {76},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902643},
doi = {10.1109/ICVD.2001.902643},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainBK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/BalakrishnanK00,
author = {M. Balakrishnan and
Heman Khanna},
title = {Allocation of {FIFO} structures in {RTL} data paths},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {5},
number = {3},
pages = {294--310},
year = {2000},
url = {https://doi.org/10.1145/348019.348044},
doi = {10.1145/348019.348044},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/BalakrishnanK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/SamaTB00,
author = {Akshaye Sama and
J. F. M. Theeuwen and
M. Balakrishnan},
editor = {David T. Blaauw and
Christian C. Enz and
Thaddeus Gabara and
Enrico Macii},
title = {Speeding up power estimation of embedded software},
booktitle = {Proceedings of the 2000 International Symposium on Low Power Electronics
and Design, 2000, Rapallo, Italy, July 25-27, 2000},
pages = {191--196},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/344166.344580},
doi = {10.1145/344166.344580},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/SamaTB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RajawatBK00,
author = {Arvind Rajawat and
M. Balakrishnan and
Anshul Kumar},
title = {nterface Synthesis: Issues and Approaches},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {92},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812590},
doi = {10.1109/ICVD.2000.812590},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RajawatBK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuptaSBM00,
author = {T. Vinod Kumar Gupta and
Purvesh Sharma and
M. Balakrishnan and
Sharad Malik},
title = {Processor Evaluation in an Embedded Systems Design Environment},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {98--103},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812591},
doi = {10.1109/ICVD.2000.812591},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/GuptaSBM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShrivastavaKKKB00,
author = {Aviral Shrivastava and
Mohit Kumar and
Sanjiv Kapoor and
Shashi Kumar and
M. Balakrishnan},
title = {Optimal Hardware/Software Partitioning for Concurrent Specification
Using Dynamic Programming},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {110--113},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812593},
doi = {10.1109/ICVD.2000.812593},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShrivastavaKKKB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/AnandKB99,
author = {M. Anand and
Sanjiv Kapoor and
M. Balakrishnan},
editor = {Sinan Kaptanoglu and
Steve Trimberger},
title = {Hardware/Software Partitioning Between Microprocessor and Reconfigurable
Hardware},
booktitle = {Proceedings of the 1999 {ACM/SIGDA} Seventh International Symposium
on Field Programmable Gate Arrays, {FPGA} 1999, Monterey, CA, USA,
February 21-23, 1999},
pages = {249},
publisher = {{ACM}},
year = {1999},
url = {https://doi.org/10.1145/296399.296513},
doi = {10.1145/296399.296513},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AnandKB99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GoswamiSB99,
author = {Rashmi Goswami and
V. Srinivasan and
M. Balakrishnan},
title = {{MPEG-2} Video Data Simulator: {A} Case Study in Constrained {HW-SW}
Codesign},
booktitle = {12th International Conference on {VLSI} Design {(VLSI} Design 1999),
10-13 January 1999, Goa, India},
pages = {128--132},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICVD.1999.745136},
doi = {10.1109/ICVD.1999.745136},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GoswamiSB99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SiddabathuniB99,
author = {Ajoy C. Siddabathuni and
M. Balakrishnan},
title = {Simulation and Modeling of a Multicast {ATM} Switch},
booktitle = {12th International Conference on {VLSI} Design {(VLSI} Design 1999),
10-13 January 1999, Goa, India},
pages = {242},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICVD.1999.745155},
doi = {10.1109/ICVD.1999.745155},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SiddabathuniB99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NaseerBK98,
author = {A. R. Naseer and
M. Balakrishnan and
Anshul Kumar},
title = {Direct mapping of {RTL} structures onto LUT-based FPGA's},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {17},
number = {7},
pages = {624--631},
year = {1998},
url = {https://doi.org/10.1109/43.709401},
doi = {10.1109/43.709401},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NaseerBK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LodhaGBB98,
author = {Sandeep K. Lodha and
Shashank Gupta and
M. Balakrishnan and
Subhashis Banerjee},
title = {Real Time Collision Detection and Avoidance: {A} Case Study for Design
Space Exploration in {HW-SW} Codesign},
booktitle = {11th International Conference on {VLSI} Design {(VLSI} Design 1991),
4-7 January 1998, Chennai, India},
pages = {97},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ICVD.1998.646585},
doi = {10.1109/ICVD.1998.646585},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LodhaGBB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainBKK98,
author = {Sitanshu Jain and
M. Balakrishnan and
Anshul Kumar and
Shashi Kumar},
title = {Speeding Up Program Execution Using Reconfigurable Hardware and a
Hardware Function Library},
booktitle = {11th International Conference on {VLSI} Design {(VLSI} Design 1991),
4-7 January 1998, Chennai, India},
pages = {400--405},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ICVD.1998.646641},
doi = {10.1109/ICVD.1998.646641},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainBKK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KhannaB97,
author = {Heman Khanna and
M. Balakrishnan},
title = {Allocation of {FIFO} Structures in {RTL} Data Paths},
booktitle = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
4-7 January 1997, Hyderabad, India},
pages = {130--133},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICVD.1997.568064},
doi = {10.1109/ICVD.1997.568064},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KhannaB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NaseerBK97,
author = {A. R. Naseer and
M. Balakrishnan and
Anshul Kumar},
title = {Optimal Clock Period for Synthesized Data Paths},
booktitle = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
4-7 January 1997, Hyderabad, India},
pages = {134--139},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICVD.1997.568065},
doi = {10.1109/ICVD.1997.568065},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NaseerBK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AggarwalTABK97,
author = {Gaurav Aggarwal and
Nitin Thaper and
Kamal Aggarwal and
M. Balakrishnan and
Shashi Kumar},
title = {A Novel Reconfigurable Co-Processor Architecture},
booktitle = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
4-7 January 1997, Hyderabad, India},
pages = {370--375},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICVD.1997.568155},
doi = {10.1109/ICVD.1997.568155},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AggarwalTABK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NaseerBK95,
author = {A. R. Naseer and
M. Balakrishnan and
Anshul Kumar},
editor = {Will Moore and
Wayne Luk},
title = {Delay Minimal Mapping of {RTL} Structures onto {LUT} Based FPGAs},
booktitle = {Field-Programmable Logic and Applications, 5th International Workshop,
{FPL} '95, Oxford, UK, August 29 - September 1, 1995, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {975},
pages = {139--148},
publisher = {Springer},
year = {1995},
url = {https://doi.org/10.1007/3-540-60294-1\_107},
doi = {10.1007/3-540-60294-1\_107},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/NaseerBK95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/Balakrishnan95,
author = {M. Balakrishnan},
title = {Buffer constraints in a variable-rate packetized video system},
booktitle = {Proceedings 1995 International Conference on Image Processing, Washington,
DC, USA, October 23-26, 1995},
pages = {29--32},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICIP.1995.529031},
doi = {10.1109/ICIP.1995.529031},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icip/Balakrishnan95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarKB95,
author = {Alok Kumar and
Anshul Kumar and
M. Balakrishnan},
title = {Heuristic search based approach to scheduling, allocation and binding
in Data Path Synthesis},
booktitle = {8th International Conference on {VLSI} Design {(VLSI} Design 1995),
4-7 January 1995, New Delhi, India},
pages = {75--80},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICVD.1995.512081},
doi = {10.1109/ICVD.1995.512081},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarKB95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NaseerBK94,
author = {A. R. Naseer and
M. Balakrishnan and
Anshul Kumar},
editor = {Reiner W. Hartenstein and
Michal Serv{\'{\i}}t},
title = {An Efficient Technique for Mapping {RTL} Structures onto FPGAs},
booktitle = {Field-Programmable Logic, Architectures, Synthesis and Applications,
4th International Workshop on Field-Programmable Logic and Applications,
{FPL} '94, Prague, Czech Republic, September 7-9, 1994, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {849},
pages = {99--110},
publisher = {Springer},
year = {1994},
url = {https://doi.org/10.1007/3-540-58419-6\_73},
doi = {10.1007/3-540-58419-6\_73},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/NaseerBK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/VarshneyaMB94,
author = {Atul Varshneya and
B. B. Madan and
M. Balakrishnan},
editor = {Howard Jay Siegel},
title = {Concurrent Search and Insertion in K-Dimensional Height Balanced Trees},
booktitle = {Proceedings of the 8th International Symposium on Parallel Processing,
Canc{\'{u}}n, Mexico, April 1994},
pages = {883--887},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IPPS.1994.288202},
doi = {10.1109/IPPS.1994.288202},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/VarshneyaMB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NaseerBK94,
author = {A. R. Naseer and
M. Balakrishnan and
Anshul Kumar},
title = {{FAST:} {FPGA} Targeted {RTL} Structure Synthesis Technique},
booktitle = {Proceedings of the Seventh International Conference on {VLSI} Design,
{VLSI} Design 1994, Calcutta, India, January 5-8, 1994},
pages = {21--24},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICVD.1994.282636},
doi = {10.1109/ICVD.1994.282636},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NaseerBK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AjayBHKKKMN93,
author = {C. S. Ajay and
M. Balakrishnan and
D. Harikrishna and
M. Karunakaran and
Anshul Kumar and
Shashi Kumar and
V. Mudgil and
A. R. Naseer},
title = {High Level Design Experiences with {IDEAS}},
booktitle = {Proceedings of the Sixth International Conference on {VLSI} Design,
{VLSI} Design 1993, Bombay, India, January 3-6, 1993},
pages = {110},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/ICVD.1993.669655},
doi = {10.1109/ICVD.1993.669655},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AjayBHKKKMN93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RaoBK93,
author = {M. V. Rao and
M. Balakrishnan and
Anshul Kumar},
title = {{DESSERT:} Design Space Exploration of {RT} Level Components},
booktitle = {Proceedings of the Sixth International Conference on {VLSI} Design,
{VLSI} Design 1993, Bombay, India, January 3-6, 1993},
pages = {299--304},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/ICVD.1993.669700},
doi = {10.1109/ICVD.1993.669700},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RaoBK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NedungadiBK92,
author = {Prashant P. Nedungadi and
M. Balakrishnan and
Anshul Kumar},
title = {Data Path Synthesis With Global Time Constraint},
booktitle = {Proceedings of the Fifth International Conference on {VLSI} Design,
{VLSI} Design 1992, Bangalore, India, January 4-7, 1992},
pages = {322--323},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/ICVD.1992.658071},
doi = {10.1109/ICVD.1992.658071},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NedungadiBK92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BalakrishnanM89,
author = {M. Balakrishnan and
Peter Marwedel},
editor = {Donald E. Thomas},
title = {Integrated Scheduling and Binding: {A} Synthesis Approach for Design
Space Exploration},
booktitle = {Proceedings of the 26th {ACM/IEEE} Design Automation Conference, Las
Vegas, Nevada, USA, June 25-29, 1989},
pages = {68--74},
publisher = {{ACM} Press},
year = {1989},
url = {https://doi.org/10.1145/74382.74395},
doi = {10.1145/74382.74395},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/BalakrishnanM89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ipl/BalakrishnanSMBL88,
author = {M. Balakrishnan and
S. Sutarwala and
Arun K. Majumdar and
Dilip K. Banerji and
James G. Linders},
title = {A Semantic Approach for Modular Synthesis of {VLSI} Systems},
journal = {Inf. Process. Lett.},
volume = {27},
number = {1},
pages = {1--7},
year = {1988},
url = {https://doi.org/10.1016/0020-0190(88)90073-7},
doi = {10.1016/0020-0190(88)90073-7},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ipl/BalakrishnanSMBL88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/BalakrishnanMBL88,
author = {M. Balakrishnan and
Arun K. Majumdar and
Dilip K. Banerji and
James G. Linders},
title = {Synthesis of decentralised controllers from high level description},
journal = {Microprocess. Microprogramming},
volume = {22},
number = {3},
pages = {217--229},
year = {1988},
url = {https://doi.org/10.1016/0165-6074(88)90423-1},
doi = {10.1016/0165-6074(88)90423-1},
timestamp = {Fri, 05 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/BalakrishnanMBL88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BalakrishnanMBLM88,
author = {M. Balakrishnan and
Arun K. Majumdar and
Dilip K. Banerji and
James G. Linders and
Jayanti C. Majithia},
title = {Allocation of multiport memories in data path synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {7},
number = {4},
pages = {536--540},
year = {1988},
url = {https://doi.org/10.1109/43.3188},
doi = {10.1109/43.3188},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BalakrishnanMBLM88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/BalakrishnanBM86,
author = {M. Balakrishnan and
P. C. P. Bhatt and
B. B. Madan},
editor = {Stanley Habib},
title = {An efficient retargetable microcode generator},
booktitle = {Proceedings of the 19th annual workshop on Microprogramming, New York,
NY, USA, October 15-17, 1986},
pages = {44--53},
publisher = {{ACM/IEEE}},
year = {1986},
url = {https://doi.org/10.1145/19551.19536},
doi = {10.1145/19551.19536},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/BalakrishnanBM86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/BalakrishnanRB82,
author = {M. Balakrishnan and
A. V. S. M. Rao and
Rajendar Bahl},
title = {A multi-channel microprogrammed {FFT} processor},
booktitle = {{IEEE} International Conference on Acoustics, Speech, and Signal Processing,
{ICASSP} '82, Paris, France, May 3-5, 1982},
pages = {492--497},
publisher = {{IEEE}},
year = {1982},
url = {https://doi.org/10.1109/ICASSP.1982.1171668},
doi = {10.1109/ICASSP.1982.1171668},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icassp/BalakrishnanRB82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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