BibTeX records: Tobias Bjerregaard

download as .bib file

@article{DBLP:journals/tcas/FanSSZJTBK16,
  author       = {Xin Fan and
                  Mikkel B. Stegmann and
                  Oliver Schrape and
                  Steffen Zeidler and
                  Isac G. Jensen and
                  Jannich Thorsen and
                  Tobias Bjerregaard and
                  Milos Krstic},
  title        = {Frequency-Domain Optimization of Digital Switching Noise Based on
                  Clock Scheduling},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {63-I},
  number       = {7},
  pages        = {982--993},
  year         = {2016},
  url          = {https://doi.org/10.1109/TCSI.2016.2546118},
  doi          = {10.1109/TCSI.2016.2546118},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tcas/FanSSZJTBK16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/GhiribaldiFASBB14,
  author       = {Alberto Ghiribaldi and
                  Herv{\'{e}} Tatenguem Fankem and
                  Federico Angiolini and
                  Mikkel Bystrup Stensgaard and
                  Tobias Bjerregaard and
                  Davide Bertozzi},
  title        = {A vertically integrated and interoperable multi-vendor synthesis flow
                  for predictable noc design in nanoscale technologies},
  booktitle    = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2014, Singapore, January 20-23, 2014},
  pages        = {337--342},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ASPDAC.2014.6742912},
  doi          = {10.1109/ASPDAC.2014.6742912},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/GhiribaldiFASBB14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hipeac/StranoBAGSTFSB12,
  author       = {Alessandro Strano and
                  Davide Bertozzi and
                  Federico Angiolini and
                  Leonardo Di G. Gregorio and
                  Frank Olaf Sem{-}Jacobsen and
                  Vladimir Todorov and
                  Jos{\'{e}} Flich and
                  Jos{\'{e}} Silla and
                  Tobias Bjerregaard},
  title        = {Quest for the ultimate network-on-chip: the NaNoC project},
  booktitle    = {Proceedings of the 2012 Interconnection Network Architecture - On-Chip,
                  Multi-Chip Workshop, INA-OCMC@HiPEAC 2012, Paris, France, January
                  25, 2012},
  pages        = {43--46},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2107763.2107775},
  doi          = {10.1145/2107763.2107775},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hipeac/StranoBAGSTFSB12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/BjerregaardSS07,
  author       = {Tobias Bjerregaard and
                  Mikkel Bystrup Stensgaard and
                  Jens Spars{\o}},
  editor       = {Rudy Lauwereins and
                  Jan Madsen},
  title        = {A scalable, timing-safe, network-on-chip architecture with an integrated
                  clock distribution method},
  booktitle    = {2007 Design, Automation and Test in Europe Conference and Exposition,
                  {DATE} 2007, Nice, France, April 16-20, 2007},
  pages        = {648--653},
  publisher    = {{EDA} Consortium, San Jose, CA, {USA}},
  year         = {2007},
  url          = {https://doi.org/10.1109/DATE.2007.364667},
  doi          = {10.1109/DATE.2007.364667},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/BjerregaardSS07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/csur/BjerregaardM06,
  author       = {Tobias Bjerregaard and
                  Shankar Mahadevan},
  title        = {A survey of research and practices of Network-on-chip},
  journal      = {{ACM} Comput. Surv.},
  volume       = {38},
  number       = {1},
  pages        = {1},
  year         = {2006},
  url          = {https://doi.org/10.1145/1132952.1132953},
  doi          = {10.1145/1132952.1132953},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/csur/BjerregaardM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/VenkataramaniBCG06,
  author       = {Girish Venkataramani and
                  Tobias Bjerregaard and
                  Tiberiu Chelcea and
                  Seth Copen Goldstein},
  title        = {Hardware compilation of application-specific memory-access interconnect},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {25},
  number       = {5},
  pages        = {756--771},
  year         = {2006},
  url          = {https://doi.org/10.1109/TCAD.2006.870411},
  doi          = {10.1109/TCAD.2006.870411},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/VenkataramaniBCG06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dsd/StensgaardBSP06,
  author       = {Mikkel Bystrup Stensgaard and
                  Tobias Bjerregaard and
                  Jens Spars{\o} and
                  Johnny Halkj{\ae}r Pedersen},
  title        = {A Simple Clockless Network-on-Chip for a Commercial Audio {DSP} Chip},
  booktitle    = {Ninth Euromicro Conference on Digital System Design: Architectures,
                  Methods and Tools {(DSD} 2006), 30 August - 1 September 2006, Dubrovnik,
                  Croatia},
  pages        = {641--648},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/DSD.2006.17},
  doi          = {10.1109/DSD.2006.17},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/StensgaardBSP06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dsd/BjerregaardS06,
  author       = {Tobias Bjerregaard and
                  Jens Spars{\o}},
  title        = {Packetizing {OCP} Transactions in the {MANGO} Network-on-Chip},
  booktitle    = {Ninth Euromicro Conference on Digital System Design: Architectures,
                  Methods and Tools {(DSD} 2006), 30 August - 1 September 2006, Dubrovnik,
                  Croatia},
  pages        = {657--664},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/DSD.2006.75},
  doi          = {10.1109/DSD.2006.75},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/BjerregaardS06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/async/BjerregaardS05,
  author       = {Tobias Bjerregaard and
                  Jens Spars{\o}},
  title        = {A Scheduling Discipline for Latency and Bandwidth Guarantees in Asynchronous
                  Network-on-Chip},
  booktitle    = {11th International Symposium on Advanced Research in Asynchronous
                  Circuits and Systems {(ASYNC} 2005), 14-16 March 2005, New York, NY,
                  {USA}},
  pages        = {34--43},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/ASYNC.2005.7},
  doi          = {10.1109/ASYNC.2005.7},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/async/BjerregaardS05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/codes/VenkataramaniCGB05,
  author       = {Girish Venkataramani and
                  Tiberiu Chelcea and
                  Seth Copen Goldstein and
                  Tobias Bjerregaard},
  editor       = {Petru Eles and
                  Axel Jantsch and
                  Reinaldo A. Bergamaschi},
  title        = {{SOMA:} a tool for synthesizing and optimizing memory accesses in
                  ASICs},
  booktitle    = {Proceedings of the 3rd {IEEE/ACM/IFIP} International Conference on
                  Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2005,
                  Jersey City, NJ, USA, September 19-21, 2005},
  pages        = {231--236},
  publisher    = {{ACM}},
  year         = {2005},
  url          = {https://doi.org/10.1145/1084834.1084894},
  doi          = {10.1145/1084834.1084894},
  timestamp    = {Mon, 26 Nov 2018 12:14:45 +0100},
  biburl       = {https://dblp.org/rec/conf/codes/VenkataramaniCGB05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/BjerregaardS05,
  author       = {Tobias Bjerregaard and
                  Jens Spars{\o}},
  title        = {A Router Architecture for Connection-Oriented Service Guarantees in
                  the {MANGO} Clockless Network-on-Chip},
  booktitle    = {2005 Design, Automation and Test in Europe Conference and Exposition
                  {(DATE} 2005), 7-11 March 2005, Munich, Germany},
  pages        = {1226--1231},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/DATE.2005.36},
  doi          = {10.1109/DATE.2005.36},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/BjerregaardS05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/issoc/BjerregaardMOS05,
  author       = {Tobias Bjerregaard and
                  Shankar Mahadevan and
                  Rasmus Gr{\o}ndahl Olsen and
                  Jens Spars{\o}},
  title        = {An {OCP} Compliant Network Adapter for GALS-based SoC Design Using
                  the {MANGO} Network-on-Chip},
  booktitle    = {Proceedings of the 2005 International Symposium on System-on-Chip,
                  Tampere, Finland, November 15-17, 2005},
  pages        = {171--174},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISSOC.2005.1595670},
  doi          = {10.1109/ISSOC.2005.1595670},
  timestamp    = {Mon, 09 Aug 2021 14:54:02 +0200},
  biburl       = {https://dblp.org/rec/conf/issoc/BjerregaardMOS05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/patmos/BjerregaardMS04,
  author       = {Tobias Bjerregaard and
                  Shankar Mahadevan and
                  Jens Spars{\o}},
  editor       = {Enrico Macii and
                  Odysseas G. Koufopavlou and
                  Vassilis Paliouras},
  title        = {A Channel Library for Asynchronous Circuit Design Supporting Mixed-Mode
                  Modeling},
  booktitle    = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
                  and Simulation; 14th International Workshop, {PATMOS} 2004, Santorini,
                  Greece, September 15-17, 2004, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {3254},
  pages        = {301--310},
  publisher    = {Springer},
  year         = {2004},
  url          = {https://doi.org/10.1007/978-3-540-30205-6\_32},
  doi          = {10.1007/978-3-540-30205-6\_32},
  timestamp    = {Tue, 14 May 2019 10:00:54 +0200},
  biburl       = {https://dblp.org/rec/conf/patmos/BjerregaardMS04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.