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ORCIDBibTeX records: Vamsi Boppana
@inproceedings{DBLP:conf/hotchips/AhmadSBLHKNSW19,
author = {Sagheer Ahmad and
Sridhar Subramanian and
Vamsi Boppana and
Shankar Lakka and
Fu{-}Hing Ho and
Tomai Knopp and
Juanjo Noguera and
Gaurav Singh and
Ralph Wittig},
title = {Xilinx First 7nm Device: Versal {AI} Core {(VC1902)}},
booktitle = {2019 {IEEE} Hot Chips 31 Symposium (HCS), Cupertino, CA, USA, August
18-20, 2019},
pages = {1--28},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HOTCHIPS.2019.8875639},
doi = {10.1109/HOTCHIPS.2019.8875639},
timestamp = {Tue, 22 Oct 2019 15:49:48 +0200},
biburl = {https://dblp.org/rec/conf/hotchips/AhmadSBLHKNSW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/AhmadBGKRW16,
author = {Sagheer Ahmad and
Vamsi Boppana and
Ilya Ganusov and
Vinod Kathail and
Vidya Rajagopalan and
Ralph Wittig},
title = {A 16-nm Multiprocessing System-on-Chip Field-Programmable Gate Array
Platform},
journal = {{IEEE} Micro},
volume = {36},
number = {2},
pages = {48--62},
year = {2016},
url = {https://doi.org/10.1109/MM.2016.18},
doi = {10.1109/MM.2016.18},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/AhmadBGKRW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/BoppanaAGKRW15,
author = {Vamsi Boppana and
Sagheer Ahmad and
Ilya Ganusov and
Vinod Kathail and
Vidya Rajagopalan and
Ralph Wittig},
title = {UltraScale+ MPSoC and {FPGA} families},
booktitle = {2015 {IEEE} Hot Chips 27 Symposium (HCS), Cupertino, CA, USA, August
22-25, 2015},
pages = {1--37},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2015.7477457},
doi = {10.1109/HOTCHIPS.2015.7477457},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hotchips/BoppanaAGKRW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/RajagopalanBDTW11,
author = {Vidya Rajagopalan and
Vamsi Boppana and
Sandeep Dutta and
Brad Taylor and
Ralph Wittig},
title = {Xilinx Zynq-7000 {EPP:} An extensible processing platform family},
booktitle = {2011 {IEEE} Hot Chips 23 Symposium (HCS), Stanford, CA, USA, August
17-19, 2011},
pages = {1--24},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2011.7477495},
doi = {10.1109/HOTCHIPS.2011.7477495},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hotchips/RajagopalanBDTW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/BhongeB08,
author = {Shashank Bhonge and
Vamsi Boppana},
editor = {Vijaykrishnan Narayanan and
C. P. Ravikumar and
J{\"{o}}rg Henkel and
Ali Keshavarzi and
Vojin G. Oklobdzija and
Barry M. Pangrle},
title = {Low power chips: a fabless asic perspective},
booktitle = {Proceedings of the 2008 International Symposium on Low Power Electronics
and Design, 2008, Bangalore, India, August 11-13, 2008},
pages = {347--348},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1393921.1394013},
doi = {10.1145/1393921.1394013},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/BhongeB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BoppanaVB08,
author = {Vamsi Boppana and
Rahoul Varma and
S. Balajee},
title = {Implementing the Best Processor Cores},
booktitle = {21st International Conference on {VLSI} Design {(VLSI} Design 2008),
4-8 January 2008, Hyderabad, India},
pages = {17--18},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VLSI.2008.137},
doi = {10.1109/VLSI.2008.137},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BoppanaVB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/RoyBB05,
author = {Rob Roy and
Debashis Bhattacharya and
Vamsi Boppana},
title = {Transistor-Level Optimization of Digital Designs with Flex Cells},
journal = {Computer},
volume = {38},
number = {2},
pages = {53--61},
year = {2005},
url = {https://doi.org/10.1109/MC.2005.74},
doi = {10.1109/MC.2005.74},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/RoyBB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/YoshidaDB04,
author = {Hiroaki Yoshida and
Kaushik De and
Vamsi Boppana},
editor = {Sharad Malik and
Limor Fix and
Andrew B. Kahng},
title = {Accurate pre-layout estimation of standard cell characteristics},
booktitle = {Proceedings of the 41th Design Automation Conference, {DAC} 2004,
San Diego, CA, USA, June 7-11, 2004},
pages = {208--211},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/996566.996626},
doi = {10.1145/996566.996626},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/YoshidaDB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AmyeenFPB03,
author = {M. Enamul Amyeen and
W. Kent Fuchs and
Irith Pomeranz and
Vamsi Boppana},
title = {Fault equivalence identification in combinational circuits using implication
and evaluation techniques},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {22},
number = {7},
pages = {922--936},
year = {2003},
url = {https://doi.org/10.1109/TCAD.2003.814241},
doi = {10.1109/TCAD.2003.814241},
timestamp = {Tue, 16 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/AmyeenFPB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GhoshSB02,
author = {Indradeep Ghosh and
Krishna Sekar and
Vamsi Boppana},
title = {Design for Verification at the Register Transfer Level},
booktitle = {Proceedings of the 7th Asia and South Pacific Design Automation Conference
{(ASP-DAC} 2002), and the 15th International Conference on {VLSI}
Design {(VLSI} Design 2002), Bangalore, India, January 7-11, 2002},
pages = {420--425},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASPDAC.2002.994957},
doi = {10.1109/ASPDAC.2002.994957},
timestamp = {Mon, 14 Nov 2022 15:28:09 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GhoshSB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RaviGBJ01,
author = {Srivaths Ravi and
Indradeep Ghosh and
Vamsi Boppana and
Niraj K. Jha},
title = {Fault-diagnosis-based technique for establishing {RTL} and gate-levelcorrespondences},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {20},
number = {12},
pages = {1414--1425},
year = {2001},
url = {https://doi.org/10.1109/43.969435},
doi = {10.1109/43.969435},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/RaviGBJ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SikdarDBYMC01,
author = {Biplab K. Sikdar and
Debesh K. Das and
Vamsi Boppana and
Cliff Yang and
Sobhan Mukherjee and
Parimal Pal Chaudhuri},
editor = {Satoshi Goto},
title = {Cellular automata as a built in self test structure},
booktitle = {Proceedings of {ASP-DAC} 2001, Asia and South Pacific Design Automation
Conference 2001, January 30-February 2, 2001, Yokohama, Japan},
pages = {319--324},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/370155.370367},
doi = {10.1145/370155.370367},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SikdarDBYMC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AmyeenFPB01,
author = {M. Enamul Amyeen and
W. Kent Fuchs and
Irith Pomeranz and
Vamsi Boppana},
title = {Fault Equivalence Identification Using Redundancy Information and
Static and Dynamic Extraction},
booktitle = {19th {IEEE} {VLSI} Test Symposium {(VTS} 2001), Test and Diagnosis
in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA,
{USA}},
pages = {124--130},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/VTS.2001.923428},
doi = {10.1109/VTS.2001.923428},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AmyeenFPB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RaviJGB00,
author = {Srivaths Ravi and
Niraj K. Jha and
Indradeep Ghosh and
Vamsi Boppana},
title = {A Technique for Identifying {RTL} and Gate-Level Correspondences},
booktitle = {Proceedings of the {IEEE} International Conference On Computer Design:
{VLSI} In Computers {\&} Processors, {ICCD} '00, Austin, Texas,
USA, September 17-20, 2000},
pages = {591--594},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICCD.2000.878351},
doi = {10.1109/ICCD.2000.878351},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RaviJGB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BoppanaGMJF00,
author = {Vamsi Boppana and
Indradeep Ghosh and
Rajarshi Mukherjee and
Jawahar Jain and
Masahiro Fujita},
title = {Hierarchical Error Diagnosis Targeting {RTL} Circuits},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {436--441},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812646},
doi = {10.1109/ICVD.2000.812646},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BoppanaGMJF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SikdarPBCBYM00,
author = {Biplab K. Sikdar and
Kolin Paul and
Gosta Pada Biswas and
Parimal Pal Chaudhuri and
Vamsi Boppana and
Cliff Yang and
Sobhan Mukherjee},
title = {Theory and Application of GF(2p) Cellular Automata as On-chip Test
Pattern Generator},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {556--561},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812666},
doi = {10.1109/ICVD.2000.812666},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SikdarPBCBYM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JainBMJFH00,
author = {Ankur Jain and
Vamsi Boppana and
Rajarshi Mukherjee and
Jawahar Jain and
Masahiro Fujita and
Michael S. Hsiao},
title = {Testing, Verification, and Diagnosis in the Presence of Unknowns},
booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000,
Montreal, Canada},
pages = {263--270},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/VTEST.2000.843854},
doi = {10.1109/VTEST.2000.843854},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/JainBMJFH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/BoppanaRTF99,
author = {Vamsi Boppana and
Sreeranga P. Rajan and
Koichiro Takayama and
Masahiro Fujita},
editor = {Nicolas Halbwachs and
Doron A. Peled},
title = {Model Checking Based on Sequential {ATPG}},
booktitle = {Computer Aided Verification, 11th International Conference, {CAV}
'99, Trento, Italy, July 6-10, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1633},
pages = {418--430},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/3-540-48683-6\_36},
doi = {10.1007/3-540-48683-6\_36},
timestamp = {Tue, 14 May 2019 10:00:43 +0200},
biburl = {https://dblp.org/rec/conf/cav/BoppanaRTF99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BoppanaMJFB99,
author = {Vamsi Boppana and
Rajarshi Mukherjee and
Jawahar Jain and
Masahiro Fujita and
Pradeep Bollineni},
editor = {Mary Jane Irwin},
title = {Multiple Error Diagnosis Based on Xlists},
booktitle = {Proceedings of the 36th Conference on Design Automation, New Orleans,
LA, USA, June 21-25, 1999},
pages = {660--665},
publisher = {{ACM} Press},
year = {1999},
url = {https://doi.org/10.1145/309847.310021},
doi = {10.1145/309847.310021},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/BoppanaMJFB99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AmyeenFPB99,
author = {M. Enamul Amyeen and
W. Kent Fuchs and
Irith Pomeranz and
Vamsi Boppana},
title = {Implication and Evaluation Techniques for Proving Fault Equivalence},
booktitle = {17th {IEEE} {VLSI} Test Symposium {(VTS} '99), 25-30 April 1999, San
Diego, CA, {USA}},
pages = {201--213},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/VTEST.1999.766666},
doi = {10.1109/VTEST.1999.766666},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AmyeenFPB99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JainHBF99,
author = {Ankur Jain and
Michael S. Hsiao and
Vamsi Boppana and
Masahiro Fujita},
title = {On the Evaluation of Arbitrary Defect Coverage of Test Sets},
booktitle = {17th {IEEE} {VLSI} Test Symposium {(VTS} '99), 25-30 April 1999, San
Diego, CA, {USA}},
pages = {426--432},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/VTEST.1999.766699},
doi = {10.1109/VTEST.1999.766699},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/JainHBF99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BoppanaF98,
author = {Vamsi Boppana and
W. Kent Fuchs},
editor = {Hiroto Yasuura},
title = {Dynamic fault collapsing and diagnostic test pattern generation for
sequential circuits},
booktitle = {Proceedings of the 1998 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1998, San Jose, CA, USA, November 8-12, 1998},
pages = {147--154},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1145/288548.288593},
doi = {10.1145/288548.288593},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/BoppanaF98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/BoppanaF98,
author = {Vamsi Boppana and
Masahiro Fujita},
title = {Modeling the unknown! Towards model-independent fault and error diagnosis},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {1094--1101},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743310},
doi = {10.1109/TEST.1998.743310},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/BoppanaF98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/us/Boppana97,
author = {Vamsi Boppana},
title = {State Information-Based Solutions for Sequential Circuit Diagnosis
and Testing},
school = {University of Illinois Urbana-Champaign, {USA}},
year = {1997},
url = {https://hdl.handle.net/2142/81201},
timestamp = {Sat, 29 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/us/Boppana97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BoppanaHF97,
author = {Vamsi Boppana and
Ismed Hartanto and
W. Kent Fuchs},
title = {Characterization and Implicit Identification of Sequential Indistinguishability},
booktitle = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
4-7 January 1997, Hyderabad, India},
pages = {376--380},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICVD.1997.568156},
doi = {10.1109/ICVD.1997.568156},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BoppanaHF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HartantoBPF97,
author = {Ismed Hartanto and
Vamsi Boppana and
Janak H. Patel and
W. Kent Fuchs},
title = {Diagnostic Test Pattern Generation for Sequential Circuits},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {196--202},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600264},
doi = {10.1109/VTEST.1997.600264},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HartantoBPF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/BoppanaSBFL96,
author = {Vamsi Boppana and
Prashant Saxena and
Prithviraj Banerjee and
W. Kent Fuchs and
C. L. Liu},
editor = {Luc Boug{\'{e}} and
Pierre Fraigniaud and
Anne Mignotte and
Yves Robert},
title = {A Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs},
booktitle = {Euro-Par '96 Parallel Processing, Second International Euro-Par Conference,
Lyon, France, August 26-29, 1996, Proceedings, Volume {I}},
series = {Lecture Notes in Computer Science},
volume = {1123},
pages = {828--831},
publisher = {Springer},
year = {1996},
url = {https://doi.org/10.1007/3-540-61626-8\_109},
doi = {10.1007/3-540-61626-8\_109},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/BoppanaSBFL96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/BoppanaHF96,
author = {Vamsi Boppana and
Ismed Hartanto and
W. Kent Fuchs},
title = {Fault Diagnosis Using State Information},
booktitle = {Digest of Papers: FTCS-26, The Twenty-Sixth Annual International Symposium
on Fault-Tolerant Computing, Sendai, Japan, June 25-27, 1996},
pages = {96--103},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/FTCS.1996.534598},
doi = {10.1109/FTCS.1996.534598},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ftcs/BoppanaHF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HartantoBF96,
author = {Ismed Hartanto and
Vamsi Boppana and
W. Kent Fuchs},
editor = {Rob A. Rutenbar and
Ralph H. J. M. Otten},
title = {Identification of unsettable flip-flops for partial scan and faster
{ATPG}},
booktitle = {Proceedings of the 1996 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1996, San Jose, CA, USA, November 10-14, 1996},
pages = {63--66},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1996},
url = {https://doi.org/10.1109/ICCAD.1996.568941},
doi = {10.1109/ICCAD.1996.568941},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HartantoBF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BoppanaF96,
author = {Vamsi Boppana and
W. Kent Fuchs},
editor = {Rob A. Rutenbar and
Ralph H. J. M. Otten},
title = {Integrated fault diagnosis targeting reduced simulation},
booktitle = {Proceedings of the 1996 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1996, San Jose, CA, USA, November 10-14, 1996},
pages = {681--684},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1996},
url = {https://doi.org/10.1109/ICCAD.1996.571361},
doi = {10.1109/ICCAD.1996.571361},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/BoppanaF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/HartantoBF96,
author = {Ismed Hartanto and
Vamsi Boppana and
W. Kent Fuchs},
title = {Diagnostic Fault Equivalence Identification Using Redundancy Information
and Structural Analysis},
booktitle = {Proceedings {IEEE} International Test Conference 1996, Test and Design
Validity, Washington, DC, USA, October 20-25, 1996},
pages = {294--302},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/TEST.1996.556974},
doi = {10.1109/TEST.1996.556974},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/HartantoBF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/BoppanaF96,
author = {Vamsi Boppana and
W. Kent Fuchs},
title = {Partial Scan Design Based on State Transition Modeling},
booktitle = {Proceedings {IEEE} International Test Conference 1996, Test and Design
Validity, Washington, DC, USA, October 20-25, 1996},
pages = {538--547},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/TEST.1996.557079},
doi = {10.1109/TEST.1996.557079},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/BoppanaF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BoppanaHF96,
author = {Vamsi Boppana and
Ismed Hartanto and
W. Kent Fuchs},
title = {Full fault dictionary storage based on labeled tree encoding},
booktitle = {14th {IEEE} {VLSI} Test Symposium (VTS'96), April 28 - May 1, 1996,
Princeton, NJ, {USA}},
pages = {174--179},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/VTEST.1996.510854},
doi = {10.1109/VTEST.1996.510854},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BoppanaHF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BoppanaF94,
author = {Vamsi Boppana and
W. Kent Fuchs},
editor = {Jochen A. G. Jess and
Richard L. Rudell},
title = {Fault dictionary compaction by output sequence removal},
booktitle = {Proceedings of the 1994 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1994, San Jose, California, USA, November 6-10, 1994},
pages = {576--579},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1994},
url = {https://doi.org/10.1109/ICCAD.1994.629878},
doi = {10.1109/ICCAD.1994.629878},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/BoppanaF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NandiBC94,
author = {Sukumar Nandi and
Vamsi Boppana and
Parimal Pal Chaudhuri},
title = {A {CAD} Tool for Design of On-Chip Store {\&} Generate Scheme},
booktitle = {Proceedings of the Seventh International Conference on {VLSI} Design,
{VLSI} Design 1994, Calcutta, India, January 5-8, 1994},
pages = {169--174},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICVD.1994.282678},
doi = {10.1109/ICVD.1994.282678},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NandiBC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NandiBCCR93,
author = {Sukumar Nandi and
Vamsi Boppana and
Supratik Chakraborty and
Parimal Pal Chaudhuri and
Samir Roy},
title = {Delay Fault Test Generation with Cellular Automata},
booktitle = {Proceedings of the Sixth International Conference on {VLSI} Design,
{VLSI} Design 1993, Bombay, India, January 3-6, 1993},
pages = {281--286},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/ICVD.1993.669697},
doi = {10.1109/ICVD.1993.669697},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NandiBCCR93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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