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ORCIDBibTeX records: Win Chaivipas
@inproceedings{DBLP:conf/vlsic/ShibasakiCCDHTM14,
author = {Takayuki Shibasaki and
Win Chaivipas and
Yanfei Chen and
Yoshiyasu Doi and
Takayuki Hamada and
Hideki Takauchi and
Toshihiko Mori and
Yoichi Koyanagi and
Hirotaka Tamura},
title = {A 56-Gb/s receiver front-end with a {CTLE} and 1-tap {DFE} in 20-nm
{CMOS}},
booktitle = {Symposium on {VLSI} Circuits, {VLSIC} 2014, Digest of Technical Papers,
Honolulu, HI, USA, June 10-13, 2014},
pages = {1--2},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/VLSIC.2014.6858400},
doi = {10.1109/VLSIC.2014.6858400},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/ShibasakiCCDHTM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/DoiSDCHMHKYTT13,
author = {Yoshiyasu Doi and
Takayuki Shibasaki and
Takumi Danjo and
Win Chaivipas and
Takushi Hashida and
Hiroki Miyaoka and
Masanori Hoshino and
Yoichi Koyanagi and
Takuji Yamamoto and
Sanroku Tsukamoto and
Hirotaka Tamura},
title = {A 32 Gb/s Data-Interpolator Receiver With Two-Tap {DFE} Fabricated
With 28-nm {CMOS} Process},
journal = {{IEEE} J. Solid State Circuits},
volume = {48},
number = {12},
pages = {3258--3267},
year = {2013},
url = {https://doi.org/10.1109/JSSC.2013.2278805},
doi = {10.1109/JSSC.2013.2278805},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/DoiSDCHMHKYTT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/DoiSDCHMHKYTT13,
author = {Yoshiyasu Doi and
Takayuki Shibasaki and
Takumi Danjo and
Win Chaivipas and
Takushi Hashida and
Hiroki Miyaoka and
Masanori Hoshino and
Yoichi Koyanagi and
Takuji Yamamoto and
Sanroku Tsukamoto and
Hirotaka Tamura},
title = {32Gb/s data-interpolator receiver with 2-tap {DFE} in 28nm {CMOS}},
booktitle = {2013 {IEEE} International Solid-State Circuits Conference - Digest
of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
17-21, 2013},
pages = {36--37},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISSCC.2013.6487626},
doi = {10.1109/ISSCC.2013.6487626},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/DoiSDCHMHKYTT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MinamiAMSLYTCOM12,
author = {Ryo Minami and
Hiroki Asada and
Ahmed Musa and
Takahiro Sato and
Ning Li and
Tatsuya Yamaguchi and
Yasuaki Takeuchi and
Win Chaivipas and
Kenichi Okada and
Akira Matsuzawa},
title = {A 60-GHz 16QAM 11Gbps direct-conversion transceiver in 65nm {CMOS}},
booktitle = {Proceedings of the 17th Asia and South Pacific Design Automation Conference,
{ASP-DAC} 2012, Sydney, Australia, January 30 - February 2, 2012},
pages = {467--468},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ASPDAC.2012.6164993},
doi = {10.1109/ASPDAC.2012.6164993},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MinamiAMSLYTCOM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/MusaMSCOM11,
author = {Ahmed Musa and
Rui Murakami and
Takahiro Sato and
Win Chaivipas and
Kenichi Okada and
Akira Matsuzawa},
title = {A Low Phase Noise Quadrature Injection Locked Frequency Synthesizer
for MM-Wave Applications},
journal = {{IEEE} J. Solid State Circuits},
volume = {46},
number = {11},
pages = {2635--2649},
year = {2011},
url = {https://doi.org/10.1109/JSSC.2011.2166336},
doi = {10.1109/JSSC.2011.2166336},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/MusaMSCOM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/OkadaLMBMMSATICMYTYNM11,
author = {Kenichi Okada and
Ning Li and
Kota Matsushita and
Keigo Bunsen and
Rui Murakami and
Ahmed Musa and
Takahiro Sato and
Hiroki Asada and
Naoki Takayama and
Shogo Ito and
Win Chaivipas and
Ryo Minami and
Tatsuya Yamaguchi and
Yasuaki Takeuchi and
Hiroyuki Yamagishi and
Makoto Noda and
Akira Matsuzawa},
title = {A 60-GHz 16QAM/8PSK/QPSK/BPSK Direct-Conversion Transceiver for IEEE802.15.3c},
journal = {{IEEE} J. Solid State Circuits},
volume = {46},
number = {12},
pages = {2988--3004},
year = {2011},
url = {https://doi.org/10.1109/JSSC.2011.2166184},
doi = {10.1109/JSSC.2011.2166184},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/OkadaLMBMMSATICMYTYNM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MusaMSCOM11,
author = {Ahmed Musa and
Rui Murakami and
Takahiro Sato and
Win Chaivipas and
Kenichi Okada and
Akira Matsuzawa},
title = {A 58-63.6GHz quadrature {PLL} frequency synthesizer using dual-injection
technique},
booktitle = {Proceedings of the 16th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2011, Yokohama, Japan, January 25-27, 2011},
pages = {101--102},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ASPDAC.2011.5722158},
doi = {10.1109/ASPDAC.2011.5722158},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MusaMSCOM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/OkadaMBMMSATLICMM11,
author = {Kenichi Okada and
Kota Matsushita and
Keigo Bunsen and
Rui Murakami and
Ahmed Musa and
Takahiro Sato and
Hiroki Asada and
Naoki Takayama and
Ning Li and
Shogo Ito and
Win Chaivipas and
Ryo Minami and
Akira Matsuzawa},
title = {A 60GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver for {IEEE}
802.15.3c},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
2011},
pages = {160--162},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISSCC.2011.5746263},
doi = {10.1109/ISSCC.2011.5746263},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/OkadaMBMMSATLICMM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/LiCOM08,
author = {Ning Li and
Win Chaivipas and
Kenichi Okada and
Akira Matsuzawa},
title = {Analysis of {CMOS} Transconductance Amplifiers for Sampling Mixers},
journal = {{IEICE} Trans. Electron.},
volume = {91-C},
number = {6},
pages = {871--878},
year = {2008},
url = {https://doi.org/10.1093/ietele/e91-c.6.871},
doi = {10.1093/IETELE/E91-C.6.871},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/LiCOM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/ChaivipasOM08,
author = {Win Chaivipas and
Kenichi Okada and
Akira Matsuzawa},
title = {Spatial Sensitivity of Capacitors in Distributed Resonators and Its
Application to Fine and Wide Frequency Tuning Digital Controlled Oscillators},
journal = {{IEICE} Trans. Electron.},
volume = {91-C},
number = {6},
pages = {918--927},
year = {2008},
url = {https://doi.org/10.1093/ietele/e91-c.6.918},
doi = {10.1093/IETELE/E91-C.6.918},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/ChaivipasOM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/ChaivipasM07,
author = {Win Chaivipas and
Akira Matsuzawa},
title = {Analysis and Design of Direct Reference Feed-Forward Compensation
for Fast-Settling All-Digital Phase-Locked Loop},
journal = {{IEICE} Trans. Electron.},
volume = {90-C},
number = {4},
pages = {793--801},
year = {2007},
url = {https://doi.org/10.1093/ietele/e90-c.4.793},
doi = {10.1093/IETELE/E90-C.4.793},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/ChaivipasM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/OhMC07,
author = {Philipus Chandra Oh and
Akira Matsuzawa and
Win Chaivipas},
title = {A Study on Fully Digital Clock Data Recovery Utilizing Time to Digital
Converter},
journal = {{IEICE} Trans. Electron.},
volume = {90-C},
number = {6},
pages = {1311--1314},
year = {2007},
url = {https://doi.org/10.1093/ietele/e90-c.6.1311},
doi = {10.1093/IETELE/E90-C.6.1311},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/OhMC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChaivipasMO06,
author = {Win Chaivipas and
Akira Matsuzawa and
Philipus Chandra Oh},
title = {Feedforward compensation technique for all digital phase locked loop
based synthesizers},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
May 2006, Island of Kos, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISCAS.2006.1693308},
doi = {10.1109/ISCAS.2006.1693308},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChaivipasMO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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