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ORCIDBibTeX records: Matthew K. Farrens
@inproceedings{DBLP:conf/cloudnet/ShuklaGF21,
author = {Sambit Kumar Shukla and
Dipak Ghosal and
Matthew K. Farrens},
title = {Understanding and Leveraging Cluster Heterogeneity for Efficient Execution
of Cloud Services},
booktitle = {10th {IEEE} International Conference on Cloud Networking, CloudNet
2021, Cookeville, TN, USA, November 8-10, 2021},
pages = {56--64},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/CloudNet53349.2021.9657128},
doi = {10.1109/CLOUDNET53349.2021.9657128},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cloudnet/ShuklaGF21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nas/ShuklaF21,
author = {Sambit Kumar Shukla and
Matthew K. Farrens},
title = {Leveraging Network Delay Variability to Improve QoE of Latency Critical
Services},
booktitle = {{IEEE} International Conference on Networking, Architecture and Storage,
{NAS} 2021, Riverside, CA, USA, October 24-26, 2021},
pages = {1--8},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/NAS51552.2021.9605367},
doi = {10.1109/NAS51552.2021.9605367},
timestamp = {Tue, 30 Nov 2021 09:29:49 +0100},
biburl = {https://dblp.org/rec/conf/nas/ShuklaF21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sncs/LehWSFG20,
author = {Goldwayne Smith Leh and
Jian Wu and
Sambit Shukla and
Matthew K. Farrens and
Dipak Ghosal},
title = {Model-Driven Joint Optimization of Power and Latency Guarantee in
Data center Applications},
journal = {{SN} Comput. Sci.},
volume = {1},
number = {1},
pages = {34:1--34:14},
year = {2020},
url = {https://doi.org/10.1007/s42979-019-0030-z},
doi = {10.1007/S42979-019-0030-Z},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/sncs/LehWSFG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/StraubeLNFA20,
author = {Kramer Straube and
Jason Lowe{-}Power and
Christopher Nitta and
Matthew K. Farrens and
Venkatesh Akella},
editor = {Jos{\'{e}} Nelson Amaral and
Lizy Kurian John and
Xipeng Shen},
title = {{HCAPP:} Scalable Power Control for Heterogeneous 2.5D Integrated
Systems},
booktitle = {{ICPP} 2020: 49th International Conference on Parallel Processing,
Edmonton, AB, Canada, August 17-20, 2020},
pages = {60:1--60:11},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3404397.3404448},
doi = {10.1145/3404397.3404448},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icpp/StraubeLNFA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmec/ShuklaGWSF19,
author = {Sambit Shukla and
Dipak Ghosal and
Kesheng Wu and
Alex Sim and
Matthew K. Farrens},
title = {Co-optimizing Latency and Energy for IoT services using {HMP} servers
in Fog Clusters},
booktitle = {Fourth International Conference on Fog and Mobile Edge Computing,
{FMEC} 2019, Rome, Italy, June 10-13, 2019},
pages = {121--128},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FMEC.2019.8795353},
doi = {10.1109/FMEC.2019.8795353},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fmec/ShuklaGWSF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/ShuklaGF19,
author = {Sambit Kumar Shukla and
Dipak Ghosal and
Matthew K. Farrens},
editor = {Zheng Xiao and
Laurence T. Yang and
Pavan Balaji and
Tao Li and
Keqin Li and
Albert Y. Zomaya},
title = {Tuning Network {I/O} Processing to Achieve Performance and Energy
Objectives of Latency Critical Workloads},
booktitle = {21st {IEEE} International Conference on High Performance Computing
and Communications; 17th {IEEE} International Conference on Smart
City; 5th {IEEE} International Conference on Data Science and Systems,
HPCC/SmartCity/DSS 2019, Zhangjiajie, China, August 10-12, 2019},
pages = {1499--1508},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCC/SmartCity/DSS.2019.00207},
doi = {10.1109/HPCC/SMARTCITY/DSS.2019.00207},
timestamp = {Fri, 19 Nov 2021 12:28:04 +0100},
biburl = {https://dblp.org/rec/conf/hpcc/ShuklaGF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/csur/HanfordAFTG18,
author = {Nathan Hanford and
Vishal Ahuja and
Matthew K. Farrens and
Brian Tierney and
Dipak Ghosal},
title = {A Survey of End-System Optimizations for High-Speed Networks},
journal = {{ACM} Comput. Surv.},
volume = {51},
number = {3},
pages = {54:1--54:36},
year = {2018},
url = {https://doi.org/10.1145/3184899},
doi = {10.1145/3184899},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/csur/HanfordAFTG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/StraubeLNFA18,
author = {Kramer Straube and
Jason Lowe{-}Power and
Christopher Nitta and
Matthew K. Farrens and
Venkatesh Akella},
title = {Improving Provisioned Power Efficiency in {HPC} Systems with {GPU-CAPP}},
booktitle = {25th {IEEE} International Conference on High Performance Computing,
HiPC 2018, Bengaluru, India, December 17-20, 2018},
pages = {112--122},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/HiPC.2018.00021},
doi = {10.1109/HIPC.2018.00021},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hipc/StraubeLNFA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Lowe-PowerAFKN18,
author = {Jason Lowe{-}Power and
Venkatesh Akella and
Matthew K. Farrens and
Samuel T. King and
Christopher J. Nitta},
editor = {Jakub Szefer and
Weidong Shi and
Ruby B. Lee},
title = {A case for exposing extra-architectural state in the {ISA:} position
paper},
booktitle = {Proceedings of the 7th International Workshop on Hardware and Architectural
Support for Security and Privacy, HASP@ISCA 2018, Los Angeles, CA,
USA, June 02-02, 2018},
pages = {8:1--8:6},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3214292.3214300},
doi = {10.1145/3214292.3214300},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/Lowe-PowerAFKN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/allerton/Fridovich-KeilH17,
author = {David Fridovich{-}Keil and
Nathan Hanford and
Margaret P. Chapman and
Claire J. Tomlin and
Matthew K. Farrens and
Dipak Ghosal},
title = {A model predictive control approach to flow pacing for {TCP}},
booktitle = {55th Annual Allerton Conference on Communication, Control, and Computing,
Allerton 2017, Monticello, IL, USA, October 3-6, 2017},
pages = {988--994},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ALLERTON.2017.8262845},
doi = {10.1109/ALLERTON.2017.8262845},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/allerton/Fridovich-KeilH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/StraubeNAFA17,
author = {Kramer Straube and
Christopher Nitta and
Raj Amirtharajah and
Matthew K. Farrens and
Venkatesh Akella},
title = {Improving Execution Time of Parallel Programs on Large Scale Chip
Multiprocessors with Constant Average Power Processing},
booktitle = {2017 {IEEE} International Conference on Computer Design, {ICCD} 2017,
Boston, MA, USA, November 5-8, 2017},
pages = {649--652},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ICCD.2017.113},
doi = {10.1109/ICCD.2017.113},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/StraubeNAFA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fgcs/HanfordAFGBPT16,
author = {Nathan Hanford and
Vishal Ahuja and
Matthew K. Farrens and
Dipak Ghosal and
Mehmet Balman and
Eric Pouyoul and
Brian Tierney},
title = {Improving network performance on multicore systems: Impact of core
affinities on high throughput flows},
journal = {Future Gener. Comput. Syst.},
volume = {56},
pages = {277--283},
year = {2016},
url = {https://doi.org/10.1016/j.future.2015.09.012},
doi = {10.1016/J.FUTURE.2015.09.012},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fgcs/HanfordAFGBPT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nss/GeganAFG15,
author = {Ross K. Gegan and
Rennie Archibald and
Matthew K. Farrens and
Dipak Ghosal},
editor = {Meikang Qiu and
Shouhuai Xu and
Moti Yung and
Haibo Zhang},
title = {Performance Analysis of Real-Time Covert Timing Channel Detection
Using a Parallel System},
booktitle = {Network and System Security - 9th International Conference, {NSS}
2015, New York, NY, USA, November 3-5, 2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9408},
pages = {519--530},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-25645-0\_40},
doi = {10.1007/978-3-319-25645-0\_40},
timestamp = {Tue, 14 May 2019 10:00:41 +0200},
biburl = {https://dblp.org/rec/conf/nss/GeganAFG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MacdonaldNFA14,
author = {Kevin Macdonald and
Christopher Nitta and
Matthew K. Farrens and
Venkatesh Akella},
title = {PDG{\_}GEN: {A} Methodology for Fast and Accurate Simulation of On-Chip
Networks},
journal = {{IEEE} Trans. Computers},
volume = {63},
number = {3},
pages = {650--663},
year = {2014},
url = {https://doi.org/10.1109/TC.2012.140},
doi = {10.1109/TC.2012.140},
timestamp = {Thu, 08 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/MacdonaldNFA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ton/CongdonMFA14,
author = {Paul Congdon and
Prasant Mohapatra and
Matthew K. Farrens and
Venkatesh Akella},
title = {Simultaneously Reducing Latency and Power Consumption in OpenFlow
Switches},
journal = {{IEEE/ACM} Trans. Netw.},
volume = {22},
number = {3},
pages = {1007--1020},
year = {2014},
url = {https://doi.org/10.1109/TNET.2013.2270436},
doi = {10.1109/TNET.2013.2270436},
timestamp = {Sat, 27 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ton/CongdonMFA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/HanfordAFGBPT14,
author = {Nathan Hanford and
Vishal Ahuja and
Matthew K. Farrens and
Dipak Ghosal and
Mehmet Balman and
Eric Pouyoul and
Brian Tierney},
editor = {Viktor K. Prasanna and
Gordon J. Brebner and
Isaac Keslassy},
title = {Impact of the end-system and affinities on the throughput of high-speed
flows},
booktitle = {Proceedings of the tenth {ACM/IEEE} symposium on Architectures for
networking and communications systems, {ANCS} 2014, Los Angeles, CA,
USA, October 20-21, 2014},
pages = {259--260},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2658260.2661772},
doi = {10.1145/2658260.2661772},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ancs/HanfordAFGBPT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/HanfordAFGBPT14,
author = {Nathan Hanford and
Vishal Ahuja and
Matthew K. Farrens and
Dipak Ghosal and
Mehmet Balman and
Eric Pouyoul and
Brian Tierney},
editor = {Mehmet Balman and
Surendra Byna and
Brian L. Tierney},
title = {Analysis of the effect of core affinity on high-throughput flows},
booktitle = {Proceedings of the Fourth International Workshop on Network-Aware
Data Management, {NDM} '14, New Orleans, Louisiana, USA, November
16-21, 2014},
pages = {9--15},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/NDM.2014.10},
doi = {10.1109/NDM.2014.10},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/HanfordAFGBPT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:series/synthesis/2013Nitta,
author = {Christopher Nitta and
Matthew K. Farrens},
title = {Photonic Interconnects: {A} Computer Architect's Perspective},
series = {Synthesis Lectures on Computer Architecture},
publisher = {Morgan {\&} Claypool Publishers},
year = {2013},
url = {https://doi.org/10.2200/S00537ED1V01Y201309CAC027},
doi = {10.2200/S00537ED1V01Y201309CAC027},
isbn = {9781627052115},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/series/synthesis/2013Nitta.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/HanfordABFGPT13,
author = {Nathan Hanford and
Vishal Ahuja and
Mehmet Balman and
Matthew K. Farrens and
Dipak Ghosal and
Eric Pouyoul and
Brian Tierney},
editor = {Mehmet Balman and
Surendra Byna and
Brian L. Tierney},
title = {Characterizing the impact of end-system affinities on the end-to-end
performance of high-speed flows},
booktitle = {Proceedings of the Third International Workshop on Network-Aware Data
Management, {NDM} 2013, Denver, Colorado, USA, November 17-21, 2013},
pages = {1:1--1:10},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2534695.2534697},
doi = {10.1145/2534695.2534697},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sc/HanfordABFGPT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2013,
editor = {Matthew K. Farrens and
Christos Kozyrakis},
title = {The 46th Annual {IEEE/ACM} International Symposium on Microarchitecture,
MICRO-46, Davis, CA, USA, December 7-11, 2013},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2540708},
doi = {10.1145/2540708},
isbn = {978-1-4503-2638-4},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/2013.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esticas/NittaFA12,
author = {Christopher Nitta and
Matthew K. Farrens and
Venkatesh Akella},
title = {{DCOF} - An Arbitration Free Directly Connected Optical Fabric},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {2},
number = {2},
pages = {169--182},
year = {2012},
url = {https://doi.org/10.1109/JETCAS.2012.2193842},
doi = {10.1109/JETCAS.2012.2193842},
timestamp = {Tue, 06 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esticas/NittaFA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/AhujaFG12,
author = {Vishal Ahuja and
Matthew K. Farrens and
Dipak Ghosal},
editor = {Tilman Wolf and
Andrew W. Moore and
Viktor K. Prasanna},
title = {Cache-aware affinitization on commodity multicores for high-speed
network flows},
booktitle = {Symposium on Architecture for Networking and Communications Systems,
{ANCS} '12, Austin, TX, {USA} - October 29 - 30, 2012},
pages = {39--48},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2396556.2396564},
doi = {10.1145/2396556.2396564},
timestamp = {Sun, 08 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ancs/AhujaFG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccgrid/AhujaGF12,
author = {Vishal Ahuja and
Dipak Ghosal and
Matthew K. Farrens},
title = {Minimizing the Data Transfer Time Using Multicore End-System Aware
Flow Bifurcation},
booktitle = {12th {IEEE/ACM} International Symposium on Cluster, Cloud and Grid
Computing, CCGrid 2012, Ottawa, Canada, May 13-16, 2012},
pages = {595--602},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/CCGrid.2012.54},
doi = {10.1109/CCGRID.2012.54},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ccgrid/AhujaGF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/NittaFA12,
author = {Christopher Nitta and
Matthew K. Farrens and
Venkatesh Akella},
title = {{DCAF} - {A} Directly Connected Arbitration-Free Photonic Crossbar
for Energy-Efficient High Performance Computing},
booktitle = {26th {IEEE} International Parallel and Distributed Processing Symposium,
{IPDPS} 2012, Shanghai, China, May 21-25, 2012},
pages = {1144--1155},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/IPDPS.2012.105},
doi = {10.1109/IPDPS.2012.105},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/NittaFA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/NittaFA11,
author = {Christopher Nitta and
Matthew K. Farrens and
Venkatesh Akella},
title = {Addressing system-level trimming issues in on-chip nanophotonic networks},
booktitle = {17th International Conference on High-Performance Computer Architecture
{(HPCA-17} 2011), February 12-16 2011, San Antonio, Texas, {USA}},
pages = {122--131},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/HPCA.2011.5749722},
doi = {10.1109/HPCA.2011.5749722},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/NittaFA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpdc/AhujaBFGS11,
author = {Vishal Ahuja and
Amitabha Banerjee and
Matthew K. Farrens and
Dipak Ghosal and
Giuseppe Serazzi},
editor = {Arthur B. Maccabe and
Douglas Thain},
title = {Introspective end-system modeling to optimize the transfer time of
rate based protocols},
booktitle = {Proceedings of the 20th {ACM} International Symposium on High Performance
Distributed Computing, {HPDC} 2011, San Jose, CA, USA, June 8-11,
2011},
pages = {61--72},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/1996130.1996140},
doi = {10.1145/1996130.1996140},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpdc/AhujaBFGS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/NittaFA11,
author = {Christopher Nitta and
Matthew K. Farrens and
Venkatesh Akella},
editor = {Carlo Galuzzi and
Luigi Carro and
Andreas Moshovos and
Milos Prvulovic},
title = {Resilient microring resonator based photonic networks},
booktitle = {44rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2011, Porto Alegre, Brazil, December 3-7, 2011},
pages = {95--104},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2155620.2155632},
doi = {10.1145/2155620.2155632},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/NittaFA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/NittaMFA11,
author = {Christopher Nitta and
Kevin Macdonald and
Matthew K. Farrens and
Venkatesh Akella},
editor = {Radu Marculescu and
Michael Kishinevsky and
Ran Ginosar and
Karam S. Chatha},
title = {Inferring packet dependencies to improve trace based simulation of
on-chip networks},
booktitle = {{NOCS} 2011, Fifth {ACM/IEEE} International Symposium on Networks-on-Chip,
Pittsburgh, Pennsylvania, USA, May 1-4, 2011},
pages = {153--160},
publisher = {{ACM/IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1145/1999946.1999971},
doi = {10.1145/1999946.1999971},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nocs/NittaMFA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/MejiaAFA10,
author = {Paul Vincent Mejia and
Rajeevan Amirtharajah and
Matthew K. Farrens and
Venkatesh Akella},
title = {Performance Evaluation of a Multicore System with Optically Connected
Memory Modules},
booktitle = {{NOCS} 2010, Fourth {ACM/IEEE} International Symposium on Networks-on-Chip,
Grenoble, France, May 3-6, 2010},
pages = {215--222},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NOCS.2010.31},
doi = {10.1109/NOCS.2010.31},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nocs/MejiaAFA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/CongdonFM08,
author = {Paul Congdon and
Matthew K. Farrens and
Prasant Mohapatra},
editor = {Mark A. Franklin and
Dhabaleswar K. Panda and
Dimitrios Stiliadis},
title = {Packet prediction for speculative cut-through switching},
booktitle = {Proceedings of the 2008 {ACM/IEEE} Symposium on Architecture for Networking
and Communications Systems, {ANCS} 2008, San Jose, California, USA,
November 6-7, 2008},
pages = {99--108},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1477942.1477957},
doi = {10.1145/1477942.1477957},
timestamp = {Thu, 10 Jun 2021 11:42:07 +0200},
biburl = {https://dblp.org/rec/conf/ancs/CongdonFM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HadkeBAFA08,
author = {Amit Hadke and
Tony Benavides and
Rajeevan Amirtharajah and
Matthew K. Farrens and
Venkatesh Akella},
title = {Design and evaluation of an optical {CPU-DRAM} interconnect},
booktitle = {26th International Conference on Computer Design, {ICCD} 2008, 12-15
October 2008, Lake Tahoe, CA, USA, Proceedings},
pages = {492--497},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICCD.2008.4751906},
doi = {10.1109/ICCD.2008.4751906},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HadkeBAFA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/NittaF08,
author = {Christopher Nitta and
Matthew K. Farrens},
title = {Techniques for increasing effective data bandwidth},
booktitle = {26th International Conference on Computer Design, {ICCD} 2008, 12-15
October 2008, Lake Tahoe, CA, USA, Proceedings},
pages = {514--519},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICCD.2008.4751909},
doi = {10.1109/ICCD.2008.4751909},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/NittaF08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jilp/OskinCF02,
author = {Mark Oskin and
Frederic T. Chong and
Matthew K. Farrens},
title = {Using Statistical and Symbolic Simulation for Microprocessor Performance
Evaluation},
journal = {J. Instr. Level Parallelism},
volume = {4},
year = {2002},
url = {http://www.jilp.org/vol4/v4paper2.pdf},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jilp/OskinCF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jilp/LeeTF01,
author = {Hsien{-}Hsin S. Lee and
Gary S. Tyson and
Matthew K. Farrens},
title = {Improving Bandwidth Utilization using Eager Writeback},
journal = {J. Instr. Level Parallelism},
volume = {3},
year = {2001},
url = {http://www.jilp.org/vol3/lee-jilp.pdf},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jilp/LeeTF01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/RichF00,
author = {Kevin D. Rich and
Matthew K. Farrens},
editor = {Arndt Bode and
Thomas Ludwig and
Wolfgang Karl and
Roland Wism{\"{u}}ller},
title = {The Decoupled-Style Prefetch Architecture (Research Note)},
booktitle = {Euro-Par 2000, Parallel Processing, 6th International Euro-Par Conference,
Munich, Germany, August 29 - September 1, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1900},
pages = {989--993},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44520-X\_140},
doi = {10.1007/3-540-44520-X\_140},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/RichF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/RichF00a,
author = {Kevin D. Rich and
Matthew K. Farrens},
editor = {Arndt Bode and
Thomas Ludwig and
Wolfgang Karl and
Roland Wism{\"{u}}ller},
title = {Code Partitioning in Decoupled Compilers},
booktitle = {Euro-Par 2000, Parallel Processing, 6th International Euro-Par Conference,
Munich, Germany, August 29 - September 1, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1900},
pages = {1008--1017},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44520-X\_143},
doi = {10.1007/3-540-44520-X\_143},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/europar/RichF00a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/HaungsSF00,
author = {Michael Haungs and
Phil Sallee and
Matthew K. Farrens},
title = {Branch Transition Rate: {A} New Metric for Improved Branch Classification
Analysis},
booktitle = {Proceedings of the Sixth International Symposium on High-Performance
Computer Architecture, Toulouse, France, January 8-12, 2000},
pages = {241--250},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/HPCA.2000.824354},
doi = {10.1109/HPCA.2000.824354},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/HaungsSF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/OskinCF00,
author = {Mark Oskin and
Frederic T. Chong and
Matthew K. Farrens},
editor = {Alan D. Berenbaum and
Joel S. Emer},
title = {{HLS:} combining statistical and symbolic simulation to guide microprocessor
designs},
booktitle = {27th International Symposium on Computer Architecture {(ISCA} 2000),
June 10-14, 2000, Vancouver, BC, Canada},
pages = {71--82},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ISCA.2000.854379},
doi = {10.1109/ISCA.2000.854379},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/OskinCF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LeeTF00,
author = {Hsien{-}Hsin S. Lee and
Gary S. Tyson and
Matthew K. Farrens},
editor = {Andrew Wolfe and
Michael S. Schlansker},
title = {Eager writeback - a technique for improving bandwidth utilization},
booktitle = {Proceedings of the 33rd Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 33, Monterey, California, USA, December
10-13, 2000},
pages = {11--21},
publisher = {{ACM/IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/MICRO.2000.898054},
doi = {10.1109/MICRO.2000.898054},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/LeeTF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/OskinHKCFC99,
author = {Mark Oskin and
Justin Hensley and
Diana Keen and
Frederic T. Chong and
Matthew K. Farrens and
Aneet Chopra},
editor = {Ronny Ronen and
Matthew K. Farrens and
Ilan Y. Spillinger},
title = {Exploiting {ILP} in Page-based Intelligent Memory},
booktitle = {Proceedings of the 32nd Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 32, Haifa, Israel, November 16-18, 1999},
pages = {208--218},
publisher = {{ACM/IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/MICRO.1999.809459},
doi = {10.1109/MICRO.1999.809459},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/OskinHKCFC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/1999,
editor = {Ronny Ronen and
Matthew K. Farrens and
Ilan Y. Spillinger},
title = {Proceedings of the 32nd Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 32, Haifa, Israel, November 16-18, 1999},
publisher = {{ACM/IEEE} Computer Society},
year = {1999},
url = {https://ieeexplore.ieee.org/xpl/conhome/6577/proceeding},
isbn = {0-7695-0437-X},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/1999.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/RiversTTDF98,
author = {Jude A. Rivers and
Edward S. Tam and
Gary S. Tyson and
Edward S. Davidson and
Matthew K. Farrens},
editor = {Greg K. Egan and
Richard P. Brent and
Dennis Gannon},
title = {Utilizing Reuse Information in Data Cache Management},
booktitle = {Proceedings of the 12th international conference on Supercomputing,
{ICS} 1998, Melbourne, Australia, July 13-17, 1998},
pages = {449--456},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/277830.277941},
doi = {10.1145/277830.277941},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/RiversTTDF98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcae/Farrens98,
author = {Matthew K. Farrens},
title = {The architecture curriculum at UC-Davis},
booktitle = {Proceedings of the 1998 workshop on Computer architecture education,
WCAE@ISCA 1998, Barcelona, Spain, June 1998},
pages = {25},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/1275182.1275207},
doi = {10.1145/1275182.1275207},
timestamp = {Tue, 06 Nov 2018 16:57:55 +0100},
biburl = {https://dblp.org/rec/conf/wcae/Farrens98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/TysonFMP97,
author = {Gary S. Tyson and
Matthew K. Farrens and
John Matthews and
Andrew R. Pleszkun},
title = {Managing data caches using selective cache line replacement},
journal = {Int. J. Parallel Program.},
volume = {25},
number = {3},
pages = {213--242},
year = {1997},
url = {https://doi.org/10.1007/BF02700036},
doi = {10.1007/BF02700036},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/TysonFMP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/csur/Farrens96,
author = {Matthew K. Farrens},
title = {Distributed Decentralized Computing},
journal = {{ACM} Comput. Surv.},
volume = {28},
number = {4es},
pages = {28},
year = {1996},
url = {https://doi.org/10.1145/242224.242259},
doi = {10.1145/242224.242259},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/csur/Farrens96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/FarrensH96,
author = {Matthew K. Farrens and
Wen{-}mei W. Hwu},
title = {Guest Editors' Introduction},
journal = {Int. J. Parallel Program.},
volume = {24},
number = {1},
pages = {1--2},
year = {1996},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/FarrensH96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/TysonF96,
author = {Gary S. Tyson and
Matthew K. Farrens},
title = {Evaluating the Effects of Predicated Execution on Branch Prediction},
journal = {Int. J. Parallel Program.},
volume = {24},
number = {2},
pages = {159--186},
year = {1996},
url = {https://doi.org/10.1007/bf03356746},
doi = {10.1007/BF03356746},
timestamp = {Fri, 10 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/TysonF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/TysonFMP95,
author = {Gary S. Tyson and
Matthew K. Farrens and
John Matthews and
Andrew R. Pleszkun},
editor = {Trevor N. Mudge and
Kemal Ebcioglu},
title = {A modified approach to data cache management},
booktitle = {Proceedings of the 28th Annual International Symposium on Microarchitecture,
Ann Arbor, Michigan, USA, November 29 - December 1, 1995},
pages = {93--103},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/MICRO.1995.476816},
doi = {10.1109/MICRO.1995.476816},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/TysonFMP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/TysonF94,
author = {Gary S. Tyson and
Matthew K. Farrens},
title = {Code scheduling for multiple instruction stream architectures},
journal = {Int. J. Parallel Program.},
volume = {22},
number = {3},
pages = {243--272},
year = {1994},
url = {https://doi.org/10.1007/BF02577734},
doi = {10.1007/BF02577734},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/TysonF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FarrensTP94,
author = {Matthew K. Farrens and
Gary S. Tyson and
Andrew R. Pleszkun},
editor = {David A. Patterson},
title = {A Study of Single-Chip Processor/Cache Organizations for Large Numbers
of Transistors},
booktitle = {Proceedings of the 21st Annual International Symposium on Computer
Architecture. Chicago, IL, USA, April 1994},
pages = {338--347},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ISCA.1994.288137},
doi = {10.1109/ISCA.1994.288137},
timestamp = {Thu, 13 Apr 2023 19:55:42 +0200},
biburl = {https://dblp.org/rec/conf/isca/FarrensTP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/1994,
editor = {Hans Mulder and
Matthew K. Farrens},
title = {Proceedings of the 27th Annual International Symposium on Microarchitecture,
San Jose, California, USA, November 30 - December 2, 1994},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1994},
url = {https://ieeexplore.ieee.org/xpl/conhome/5811/proceeding},
isbn = {0-89791-707-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/1994.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/FarrensNN93,
author = {Matthew K. Farrens and
Pius Ng and
Phil Nico},
editor = {Andrew Wolfe and
William H. Mangione{-}Smith},
title = {A comparision of superscalar and decoupled access/execute architectures},
booktitle = {Proceedings of the 26th Annual International Symposium on Microarchitecture,
Austin, Texas, USA, November 1993},
pages = {100--103},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/MICRO.1993.282746},
doi = {10.1109/MICRO.1993.282746},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/FarrensNN93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/TysonF93,
author = {Gary S. Tyson and
Matthew K. Farrens},
editor = {Andrew Wolfe and
William H. Mangione{-}Smith},
title = {Techniques for extracting instruction level parallelism on {MIMD}
architectures},
booktitle = {Proceedings of the 26th Annual International Symposium on Microarchitecture,
Austin, Texas, USA, November 1993},
pages = {128--137},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/MICRO.1993.282749},
doi = {10.1109/MICRO.1993.282749},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/TysonF93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/FarrensPW92,
author = {Matthew K. Farrens and
Arvin Park and
Allison Woodruff},
editor = {Viktor K. Prasanna and
Larry H. Canter},
title = {{CCHIME:} {A} Cache Coherent Hybrid Interconnected Memory Extension},
booktitle = {Proceedings of the 6th International Parallel Processing Symposium,
Beverly Hills, CA, USA, March 1992},
pages = {573--577},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IPPS.1992.222965},
doi = {10.1109/IPPS.1992.222965},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/FarrensPW92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FarrensPFNT92,
author = {Matthew K. Farrens and
Arvin Park and
Rob Fanfelle and
Pius Ng and
Gary S. Tyson},
editor = {Allan Gottlieb},
title = {A partitioned translation lookaside buffer approach to reducing address
bandwith},
booktitle = {Proceedings of the 19th Annual International Symposium on Computer
Architecture. Gold Coast, Australia, May 1992},
pages = {435},
publisher = {{ACM}},
year = {1992},
url = {https://doi.org/10.1145/146628.140546},
doi = {10.1145/146628.140546},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/FarrensPFNT92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/TysonFP92,
author = {Gary S. Tyson and
Matthew K. Farrens and
Andrew R. Pleszkun},
editor = {Wen{-}mei W. Hwu},
title = {{MISC:} a Multiple Instruction Stream Computer},
booktitle = {Proceedings of the 25th Annual International Symposium on Microarchitecture,
Portland, Oregon, USA, November 1992},
pages = {193--196},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/MICRO.1992.697016},
doi = {10.1109/MICRO.1992.697016},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/TysonFP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/FarrensPT92,
author = {Matthew K. Farrens and
Arvin Park and
Gary S. Tyson},
editor = {Wen{-}mei W. Hwu},
title = {Modifying {VM} hardware to reduce address pin requirements},
booktitle = {Proceedings of the 25th Annual International Symposium on Microarchitecture,
Portland, Oregon, USA, November 1992},
pages = {210--213},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/MICRO.1992.697020},
doi = {10.1109/MICRO.1992.697020},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/FarrensPT92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/FarrensP91,
author = {Matthew K. Farrens and
Andrew R. Pleszkun},
title = {Implementation of the {PIPE} Processor},
journal = {Computer},
volume = {24},
number = {1},
pages = {65--69},
year = {1991},
url = {https://doi.org/10.1109/2.67195},
doi = {10.1109/2.67195},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/FarrensP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FarrensP91,
author = {Matthew K. Farrens and
Arvin Park},
editor = {Zvonko G. Vranesic},
title = {Dynamic Base Register Caching: {A} Technique for Reducing Address
Bus Width},
booktitle = {Proceedings of the 18th Annual International Symposium on Computer
Architecture. Toronto, Canada, May, 27-30 1991},
pages = {128--137},
publisher = {{ACM}},
year = {1991},
url = {https://doi.org/10.1145/115952.115966},
doi = {10.1145/115952.115966},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/FarrensP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FarrensP91a,
author = {Matthew K. Farrens and
Andrew R. Pleszkun},
editor = {Zvonko G. Vranesic},
title = {Strategies for Achieving Improved Processor Throughput},
booktitle = {Proceedings of the 18th Annual International Symposium on Computer
Architecture. Toronto, Canada, May, 27-30 1991},
pages = {362--369},
publisher = {{ACM}},
year = {1991},
url = {https://doi.org/10.1145/115952.115988},
doi = {10.1145/115952.115988},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/FarrensP91a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/BeckerPF91,
author = {Jeffrey C. Becker and
Arvin Park and
Matthew K. Farrens},
editor = {Yashwant K. Malaiya},
title = {An Analysis of the Information Content of Address Reference Streams},
booktitle = {Proceedings of the 24th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 24, Albuquerque, New Mexico, USA, November
18-20, 1991},
pages = {19--24},
publisher = {{ACM/IEEE}},
year = {1991},
url = {https://doi.org/10.1145/123465.123470},
doi = {10.1145/123465.123470},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/BeckerPF91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/FarrensP91,
author = {Matthew K. Farrens and
Arvin Park},
editor = {Yashwant K. Malaiya},
title = {Workload and Implementation Considerations for Dynamic Base Register
Caching},
booktitle = {Proceedings of the 24th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 24, Albuquerque, New Mexico, USA, November
18-20, 1991},
pages = {62--68},
publisher = {{ACM/IEEE}},
year = {1991},
url = {https://doi.org/10.1145/123465.123476},
doi = {10.1145/123465.123476},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/FarrensP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/FarrensWW91,
author = {Matthew K. Farrens and
Brad Wetmore and
Allison Woodruff},
editor = {Joanne L. Martin},
title = {Alleviation of tree saturation in multistage interconnection networks},
booktitle = {Proceedings Supercomputing '91, Albuquerque, NM, USA, November 18-22,
1991},
pages = {400--409},
publisher = {{ACM}},
year = {1991},
url = {https://doi.org/10.1145/125826.126047},
doi = {10.1145/125826.126047},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/sc/FarrensWW91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ParkF90,
author = {Arvin Park and
Matthew K. Farrens},
editor = {Christos A. Papachristou and
Vicki H. Allan},
title = {Address compression through base register caching},
booktitle = {Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming
and Microarchitecture, 1990, Orlando, Florida, USA, November 27-29,
1990},
pages = {193--199},
publisher = {{ACM/IEEE}},
year = {1990},
url = {https://dl.acm.org/citation.cfm?id=255274},
timestamp = {Wed, 13 Feb 2019 11:42:26 +0100},
biburl = {https://dblp.org/rec/conf/micro/ParkF90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/FarrensP90,
author = {Matthew K. Farrens and
Andrew R. Pleszkun},
editor = {Christos A. Papachristou and
Vicki H. Allan},
title = {An evaluation of functional unit lengths for single-chip processors},
booktitle = {Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming
and Microarchitecture, 1990, Orlando, Florida, USA, November 27-29,
1990},
pages = {209--215},
publisher = {{ACM/IEEE}},
year = {1990},
url = {https://dl.acm.org/citation.cfm?id=255278},
timestamp = {Wed, 28 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/FarrensP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FarrensP89,
author = {Matthew K. Farrens and
Andrew R. Pleszkun},
editor = {Jean{-}Claude Syre},
title = {Improving Performance of Small On-Chip Instruction Caches},
booktitle = {Proceedings of the 16th Annual International Symposium on Computer
Architecture. Jerusalem, Israel, June 1989},
pages = {234--241},
publisher = {{ACM}},
year = {1989},
url = {https://doi.org/10.1145/74925.74952},
doi = {10.1145/74925.74952},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/FarrensP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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