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ORCIDBibTeX records: Matthias Jung 0001
@article{DBLP:journals/ijpp/OrailogluRJ24,
author = {Alex Orailoglu and
Marc Reichenbach and
Matthias Jung},
title = {Special Issue on {SAMOS} 2022},
journal = {Int. J. Parallel Program.},
volume = {52},
number = {1},
pages = {1--2},
year = {2024},
url = {https://doi.org/10.1007/s10766-024-00765-0},
doi = {10.1007/S10766-024-00765-0},
timestamp = {Thu, 04 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/OrailogluRJ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rapido/2024,
editor = {Lilia Zaourar and
Daniel Chillet and
Daniel Gracia P{\'{e}}rez and
Morteza Biglari{-}Abhari and
R{\'{e}}da Nouacer and
Matthias Jung and
Gianluca Palermo},
title = {Proceedings of the 16th Workshop on Rapid Simulation and Performance
Evaluation for Design, {RAPIDO} 2024, Munich, Germany, 18 January
2024},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3642921},
doi = {10.1145/3642921},
timestamp = {Fri, 12 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rapido/2024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2403-12998,
author = {Matthias Jung and
Sven O. Krumke and
Christof Schroth and
Elisabeth Lobe and
Wolfgang Mauerer},
title = {{QCEDA:} Using Quantum Computers for {EDA}},
journal = {CoRR},
volume = {abs/2403.12998},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2403.12998},
doi = {10.48550/ARXIV.2403.12998},
eprinttype = {arXiv},
eprint = {2403.12998},
timestamp = {Thu, 11 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2403-12998.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/SteinerDS0W23,
author = {Lukas Steiner and
Gustavo Delazeri and
Iron Prando da Silva and
Matthias Jung and
Norbert Wehn},
title = {Automatic {DRAM} Subsystem Configuration with irace},
booktitle = {Proceedings of the DroneSE and {RAPIDO:} System Engineering for constrained
embedded systems, {RAPIDO} 2023, Toulouse, France, January 17-18,
2023},
pages = {66--72},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3579170.3579259},
doi = {10.1145/3579170.3579259},
timestamp = {Sat, 29 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hipeac/SteinerDS0W23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/FeldmannSCP0W23,
author = {Johannes Feldmann and
Lukas Steiner and
Derek Christ and
Thomas Psota and
Matthias Jung and
Norbert Wehn},
title = {A Precise Measurement Platform for {LPDDR4} Memories},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2023, Alexandria, VA, USA, October 2-5, 2023},
pages = {17:1--17:8},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3631882.3631899},
doi = {10.1145/3631882.3631899},
timestamp = {Mon, 15 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/FeldmannSCP0W23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esticas/SudarshanSLWSJG22,
author = {Chirag Sudarshan and
Taha Soliman and
Jan Lappas and
Christian Weis and
Mohammad Hassani Sadi and
Matthias Jung and
Andre Guntoro and
Norbert Wehn},
title = {A Weighted Current Summation Based Mixed Signal {DRAM-PIM} Architecture
for Deep Neural Network Inference},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {12},
number = {2},
pages = {367--380},
year = {2022},
url = {https://doi.org/10.1109/JETCAS.2022.3170235},
doi = {10.1109/JETCAS.2022.3170235},
timestamp = {Tue, 28 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esticas/SudarshanSLWSJG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/ReichenbachJO22,
author = {Marc Reichenbach and
Matthias Jung and
Alex Orailoglu},
title = {Guest Editorial: Special Issue on 2020 {IEEE} International Conference
on Embedded Computer Systems: Architectures, Modeling and Simulation
{(SAMOS} 2020)},
journal = {Int. J. Parallel Program.},
volume = {50},
number = {2},
pages = {187--188},
year = {2022},
url = {https://doi.org/10.1007/s10766-022-00732-7},
doi = {10.1007/S10766-022-00732-7},
timestamp = {Thu, 12 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/ReichenbachJO22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/SteinerJPBW22,
author = {Lukas Steiner and
Matthias Jung and
Felipe S. Prado and
Kirill Bykov and
Norbert Wehn},
title = {DRAMSys4.0: An Open-Source Simulation Framework for In-depth {DRAM}
Analyses},
journal = {Int. J. Parallel Program.},
volume = {50},
number = {2},
pages = {217--242},
year = {2022},
url = {https://doi.org/10.1007/s10766-022-00727-4},
doi = {10.1007/S10766-022-00727-4},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/SteinerJPBW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/SteinerS0SW22,
author = {Lukas Steiner and
Chirag Sudarshan and
Matthias Jung and
Dominik Stoffel and
Norbert Wehn},
editor = {Bruce L. Jacob},
title = {A Framework for Formal Verification of {DRAM} Controllers},
booktitle = {Proceedings of the 2022 International Symposium on Memory Systems,
{MEMSYS} 2022, Washington, DC, USA, October 3-6, 2022},
pages = {6:1--6:7},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565053.3565059},
doi = {10.1145/3565053.3565059},
timestamp = {Sat, 14 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/SteinerS0SW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/Steiner0HW22,
author = {Lukas Steiner and
Matthias Jung and
Michael Huonker and
Norbert Wehn},
editor = {Bruce L. Jacob},
title = {Unveiling the Real Performance of {LPDDR5} Memories},
booktitle = {Proceedings of the 2022 International Symposium on Memory Systems,
{MEMSYS} 2022, Washington, DC, USA, October 3-6, 2022},
pages = {9:1--9:3},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565053.3565062},
doi = {10.1145/3565053.3565062},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/Steiner0HW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/UeckerJ22,
author = {Denis Uecker and
Matthias Jung},
editor = {Alex Orailoglu and
Marc Reichenbach and
Matthias Jung},
title = {Split'n'Cover: {ISO} 26262 Hardware Safety Analysis with SystemC},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 22nd International Conference, {SAMOS} 2022, Samos, Greece, July
3-7, 2022, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {13511},
pages = {74--89},
publisher = {Springer},
year = {2022},
url = {https://doi.org/10.1007/978-3-031-15074-6\_5},
doi = {10.1007/978-3-031-15074-6\_5},
timestamp = {Thu, 25 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/UeckerJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2021,
editor = {Alex Orailoglu and
Matthias Jung and
Marc Reichenbach},
title = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 21st International Conference, {SAMOS} 2021, Virtual Event, July
4-8, 2021, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {13227},
publisher = {Springer},
year = {2022},
url = {https://doi.org/10.1007/978-3-031-04580-6},
doi = {10.1007/978-3-031-04580-6},
isbn = {978-3-031-04579-0},
timestamp = {Fri, 29 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/2021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2022,
editor = {Alex Orailoglu and
Marc Reichenbach and
Matthias Jung},
title = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 22nd International Conference, {SAMOS} 2022, Samos, Greece, July
3-7, 2022, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {13511},
publisher = {Springer},
year = {2022},
url = {https://doi.org/10.1007/978-3-031-15074-6},
doi = {10.1007/978-3-031-15074-6},
isbn = {978-3-031-15073-9},
timestamp = {Fri, 19 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/2022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2209-14021,
author = {Lukas Steiner and
Chirag Sudarshan and
Matthias Jung and
Dominik Stoffel and
Norbert Wehn},
title = {A Framework for Formal Verification of {DRAM} Controllers},
journal = {CoRR},
volume = {abs/2209.14021},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2209.14021},
doi = {10.48550/ARXIV.2209.14021},
eprinttype = {arXiv},
eprint = {2209.14021},
timestamp = {Thu, 06 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2209-14021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2209-14756,
author = {Lukas Steiner and
Matthias Jung and
Michael Huonker and
Norbert Wehn},
title = {Unveiling the Real Performance of {LPDDR5} Memories},
journal = {CoRR},
volume = {abs/2209.14756},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2209.14756},
doi = {10.48550/ARXIV.2209.14756},
eprinttype = {arXiv},
eprint = {2209.14756},
timestamp = {Thu, 06 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2209-14756.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/SudarshanSJLWW21,
author = {Chirag Sudarshan and
Lukas Steiner and
Matthias Jung and
Jan Lappas and
Christian Weis and
Norbert Wehn},
title = {A Novel {DRAM} Architecture for Improved Bandwidth Utilization and
Latency Reduction Using Dual-Page Operation},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {68},
number = {5},
pages = {1615--1619},
year = {2021},
url = {https://doi.org/10.1109/TCSII.2021.3068007},
doi = {10.1109/TCSII.2021.3068007},
timestamp = {Sun, 16 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasII/SudarshanSJLWW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SudarshanSPWE0W21,
author = {Chirag Sudarshan and
Taha Soliman and
Cecilia De la Parra and
Christian Weis and
Leonardo Ecco and
Matthias Jung and
Norbert Wehn and
Andre Guntoro},
title = {A Novel DRAM-Based Process-in-Memory Architecture and its Implementation
for CNNs},
booktitle = {{ASPDAC} '21: 26th Asia and South Pacific Design Automation Conference,
Tokyo, Japan, January 18-21, 2021},
pages = {35--42},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3394885.3431522},
doi = {10.1145/3394885.3431522},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SudarshanSPWE0W21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/birthday/0001WW21,
author = {Matthias Jung and
Christian Weis and
Norbert Wehn},
editor = {Jian{-}Jia Chen},
title = {The Dynamic Random Access Memory Challenge in Embedded Computing Systems},
booktitle = {A Journey of Embedded and Cyber-Physical Systems - Essays Dedicated
to Peter Marwedel on the Occasion of His 70th Birthday},
pages = {19--36},
publisher = {Springer},
year = {2021},
url = {https://doi.org/10.1007/978-3-030-47487-4\_3},
doi = {10.1007/978-3-030-47487-4\_3},
timestamp = {Fri, 14 May 2021 08:34:22 +0200},
biburl = {https://dblp.org/rec/conf/birthday/0001WW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/Steiner0W21,
author = {Lukas Steiner and
Matthias Jung and
Norbert Wehn},
title = {Exploration of {DDR5} with the Open-Source Simulator DRAMSys},
booktitle = {Methods and Description Languages for Modelling and Verification of
Circuits and Systems, {MBMV} 2021, 24th Workshop, Virtual Event, Germany,
March 18-19, 2021},
pages = {1--11},
publisher = {{VDE/IEEE}},
year = {2021},
url = {https://ieeexplore.ieee.org/document/9399718},
timestamp = {Fri, 12 Jan 2024 10:19:10 +0100},
biburl = {https://dblp.org/rec/conf/mbmv/Steiner0W21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/VasanZW0W21,
author = {L. J. Gokul Vasan and
{\'{E}}der F. Zulian and
Christian Weis and
Matthias Jung and
Norbert Wehn},
title = {Online Working Set Change Detection with Constant Complexity: The
Cornerstone for Memory Management Algorithms in Scalable Systems},
booktitle = {{MEMSYS} 2021: The International Symposium on Memory Systems, Washington,
USA, September 27 - 30, 2021},
pages = {11:1--11:16},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3488423.3519332},
doi = {10.1145/3488423.3519332},
timestamp = {Mon, 16 May 2022 16:50:26 +0200},
biburl = {https://dblp.org/rec/conf/memsys/VasanZW0W21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/SteinerKU0HW21,
author = {Lukas Steiner and
Kira Kraft and
Denis Uecker and
Matthias Jung and
Michael Huonker and
Norbert Wehn},
title = {An {LPDDR4} Safety Model for Automotive Applications},
booktitle = {{MEMSYS} 2021: The International Symposium on Memory Systems, Washington,
USA, September 27 - 30, 2021},
pages = {12:1--12:9},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3488423.3519333},
doi = {10.1145/3488423.3519333},
timestamp = {Mon, 16 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/SteinerKU0HW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/AichrothAGGJJKK21,
author = {Patrick Aichroth and
Christoph Antes and
Pierre Gembatzka and
Holger Graf and
David S. Johnson and
Matthias Jung and
Thomas K{\"{a}}mpfe and
Thomas Kleinberger and
Thomas K{\"{o}}llmer and
Thomas Kuhn and
Christoph Kutter and
Jens Kr{\"{u}}ger and
Dominik Marek Loroch and
Hanna M. Lukashevich and
Nellie Laleni and
Lei Zhang and
Johannes Leugering and
Rodrigo Mart{\'{\i}}n Fern{\'{a}}ndez and
Loreto Mateu and
Shaown Mojumder and
Benjamin Prautsch and
Ferdinand Pscheidl and
Karsten Roscher and
S{\"{o}}ren Schneickert and
Frank Vanselow and
Paul Wallbott and
Oliver Walter and
Nico Weber},
editor = {Alex Orailoglu and
Matthias Jung and
Marc Reichenbach},
title = {SEC-Learn: Sensor Edge Cloud for Federated Learning - Invited Paper},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 21st International Conference, {SAMOS} 2021, Virtual Event, July
4-8, 2021, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {13227},
pages = {432--448},
publisher = {Springer},
year = {2021},
url = {https://doi.org/10.1007/978-3-031-04580-6\_29},
doi = {10.1007/978-3-031-04580-6\_29},
timestamp = {Wed, 08 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/samos/AichrothAGGJJKK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/StathisSYJWHLW20,
author = {Dimitrios Stathis and
Chirag Sudarshan and
Yu Yang and
Matthias Jung and
Christian Weis and
Ahmed Hemani and
Anders Lansner and
Norbert Wehn},
title = {eBrainII: a 3 kW Realtime Custom 3D {DRAM} Integrated {ASIC} Implementation
of a Biologically Plausible Model of a Human Scale Cortex},
journal = {J. Signal Process. Syst.},
volume = {92},
number = {11},
pages = {1323--1343},
year = {2020},
url = {https://doi.org/10.1007/s11265-020-01562-x},
doi = {10.1007/S11265-020-01562-X},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/StathisSYJWHLW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/FeldmannKSW020,
author = {Johannes Feldmann and
Kira Kraft and
Lukas Steiner and
Norbert Wehn and
Matthias Jung},
title = {Fast and Accurate {DRAM} Simulation: Can we Further Accelerate it?},
booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
pages = {364--369},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/DATE48585.2020.9116275},
doi = {10.23919/DATE48585.2020.9116275},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/FeldmannKSW020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/MathewPZWG0W20,
author = {Deepak M. Mathew and
Felipe S. Prado and
{\'{E}}der F. Zulian and
Christian Weis and
Muhammad Mohsin Ghaffar and
Matthias Jung and
Norbert Wehn},
title = {An Energy Efficient 3D-Heterogeneous Main Memory Architecture for
Mobile Devices},
booktitle = {{MEMSYS} 2020: The International Symposium on Memory Systems, Washington,
DC, USA, September, 2020},
pages = {114--125},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3422575.3422786},
doi = {10.1145/3422575.3422786},
timestamp = {Fri, 09 Apr 2021 13:11:20 +0200},
biburl = {https://dblp.org/rec/conf/memsys/MathewPZWG0W20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/GhaffarSW0W20,
author = {Muhammad Mohsin Ghaffar and
Chirag Sudarshan and
Christian Weis and
Matthias Jung and
Norbert Wehn},
title = {A Low Power In-DRAM Architecture for Quantized CNNs using Fast Winograd
Convolutions},
booktitle = {{MEMSYS} 2020: The International Symposium on Memory Systems, Washington,
DC, USA, September, 2020},
pages = {158--168},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3422575.3422790},
doi = {10.1145/3422575.3422790},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/GhaffarSW0W20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/Natale0KLFSWKW20,
author = {Marco V. Natale and
Matthias Jung and
Kira Kraft and
Frederik Lauer and
Johannes Feldmann and
Chirag Sudarshan and
Christian Weis and
Sven Oliver Krumke and
Norbert Wehn},
title = {Efficient Generation of Application Specific Memory Controllers},
booktitle = {{MEMSYS} 2020: The International Symposium on Memory Systems, Washington,
DC, USA, September, 2020},
pages = {233--247},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3422575.3422796},
doi = {10.1145/3422575.3422796},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/Natale0KLFSWKW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rapido/ZulianHW0W20,
author = {{\'{E}}der F. Zulian and
Germain Haugou and
Christian Weis and
Matthias Jung and
Norbert Wehn},
title = {System simulation with {PULP} virtual platform and SystemC},
booktitle = {Proceedings of the {RAPIDO} 2020 Workshop on Rapid Simulation and
Performance Evaluation: Methods and Tools, Bologna, Italy, January,
2020},
pages = {2:1--2:7},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3375246.3375256},
doi = {10.1145/3375246.3375256},
timestamp = {Tue, 25 Apr 2023 14:37:52 +0200},
biburl = {https://dblp.org/rec/conf/rapido/ZulianHW0W20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/Steiner0PBW20,
author = {Lukas Steiner and
Matthias Jung and
Felipe S. Prado and
Kirill Bykov and
Norbert Wehn},
editor = {Alex Orailoglu and
Matthias Jung and
Marc Reichenbach},
title = {DRAMSys4.0: {A} Fast and Cycle-Accurate SystemC/TLM-Based {DRAM} Simulator},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 20th International Conference, {SAMOS} 2020, Samos, Greece, July
5-9, 2020, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {12471},
pages = {110--126},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-3-030-60939-9\_8},
doi = {10.1007/978-3-030-60939-9\_8},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/Steiner0PBW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2020,
editor = {Alex Orailoglu and
Matthias Jung and
Marc Reichenbach},
title = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 20th International Conference, {SAMOS} 2020, Samos, Greece, July
5-9, 2020, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {12471},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-3-030-60939-9},
doi = {10.1007/978-3-030-60939-9},
isbn = {978-3-030-60938-2},
timestamp = {Fri, 16 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/2020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2007-03152,
author = {Jason Lowe{-}Power and
Abdul Mutaal Ahmad and
Ayaz Akram and
Mohammad Alian and
Rico Amslinger and
Matteo Andreozzi and
Adri{\`{a}} Armejach and
Nils Asmussen and
Srikant Bharadwaj and
Gabe Black and
Gedare Bloom and
Bobby R. Bruce and
Daniel Rodrigues Carvalho and
Jer{\'{o}}nimo Castrill{\'{o}}n and
Lizhong Chen and
Nicolas Derumigny and
Stephan Diestelhorst and
Wendy Elsasser and
Marjan Fariborz and
Amin Farmahini Farahani and
Pouya Fotouhi and
Ryan Gambord and
Jayneel Gandhi and
Dibakar Gope and
Thomas Grass and
Bagus Hanindhito and
Andreas Hansson and
Swapnil Haria and
Austin Harris and
Timothy Hayes and
Adrian Herrera and
Matthew Horsnell and
Syed Ali Raza Jafri and
Radhika Jagtap and
Hanhwi Jang and
Reiley Jeyapaul and
Timothy M. Jones and
Matthias Jung and
Subash Kannoth and
Hamidreza Khaleghzadeh and
Yuetsu Kodama and
Tushar Krishna and
Tommaso Marinelli and
Christian Menard and
Andrea Mondelli and
Tiago M{\"{u}}ck and
Omar Naji and
Krishnendra Nathella and
Hoa Nguyen and
Nikos Nikoleris and
Lena E. Olson and
Marc S. Orr and
Binh Pham and
Pablo Prieto and
Trivikram Reddy and
Alec Roelke and
Mahyar Samani and
Andreas Sandberg and
Javier Setoain and
Boris Shingarov and
Matthew D. Sinclair and
Tuan Ta and
Rahul Thakur and
Giacomo Travaglini and
Michael Upton and
Nilay Vaish and
Ilias Vougioukas and
Zhengrong Wang and
Norbert Wehn and
Christian Weis and
David A. Wood and
Hongil Yoon and
{\'{E}}der F. Zulian},
title = {The gem5 Simulator: Version 20.0+},
journal = {CoRR},
volume = {abs/2007.03152},
year = {2020},
url = {https://arxiv.org/abs/2007.03152},
eprinttype = {arXiv},
eprint = {2007.03152},
timestamp = {Thu, 04 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2007-03152.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/0001SDKW19,
author = {Matthias Jung and
Frank Schnicke and
Markus Damm and
Thomas Kuhn and
Norbert Wehn},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {Speculative Temporal Decoupling Using fork()},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {1721--1726},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8714823},
doi = {10.23919/DATE.2019.8714823},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/0001SDKW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icppw/JahicK0WWK19,
author = {Jasmin Jahic and
Varun Kumar and
Matthias Jung and
Gerhard Wirrer and
Norbert Wehn and
Thomas Kuhn},
title = {Rapid Identification of Shared Memory in Multithreaded Embedded Systems
with Static Scheduling},
booktitle = {48th International Conference on Parallel Processing, {ICPP} 2019
Workshop Proceedings, Kyoto, Japan, August 05-08, 2019},
pages = {15:1--15:8},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339186.3339195},
doi = {10.1145/3339186.3339195},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icppw/JahicK0WWK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SudarshanLGRW0W19,
author = {Chirag Sudarshan and
Jan Lappas and
Muhammad Mohsin Ghaffar and
Vladimir Rybalkin and
Christian Weis and
Matthias Jung and
Norbert Wehn},
title = {An In-DRAM Neural Network Processing Engine},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
Sapporo, Japan, May 26-29, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISCAS.2019.8702458},
doi = {10.1109/ISCAS.2019.8702458},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SudarshanLGRW0W19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/0001KSSWW19,
author = {Matthias Jung and
Kira Kraft and
Taha Soliman and
Chirag Sudarshan and
Christian Weis and
Norbert Wehn},
title = {Fast validation of {DRAM} protocols with timed petri nets},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2019, Washington, DC, USA, September 30 - October 03, 2019},
pages = {133--147},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3357526.3357556},
doi = {10.1145/3357526.3357556},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/0001KSSWW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/MathewCW0GVLW19,
author = {Deepak M. Mathew and
Andr{\'{e}} Lucas Chinazzo and
Christian Weis and
Matthias Jung and
Bastien Giraud and
Pascal Vivet and
Alexandre Levisse and
Norbert Wehn},
editor = {Dionisios N. Pnevmatikatos and
Maxime Pelcat and
Matthias Jung},
title = {RRAMSpec: {A} Design Space Exploration Framework for High Density
Resistive {RAM}},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 19th International Conference, {SAMOS} 2019, Samos, Greece, July
7-11, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11733},
pages = {34--47},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-27562-4\_3},
doi = {10.1007/978-3-030-27562-4\_3},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/MathewCW0GVLW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/SudarshanLWM0W19,
author = {Chirag Sudarshan and
Jan Lappas and
Christian Weis and
Deepak M. Mathew and
Matthias Jung and
Norbert Wehn},
editor = {Dionisios N. Pnevmatikatos and
Maxime Pelcat and
Matthias Jung},
title = {A Lean, Low Power, Low Latency {DRAM} Memory Controller for Transprecision
Computing},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 19th International Conference, {SAMOS} 2019, Samos, Greece, July
7-11, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11733},
pages = {429--441},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-27562-4\_31},
doi = {10.1007/978-3-030-27562-4\_31},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/SudarshanLWM0W19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/samos/2019,
editor = {Dionisios N. Pnevmatikatos and
Maxime Pelcat and
Matthias Jung},
title = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 19th International Conference, {SAMOS} 2019, Samos, Greece, July
7-11, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11733},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-27562-4},
doi = {10.1007/978-3-030-27562-4},
isbn = {978-3-030-27561-7},
timestamp = {Fri, 09 Aug 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1911-00889,
author = {Dimitrios Stathis and
Chirag Sudarshan and
Yu Yang and
Matthias Jung and
Syed Mohammad Asad Hassan Jafri and
Christian Weis and
Ahmed Hemani and
Anders Lansner and
Norbert Wehn},
title = {eBrainII: {A} 3 kW Realtime Custom 3D {DRAM} integrated {ASIC} implementation
of a Biologically Plausible Model of a Human Scale Cortex},
journal = {CoRR},
volume = {abs/1911.00889},
year = {2019},
url = {http://arxiv.org/abs/1911.00889},
eprinttype = {arXiv},
eprint = {1911.00889},
timestamp = {Tue, 09 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1911-00889.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/BruggerGJSWWZ18,
author = {Christian Brugger and
Valentin Grigorovici and
Matthias Jung and
Christian de Schryver and
Christian Weis and
Norbert Wehn and
Katharina Anna Zweig},
title = {A Memory Centric Architecture of the Link Assessment Algorithm in
Large Graphs},
journal = {{IEEE} Des. Test},
volume = {35},
number = {1},
pages = {7--15},
year = {2018},
url = {https://doi.org/10.1109/MDAT.2017.2750900},
doi = {10.1109/MDAT.2017.2750900},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/BruggerGJSWWZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MathewSRSWW018,
author = {Deepak M. Mathew and
Martin Schultheis and
Carl Christian Rheinl{\"{a}}nder and
Chirag Sudarshan and
Christian Weis and
Norbert Wehn and
Matthias Jung},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {An analysis on retention error behavior and power consumption of recent
{DDR4} DRAMs},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {293--296},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342023},
doi = {10.23919/DATE.2018.8342023},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MathewSRSWW018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KraftSMWW018,
author = {Kira Kraft and
Chirag Sudarshan and
Deepak M. Mathew and
Christian Weis and
Norbert Wehn and
Matthias Jung},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Improving the error behavior of {DRAM} by exploiting its Z-channel
property},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {1492--1495},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342249},
doi = {10.23919/DATE.2018.8342249},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/KraftSMWW018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecsa/Antonino0MFBBKN18,
author = {Pablo Oliveira Antonino and
Matthias Jung and
Andreas Morgenstern and
Florian Fa{\ss}nacht and
Thomas Bauer and
Adam Bachorek and
Thomas Kuhn and
Elisa Yumi Nakagawa},
editor = {Carlos E. Cuesta and
David Garlan and
Jennifer P{\'{e}}rez},
title = {Enabling Continuous Software Engineering for Embedded Systems Architectures
with Virtual Prototypes},
booktitle = {Software Architecture - 12th European Conference on Software Architecture,
{ECSA} 2018, Madrid, Spain, September 24-28, 2018, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11048},
pages = {115--130},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-030-00761-4\_8},
doi = {10.1007/978-3-030-00761-4\_8},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ecsa/Antonino0MFBBKN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WeisJZSMW18,
author = {Christian Weis and
Matthias Jung and
{\'{E}}der F. Zulian and
Chirag Sudarshan and
Deepak M. Mathew and
Norbert Wehn},
title = {The Role of Memories in Transprecision Computing},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8351768},
doi = {10.1109/ISCAS.2018.8351768},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WeisJZSMW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/KraftMS0WWL18,
author = {Kira Kraft and
Deepak M. Mathew and
Chirag Sudarshan and
Matthias Jung and
Christian Weis and
Norbert Wehn and
Florian Longnos},
editor = {Bruce L. Jacob},
title = {Efficient coding scheme for {DDR4} memory subsystems},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2018, Old Town Alexandria, VA, USA, October 01-04, 2018},
pages = {148--157},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3240302.3240424},
doi = {10.1145/3240302.3240424},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/KraftMS0WWL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/0001MSDWW18,
author = {Matthias Jung and
Sally A. McKee and
Chirag Sudarshan and
Christoph Dropmann and
Christian Weis and
Norbert Wehn},
editor = {Bruce L. Jacob},
title = {Driving into the memory wall: the role of memory for advanced driver
assistance systems and autonomous driving},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2018, Old Town Alexandria, VA, USA, October 01-04, 2018},
pages = {377--386},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3240302.3240322},
doi = {10.1145/3240302.3240322},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/0001MSDWW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rv/Jahic0KKW18,
author = {Jasmin Jahic and
Matthias Jung and
Thomas Kuhn and
Claus Kestel and
Norbert Wehn},
editor = {Christian Colombo and
Martin Leucker},
title = {A Framework for Non-intrusive Trace-driven Simulation of Manycore
Architectures with Dynamic Tracing Configuration},
booktitle = {Runtime Verification - 18th International Conference, {RV} 2018, Limassol,
Cyprus, November 10-13, 2018, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11237},
pages = {458--468},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-030-03769-7\_28},
doi = {10.1007/978-3-030-03769-7\_28},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rv/Jahic0KKW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/safecomp/DropmannTTUASMS18,
author = {Christoph Dropmann and
Eike Thaden and
Mario Trapp and
Denis Uecker and
Rakshith Amarnath and
Leandro Avila da Silva and
Peter Munk and
Markus Schweizer and
Matthias Jung and
Rasmus Adler},
editor = {Barbara Gallina and
Amund Skavhaug and
Friedemann Bitsch},
title = {A Model-Based Safety Analysis of Dependencies Across Abstraction Layers},
booktitle = {Computer Safety, Reliability, and Security - 37th International Conference,
{SAFECOMP} 2018, V{\"{a}}ster{\aa}s, Sweden, September 19-21,
2018, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11093},
pages = {73--87},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-319-99130-6\_6},
doi = {10.1007/978-3-319-99130-6\_6},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/safecomp/DropmannTTUASMS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/JahicK0W18,
author = {Jasmin Jahic and
Thomas Kuhn and
Matthias Jung and
Norbert Wehn},
editor = {Trevor N. Mudge and
Dionisios N. Pnevmatikatos},
title = {{BOSMI:} a framework for non-intrusive monitoring and testing of embedded
multithreaded software on the logical level},
booktitle = {Proceedings of the 18th International Conference on Embedded Computer
Systems: Architectures, Modeling, and Simulation, Pythagorion, Greece,
July 15-19, 2018},
pages = {131--138},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3229631.3229641},
doi = {10.1145/3229631.3229641},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/JahicK0W18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1803-07613,
author = {Radhika Jagtap and
Matthias Jung and
Wendy Elsasser and
Christian Weis and
Andreas Hansson and
Norbert Wehn},
title = {Integrating {DRAM} Power-Down Modes in gem5 and Quantifying their
Impact},
journal = {CoRR},
volume = {abs/1803.07613},
year = {2018},
url = {http://arxiv.org/abs/1803.07613},
eprinttype = {arXiv},
eprint = {1803.07613},
timestamp = {Thu, 04 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1803-07613.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/JungMRWW17,
author = {Matthias Jung and
Deepak M. Mathew and
Carl Christian Rheinl{\"{a}}nder and
Christian Weis and
Norbert Wehn},
title = {A Platform to Analyze {DDR3} DRAM's Power and Retention Time},
journal = {{IEEE} Des. Test},
volume = {34},
number = {4},
pages = {52--59},
year = {2017},
url = {https://doi.org/10.1109/MDAT.2017.2705144},
doi = {10.1109/MDAT.2017.2705144},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/JungMRWW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/LiuHPWJW17,
author = {Pei Liu and
Ahmed Hemani and
Kolin Paul and
Christian Weis and
Matthias Jung and
Norbert Wehn},
title = {3D-Stacked Many-Core Architecture for Biological Sequence Analysis
Problems},
journal = {Int. J. Parallel Program.},
volume = {45},
number = {6},
pages = {1420--1460},
year = {2017},
url = {https://doi.org/10.1007/s10766-017-0495-0},
doi = {10.1007/S10766-017-0495-0},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/LiuHPWJW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/WeisMNJHW17,
author = {Christian Weis and
Abdul Mutaal and
Omar Naji and
Matthias Jung and
Andreas Hansson and
Norbert Wehn},
title = {DRAMSpec: {A} High-Level {DRAM} Timing, Power and Area Exploration
Tool},
journal = {Int. J. Parallel Program.},
volume = {45},
number = {6},
pages = {1566--1591},
year = {2017},
url = {https://doi.org/10.1007/s10766-016-0473-y},
doi = {10.1007/S10766-016-0473-Y},
timestamp = {Thu, 04 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijpp/WeisMNJHW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/LiuHPW0W17,
author = {Pei Liu and
Ahmed Hemani and
Kolin Paul and
Christian Weis and
Matthias Jung and
Norbert Wehn},
title = {A Customized Many-Core Hardware Acceleration Platform for Short Read
Mapping Problems Using Distributed Memory Interface with 3D-Stacked
Architecture},
journal = {J. Signal Process. Syst.},
volume = {87},
number = {3},
pages = {327--341},
year = {2017},
url = {https://doi.org/10.1007/s11265-016-1204-8},
doi = {10.1007/S11265-016-1204-8},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/LiuHPW0W17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/Jagtap0EWHW17,
author = {Radhika Jagtap and
Matthias Jung and
Wendy Elsasser and
Christian Weis and
Andreas Hansson and
Norbert Wehn},
title = {Integrating {DRAM} power-down modes in gem5 and quantifying their
impact},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {86--95},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132444},
doi = {10.1145/3132402.3132444},
timestamp = {Thu, 04 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/Jagtap0EWHW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/MathewZ0KWJW17,
author = {Deepak M. Mathew and
{\'{E}}der F. Zulian and
Matthias Jung and
Kira Kraft and
Christian Weis and
Bruce L. Jacob and
Norbert Wehn},
title = {Using run-time reverse-engineering to optimize {DRAM} refresh},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {115--124},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132419},
doi = {10.1145/3132402.3132419},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/MathewZ0KWJW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rapido/MathewZK0WW17,
author = {Deepak M. Mathew and
{\'{E}}der F. Zulian and
Subash Kannoth and
Matthias Jung and
Christian Weis and
Norbert Wehn},
title = {A Bank-Wise {DRAM} Power Model for System Simulations},
booktitle = {Proceedings of the 9th Workshop on Rapid Simulation and Performance
Evaluation: Methods and Tools, {RAPIDO} 2017, Stockholm, Sweden, January
23-25, 2017},
pages = {5},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3023978},
timestamp = {Tue, 06 Nov 2018 16:58:26 +0100},
biburl = {https://dblp.org/rec/conf/rapido/MathewZK0WW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/MenardC0W17,
author = {Christian Menard and
Jer{\'{o}}nimo Castrill{\'{o}}n and
Matthias Jung and
Norbert Wehn},
editor = {Yale N. Patt and
S. K. Nandy},
title = {System simulation with gem5 and SystemC: The keystone for full interoperability},
booktitle = {2017 International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July
17-20, 2017},
pages = {62--69},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/SAMOS.2017.8344612},
doi = {10.1109/SAMOS.2017.8344612},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/MenardC0W17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/0001KW17,
author = {Matthias Jung and
Kira Kraft and
Norbert Wehn},
editor = {Yale N. Patt and
S. K. Nandy},
title = {A new state model for DRAMs using Petri Nets},
booktitle = {2017 International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July
17-20, 2017},
pages = {221--226},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/SAMOS.2017.8344631},
doi = {10.1109/SAMOS.2017.8344631},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/0001KW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/JahicK0W17,
author = {Jasmin Jahic and
Thomas Kuhn and
Matthias Jung and
Norbert Wehn},
editor = {Yale N. Patt and
S. K. Nandy},
title = {Supervised testing of concurrent software in embedded systems},
booktitle = {2017 International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} 2017, Pythagorion, Greece, July
17-20, 2017},
pages = {233--238},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/SAMOS.2017.8344633},
doi = {10.1109/SAMOS.2017.8344633},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/JahicK0W17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mr/JungWW16,
author = {Matthias Jung and
Christian Weis and
Norbert Wehn},
title = {A cross layer approach for efficient thermal management in 3D stacked
SoCs},
journal = {Microelectron. Reliab.},
volume = {61},
pages = {43--47},
year = {2016},
url = {https://doi.org/10.1016/j.microrel.2015.12.025},
doi = {10.1016/J.MICROREL.2015.12.025},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mr/JungWW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/0001MWW16,
author = {Matthias Jung and
Deepak M. Mathew and
Christian Weis and
Norbert Wehn},
title = {Efficient reliability management in SoCs - an approximate {DRAM} perspective},
booktitle = {21st Asia and South Pacific Design Automation Conference, {ASP-DAC}
2016, Macao, Macao, January 25-28, 2016},
pages = {390--394},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASPDAC.2016.7428043},
doi = {10.1109/ASPDAC.2016.7428043},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/0001MWW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/0001MWW16,
author = {Matthias Jung and
Deepak M. Mathew and
Christian Weis and
Norbert Wehn},
title = {Invited - Approximate computing with partially unreliable dynamic
random access memory - approximate {DRAM}},
booktitle = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
2016, Austin, TX, USA, June 5-9, 2016},
pages = {100:1--100:4},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2897937.2905002},
doi = {10.1145/2897937.2905002},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/0001MWW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/0001MWWHNK16,
author = {Matthias Jung and
Deepak M. Mathew and
Christian Weis and
Norbert Wehn and
Irene Heinrich and
Marco V. Natale and
Sven O. Krumke},
editor = {Bruce L. Jacob},
title = {ConGen: An Application Specific {DRAM} Memory Controller Generator},
booktitle = {Proceedings of the Second International Symposium on Memory Systems,
{MEMSYS} 2016, Alexandria, VA, USA, October 3-6, 2016},
pages = {257--267},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2989081.2989131},
doi = {10.1145/2989081.2989131},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memsys/0001MWWHNK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/0001RWW16,
author = {Matthias Jung and
Carl Christian Rheinl{\"{a}}nder and
Christian Weis and
Norbert Wehn},
editor = {Bruce L. Jacob},
title = {Reverse Engineering of DRAMs: Row Hammer with Crosshair},
booktitle = {Proceedings of the Second International Symposium on Memory Systems,
{MEMSYS} 2016, Alexandria, VA, USA, October 3-6, 2016},
pages = {471--476},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2989081.2989114},
doi = {10.1145/2989081.2989114},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/0001RWW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/0001MZWW16,
author = {Matthias Jung and
Deepak M. Mathew and
{\'{E}}der F. Zulian and
Christian Weis and
Norbert Wehn},
title = {A new bank sensitive DRAMPower model for efficient design space exploration},
booktitle = {26th International Workshop on Power and Timing Modeling, Optimization
and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016},
pages = {283--288},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/PATMOS.2016.7833700},
doi = {10.1109/PATMOS.2016.7833700},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/0001MZWW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/JagtapDH0W16,
author = {Radhika Jagtap and
Stephan Diestelhorst and
Andreas Hansson and
Matthias Jung and
Norbert Wehn},
editor = {Walid A. Najjar and
Andreas Gerstlauer},
title = {Exploring system performance using elastic traces: Fast, accurate
and portable},
booktitle = {International Conference on Embedded Computer Systems: Architectures,
Modeling and Simulation, {SAMOS} 2016, Agios Konstantinos, Samos Island,
Greece, July 17-21, 2016},
pages = {96--105},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/SAMOS.2016.7818336},
doi = {10.1109/SAMOS.2016.7818336},
timestamp = {Thu, 04 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/samos/JagtapDH0W16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ipsj/0001WW15,
author = {Matthias Jung and
Christian Weis and
Norbert Wehn},
title = {DRAMSys: {A} Flexible {DRAM} Subsystem Design Space Exploration Framework},
journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.},
volume = {8},
pages = {63--74},
year = {2015},
url = {https://doi.org/10.2197/ipsjtsldm.8.63},
doi = {10.2197/IPSJTSLDM.8.63},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ipsj/0001WW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Weis0ESVGKW15,
author = {Christian Weis and
Matthias Jung and
Peter Ehses and
Cristiano Santos and
Pascal Vivet and
Sven Goossens and
Martijn Koedam and
Norbert Wehn},
editor = {Wolfgang Nebel and
David Atienza},
title = {Retention time measurements and modelling of bit error rates of {WIDE}
{I/O} {DRAM} in MPSoCs},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {495--500},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755865},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Weis0ESVGKW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/BruggerG0WSZW15,
author = {Christian Brugger and
Valentin Grigorovici and
Matthias Jung and
Christian Weis and
Christian de Schryver and
Katharina Anna Zweig and
Norbert Wehn},
title = {A Custom Computing System for Finding Similarties in Complex Networks},
booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015,
Montpellier, France, July 8-10, 2015},
pages = {262--267},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVLSI.2015.78},
doi = {10.1109/ISVLSI.2015.78},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/BruggerG0WSZW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/Weis0NWSVH15,
author = {Christian Weis and
Matthias Jung and
Omar Naji and
Norbert Wehn and
Cristiano Santos and
Pascal Vivet and
Andreas Hansson},
title = {Thermal Aspects and High-Level Explorations of 3D Stacked DRAMs},
booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015,
Montpellier, France, July 8-10, 2015},
pages = {609--614},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVLSI.2015.60},
doi = {10.1109/ISVLSI.2015.60},
timestamp = {Thu, 04 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/Weis0NWSVH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/0001ZMHBWW15,
author = {Matthias Jung and
{\'{E}}der Zulian and
Deepak M. Mathew and
Matthias Herrmann and
Christian Brugger and
Christian Weis and
Norbert Wehn},
editor = {Bruce L. Jacob},
title = {Omitting Refresh: {A} Case Study for Commodity and Wide {I/O} DRAMs},
booktitle = {Proceedings of the 2015 International Symposium on Memory Systems,
{MEMSYS} 2015, Washington DC, DC, USA, October 5-8, 2015},
pages = {85--91},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2818950.2818964},
doi = {10.1145/2818950.2818964},
timestamp = {Fri, 13 Nov 2020 09:24:44 +0100},
biburl = {https://dblp.org/rec/conf/memsys/0001ZMHBWW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/NajiW0WH15,
author = {Omar Naji and
Christian Weis and
Matthias Jung and
Norbert Wehn and
Andreas Hansson},
editor = {Dimitrios Soudris and
Luigi Carro},
title = {A high-level {DRAM} timing, power and area exploration tool},
booktitle = {2015 International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} 2015, Samos, Greece, July 19-23,
2015},
pages = {149--156},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/SAMOS.2015.7363670},
doi = {10.1109/SAMOS.2015.7363670},
timestamp = {Thu, 04 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/samos/NajiW0WH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Sadri0WWB14,
author = {MohammadSadegh Sadri and
Matthias Jung and
Christian Weis and
Norbert Wehn and
Luca Benini},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Energy optimization in 3D MPSoCs with Wide-I/O {DRAM} using temperature
variation aware bank-wise refresh},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--4},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.294},
doi = {10.7873/DATE.2014.294},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/Sadri0WWB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/0001WWSB14,
author = {Matthias Jung and
Christian Weis and
Norbert Wehn and
MohammadSadegh Sadri and
Luca Benini},
editor = {Lorena Garcia},
title = {Optimized active and power-down mode refresh control in 3D-DRAMs},
booktitle = {22nd International Conference on Very Large Scale Integration, VLSI-SoC,
Playa del Carmen, Mexico, October 6-8, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/VLSI-SoC.2014.7004159},
doi = {10.1109/VLSI-SOC.2014.7004159},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/0001WWSB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rapido/0001WW013,
author = {Matthias Jung and
Christian Weis and
Norbert Wehn and
Karthik Chandrasekar},
editor = {Daniel Gracia P{\'{e}}rez and
Morteza Biglari{-}Abhari and
Daniel Chillet and
Gianluca Palermo},
title = {{TLM} modelling of 3D stacked wide {I/O} {DRAM} subsystems: a virtual
platform for memory controller design space exploration},
booktitle = {Proceedings of the 2013 Workshop on Rapid Simulation and Performance
Evaluation: Methods and Tools, {RAPIDO} '13, 21 January, 2013, Berlin,
Germany},
pages = {5:1--5:6},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2432516.2432521},
doi = {10.1145/2432516.2432521},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rapido/0001WW013.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/kes/SchryverJWMKK11,
author = {Christian de Schryver and
Matthias Jung and
Norbert Wehn and
Henning Marxen and
Anton Kostiuk and
Ralf Korn},
editor = {Andreas K{\"{o}}nig and
Andreas Dengel and
Knut Hinkelmann and
Koichi Kise and
Robert J. Howlett and
Lakhmi C. Jain},
title = {Energy Efficient Acceleration and Evaluation of Financial Computations
towards Real-Time Pricing},
booktitle = {Knowledge-Based and Intelligent Information and Engineering Systems
- 15th International Conference, {KES} 2011, Kaiserslautern, Germany,
September 12-14, 2011, Proceedings, Part {IV}},
series = {Lecture Notes in Computer Science},
volume = {6884},
pages = {177--186},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-23866-6\_19},
doi = {10.1007/978-3-642-23866-6\_19},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/kes/SchryverJWMKK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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