Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDBibTeX records: Josep Llosa
@article{DBLP:journals/cphysics/SalvatLLA22,
author = {Francesc Salvat and
Josep Llosa and
Antonio M. Lallena and
Julio Almansa},
title = {{ECCPA:} Calculation of classical and quantum cross sections for elastic
collisions of charged particles with atoms},
journal = {Comput. Phys. Commun.},
volume = {277},
pages = {108368},
year = {2022},
url = {https://doi.org/10.1016/j.cpc.2022.108368},
doi = {10.1016/J.CPC.2022.108368},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cphysics/SalvatLLA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eduhpc/QasemAACCCFGJKKLMMNOOPPRSSSSST22,
author = {Apan Qasem and
Hartwig Anzt and
Eduard Ayguad{\'{e}} and
Katharine Cahill and
Ramon Canal and
Jany Chan and
Eric Fosler{-}Lussier and
Fritz G{\"{o}}bel and
Arpan Jain and
Marcel Koch and
Mateusz Kuzak and
Josep Llosa and
Raghu Machiraju and
Xavier Martorell and
Pratik Nayak and
Shameema Oottikkal and
Marcin Ostasz and
Dhabaleswar K. Panda and
Dirk Pleiter and
Rajiv Ramnath and
Maria{-}Ribera Sancho and
Alessio Sclocco and
Aamir Shafi and
Hanno Spreeuw and
Hari Subramoni and
Karen Tomko},
title = {Lightning Talks of EduHPC 2022},
booktitle = {{IEEE/ACM} International Workshop on Education for High Performance
Computing, EduHPC 2022, Dallas, TX, USA, November 13-18, 2022},
pages = {42--49},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/EduHPC56719.2022.00011},
doi = {10.1109/EDUHPC56719.2022.00011},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eduhpc/QasemAACCCFGJKKLMMNOOPPRSSSSST22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/GuptaSL10,
author = {Manoj Gupta and
Ferm{\'{\i}}n S{\'{a}}nchez and
Josep Llosa},
title = {{CSMT:} Simultaneous Multithreading for Clustered {VLIW} Processors},
journal = {{IEEE} Trans. Computers},
volume = {59},
number = {3},
pages = {385--399},
year = {2010},
url = {https://doi.org/10.1109/TC.2009.96},
doi = {10.1109/TC.2009.96},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/GuptaSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/GuptaSL10,
author = {Manoj Gupta and
Ferm{\'{\i}}n S{\'{a}}nchez and
Josep Llosa},
title = {A low cost split-issue technique to improve performance of {SMT} clustered
{VLIW} processors},
booktitle = {24th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2010, Atlanta, Georgia, USA, 19-23 April 2010 - Conference
Proceedings},
pages = {1--12},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/IPDPS.2010.5470351},
doi = {10.1109/IPDPS.2010.5470351},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/GuptaSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GuptaSL09,
author = {Manoj Gupta and
Ferm{\'{\i}}n S{\'{a}}nchez and
Josep Llosa},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Hybrid multithreading for {VLIW} processors},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {37--46},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629403},
doi = {10.1145/1629395.1629403},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/GuptaSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/GuptaSL09,
author = {Manoj Gupta and
Ferm{\'{\i}}n S{\'{a}}nchez and
Josep Llosa},
title = {Thread Merging Schemes for Multithreaded Clustered {VLIW} Processors},
booktitle = {{ICPP} 2009, International Conference on Parallel Processing, Vienna,
Austria, 22-25 September 2009},
pages = {445--452},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ICPP.2009.48},
doi = {10.1109/ICPP.2009.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/GuptaSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijes/PericasAZLV08,
author = {Miquel Peric{\`{a}}s and
Eduard Ayguad{\'{e}} and
Javier Zalamea and
Josep Llosa and
Mateo Valero},
title = {Power-efficient {VLIW} design using clustering and widening},
journal = {Int. J. Embed. Syst.},
volume = {3},
number = {3},
pages = {141--149},
year = {2008},
url = {https://doi.org/10.1504/IJES.2008.020295},
doi = {10.1504/IJES.2008.020295},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijes/PericasAZLV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/PaulPL07,
author = {Kolin Paul and
Jo{\"{e}}l Porquet and
Josep Llosa},
title = {Silicon Compaction/Defragmentation for Partial Runtime Reconfiguration},
booktitle = {Tenth Euromicro Conference on Digital System Design: Architectures,
Methods and Tools {(DSD} 2007), 29-31 August 2007, L{\"{u}}beck,
Germany},
pages = {317--324},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/DSD.2007.4341487},
doi = {10.1109/DSD.2007.4341487},
timestamp = {Wed, 05 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/PaulPL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/GuptaSL07,
author = {Manoj Gupta and
Ferm{\'{\i}}n S{\'{a}}nchez and
Josep Llosa},
title = {Merge Logic for Clustered Multithreaded {VLIW} Processors},
booktitle = {Tenth Euromicro Conference on Digital System Design: Architectures,
Methods and Tools {(DSD} 2007), 29-31 August 2007, L{\"{u}}beck,
Germany},
pages = {353--360},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/DSD.2007.4341492},
doi = {10.1109/DSD.2007.4341492},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/GuptaSL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GuptaSL07,
author = {Manoj Gupta and
Ferm{\'{\i}}n S{\'{a}}nchez and
Josep Llosa},
title = {Cluster-level simultaneous multithreading for {VLIW} processors},
booktitle = {25th International Conference on Computer Design, {ICCD} 2007, 7-10
October 2007, Lake Tahoe, CA, USA, Proceedings},
pages = {121--128},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICCD.2007.4601890},
doi = {10.1109/ICCD.2007.4601890},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GuptaSL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/toplas/VeraALG05,
author = {Xavier Vera and
Jaume Abella and
Josep Llosa and
Antonio Gonz{\'{a}}lez},
title = {An accurate cost model for guiding data locality transformations},
journal = {{ACM} Trans. Program. Lang. Syst.},
volume = {27},
number = {5},
pages = {946--987},
year = {2005},
url = {https://doi.org/10.1145/1086642.1086646},
doi = {10.1145/1086642.1086646},
timestamp = {Tue, 18 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/toplas/VeraALG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpcn/PericasAZLV04,
author = {Miquel Peric{\`{a}}s and
Eduard Ayguad{\'{e}} and
Javier Zalamea and
Josep Llosa and
Mateo Valero},
title = {High-performance and low-power {VLIW} cores for numerical computations},
journal = {Int. J. High Perform. Comput. Netw.},
volume = {1},
number = {4},
pages = {171--179},
year = {2004},
url = {https://doi.org/10.1504/IJHPCN.2004.008346},
doi = {10.1504/IJHPCN.2004.008346},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijhpcn/PericasAZLV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpcn/CristalLVO04,
author = {Adri{\'{a}}n Cristal and
Josep Llosa and
Mateo Valero and
Daniel Ortega},
title = {Future {ILP} processors},
journal = {Int. J. High Perform. Comput. Netw.},
volume = {2},
number = {1},
pages = {1--10},
year = {2004},
url = {https://doi.org/10.1504/IJHPCN.2004.009263},
doi = {10.1504/IJHPCN.2004.009263},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijhpcn/CristalLVO04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/ZalameaLAV04,
author = {Javier Zalamea and
Josep Llosa and
Eduard Ayguad{\'{e}} and
Mateo Valero},
title = {Software and Hardware Techniques to Optimize Register File Utilization
in {VLIW} Architectures},
journal = {Int. J. Parallel Program.},
volume = {32},
number = {6},
pages = {447--474},
year = {2004},
url = {https://doi.org/10.1023/B:IJPP.0000042082.31819.6d},
doi = {10.1023/B:IJPP.0000042082.31819.6D},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/ZalameaLAV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/CristalMLV04,
author = {Adri{\'{a}}n Cristal and
Jos{\'{e}} F. Mart{\'{\i}}nez and
Josep Llosa and
Mateo Valero},
title = {A case for resource-conscious out-of-order processors: towards kilo-instruction
in-flight processors},
journal = {{SIGARCH} Comput. Archit. News},
volume = {32},
number = {3},
pages = {3--10},
year = {2004},
url = {https://doi.org/10.1145/1024295.1024296},
doi = {10.1145/1024295.1024296},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/CristalMLV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/toplas/VeraBLG04,
author = {Xavier Vera and
Nerina Bermudo and
Josep Llosa and
Antonio Gonz{\'{a}}lez},
title = {A fast and accurate framework to analyze and optimize cache memory
behavior},
journal = {{ACM} Trans. Program. Lang. Syst.},
volume = {26},
number = {2},
pages = {263--300},
year = {2004},
url = {https://doi.org/10.1145/973097.973099},
doi = {10.1145/973097.973099},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/toplas/VeraBLG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/ZalameaLAV04,
author = {Javier Zalamea and
Josep Llosa and
Eduard Ayguad{\'{e}} and
Mateo Valero},
title = {Register Constrained Modulo Scheduling},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {15},
number = {5},
pages = {417--430},
year = {2004},
url = {https://doi.org/10.1109/TPDS.2004.1278099},
doi = {10.1109/TPDS.2004.1278099},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/ZalameaLAV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/CristalOLV04,
author = {Adri{\'{a}}n Cristal and
Daniel Ortega and
Josep Llosa and
Mateo Valero},
title = {Out-of-Order Commit Processors},
booktitle = {10th International Conference on High-Performance Computer Architecture
{(HPCA-10} 2004), 14-18 February 2004, Madrid, Spain},
pages = {48--59},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/HPCA.2004.10008},
doi = {10.1109/HPCA.2004.10008},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/CristalOLV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/PericasAZLV04,
author = {Miquel Peric{\`{a}}s and
Eduard Ayguad{\'{e}} and
Javier Zalamea and
Josep Llosa and
Mateo Valero},
editor = {Andy D. Pimentel and
Stamatis Vassiliadis},
title = {Performance and Power Evaluation of Clustered {VLIW} Processors with
Wide Functional Units},
booktitle = {Computer Systems: Architectures, Modeling, and Simulation, Third and
Fourth International Workshops, {SAMOS} 2003 and {SAMOS} 2004, Samos,
Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3133},
pages = {88--97},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-27776-7\_10},
doi = {10.1007/978-3-540-27776-7\_10},
timestamp = {Tue, 14 May 2019 10:00:45 +0200},
biburl = {https://dblp.org/rec/conf/samos/PericasAZLV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CristalMLV03,
author = {Adri{\'{a}}n Cristal and
Jos{\'{e}} F. Mart{\'{\i}}nez and
Josep Llosa and
Mateo Valero},
title = {A Case for Resource-conscious Out-of-order Processors},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {2},
year = {2003},
url = {https://doi.org/10.1109/L-CA.2003.4},
doi = {10.1109/L-CA.2003.4},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/CristalMLV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/VeraAGL03,
author = {Xavier Vera and
Jaume Abella and
Antonio Gonz{\'{a}}lez and
Josep Llosa},
title = {Optimizing Program Locality Through CMEs and GAs},
booktitle = {12th International Conference on Parallel Architectures and Compilation
Techniques {(PACT} 2003), 27 September - 1 October 2003, New Orleans,
LA, {USA}},
pages = {68--78},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/PACT.2003.1238003},
doi = {10.1109/PACT.2003.1238003},
timestamp = {Tue, 31 May 2022 13:36:44 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/VeraAGL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/ZalameaLAV03,
author = {Javier Zalamea and
Josep Llosa and
Eduard Ayguad{\'{e}} and
Mateo Valero},
title = {Hierarchical Clustered Register File Organization for {VLIW} Processors},
booktitle = {17th International Parallel and Distributed Processing Symposium {(IPDPS}
2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings},
pages = {77},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IPDPS.2003.1213178},
doi = {10.1109/IPDPS.2003.1213178},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/ZalameaLAV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/CristalOLV03,
author = {Adri{\'{a}}n Cristal and
Daniel Ortega and
Josep Llosa and
Mateo Valero},
editor = {Alexander V. Veidenbaum and
Kazuki Joe and
Hideharu Amano and
Hideo Aiso},
title = {Kilo-instruction Processors},
booktitle = {High Performance Computing, 5th International Symposium, {ISHPC} 2003,
Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2858},
pages = {10--25},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-39707-6\_2},
doi = {10.1007/978-3-540-39707-6\_2},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/ishpc/CristalOLV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/PericasAZLV03,
author = {Miquel Peric{\`{a}}s and
Eduard Ayguad{\'{e}} and
Javier Zalamea and
Josep Llosa and
Mateo Valero},
editor = {Alexander V. Veidenbaum and
Kazuki Joe and
Hideharu Amano and
Hideo Aiso},
title = {Power-Performance Trade-Offs in Wide and Clustered {VLIW} Cores for
Numerical Codes},
booktitle = {High Performance Computing, 5th International Symposium, {ISHPC} 2003,
Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2858},
pages = {113--126},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-39707-6\_9},
doi = {10.1007/978-3-540-39707-6\_9},
timestamp = {Sat, 16 Sep 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ishpc/PericasAZLV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icppw/AbellaGLV02,
author = {Jaume Abella and
Antonio Gonz{\'{a}}lez and
Josep Llosa and
Xavier Vera},
title = {Near-Optimal Loop Tiling by Means of Cache Miss Equations and Genetic
Algorithms},
booktitle = {31st International Conference on Parallel Processing Workshops {(ICPP}
2002 Workshops), 20-23 August 2002, Vancouver, BC, Canada},
pages = {568--580},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ICPPW.2002.1039779},
doi = {10.1109/ICPPW.2002.1039779},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icppw/AbellaGLV02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/CodinaLG02,
author = {Josep M. Codina and
Josep Llosa and
Antonio Gonz{\'{a}}lez},
editor = {Kemal Ebcioglu and
Keshav Pingali and
Alex Nicolau},
title = {A comparative study of modulo scheduling techniques},
booktitle = {Proceedings of the 16th international conference on Supercomputing,
{ICS} 2002, New York City, NY, USA, June 22-26, 2002},
pages = {97--106},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/514191.514208},
doi = {10.1145/514191.514208},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/CodinaLG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lcpc/VeraLG02,
author = {Xavier Vera and
Josep Llosa and
Antonio Gonz{\'{a}}lez},
editor = {William W. Pugh and
Chau{-}Wen Tseng},
title = {Near-Optimal Padding for Removing Conflict Misses},
booktitle = {Languages and Compilers for Parallel Computing, 15th Workshop, {LCPC}
2002, College Park, MD, USA, July 25-27, 2002, Revised Papers},
series = {Lecture Notes in Computer Science},
volume = {2481},
pages = {329--343},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/11596110\_22},
doi = {10.1007/11596110\_22},
timestamp = {Mon, 04 Apr 2022 21:23:55 +0200},
biburl = {https://dblp.org/rec/conf/lcpc/VeraLG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LlosaF02,
author = {Josep Llosa and
Stefan M. Freudenberger},
editor = {Erik R. Altman and
Kemal Ebcioglu and
Scott A. Mahlke and
B. Ramakrishna Rau and
Sanjay J. Patel},
title = {Reduced code size modulo scheduling in the absence of hardware support},
booktitle = {Proceedings of the 35th Annual International Symposium on Microarchitecture,
Istanbul, Turkey, November 18-22, 2002},
pages = {99--110},
publisher = {{ACM/IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/MICRO.2002.1176242},
doi = {10.1109/MICRO.2002.1176242},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/LlosaF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LlosaAGVE01,
author = {Josep Llosa and
Eduard Ayguad{\'{e}} and
Antonio Gonz{\'{a}}lez and
Mateo Valero and
Jason Eckhardt},
title = {Lifetime-Sensitive Modulo Scheduling in a Production Environment},
journal = {{IEEE} Trans. Computers},
volume = {50},
number = {3},
pages = {234--249},
year = {2001},
url = {https://doi.org/10.1109/12.910814},
doi = {10.1109/12.910814},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LlosaAGVE01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LopezLVA01,
author = {David L{\'{o}}pez and
Josep Llosa and
Mateo Valero and
Eduard Ayguad{\'{e}}},
title = {Cost-Conscious Strategies to Increase Performance of Numerical Programs
on Aggressive {VLIW} Architectures},
journal = {{IEEE} Trans. Computers},
volume = {50},
number = {10},
pages = {1033--1051},
year = {2001},
url = {https://doi.org/10.1109/12.956090},
doi = {10.1109/12.956090},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LopezLVA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lcpc/ZalameaLAV01,
author = {Javier Zalamea and
Josep Llosa and
Eduard Ayguad{\'{e}} and
Mateo Valero},
editor = {Henry G. Dietz},
title = {\emph{MIRS}: Modulo Scheduling with Integrated Register Spilling},
booktitle = {Languages and Compilers for Parallel Computing, 14th International
Workshop, {LCPC} 2001, Cumberland Falls, KY, USA, August 1-3, 2001.
Revised Papers},
series = {Lecture Notes in Computer Science},
volume = {2624},
pages = {239--253},
publisher = {Springer},
year = {2001},
url = {https://doi.org/10.1007/3-540-35767-X\_16},
doi = {10.1007/3-540-35767-X\_16},
timestamp = {Tue, 14 May 2019 10:00:47 +0200},
biburl = {https://dblp.org/rec/conf/lcpc/ZalameaLAV01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ZalameaLAV01,
author = {Javier Zalamea and
Josep Llosa and
Eduard Ayguad{\'{e}} and
Mateo Valero},
editor = {Yale N. Patt and
Josh Fisher and
Paolo Faraboschi and
Kevin Skadron},
title = {Modulo scheduling with integrated register spilling for clustered
{VLIW} architectures},
booktitle = {Proceedings of the 34th Annual International Symposium on Microarchitecture,
Austin, Texas, USA, December 1-5, 2001},
pages = {160--169},
publisher = {{ACM/IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/MICRO.2001.991115},
doi = {10.1109/MICRO.2001.991115},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/ZalameaLAV01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/BermudoVGL00,
author = {Nerina Bermudo and
Xavier Vera and
Antonio Gonz{\'{a}}lez and
Josep Llosa},
title = {Optimizing cache miss equations polyhedra},
journal = {{SIGARCH} Comput. Archit. News},
volume = {28},
number = {1},
pages = {43--52},
year = {2000},
url = {https://doi.org/10.1145/346023.346042},
doi = {10.1145/346023.346042},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/BermudoVGL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/VeraLGB00,
author = {Xavier Vera and
Josep Llosa and
Antonio Gonz{\'{a}}lez and
Nerina Bermudo},
editor = {Arndt Bode and
Thomas Ludwig and
Wolfgang Karl and
Roland Wism{\"{u}}ller},
title = {A Fast and Accurate Approach to Analyze Cache Memory Behavior (Research
Note)},
booktitle = {Euro-Par 2000, Parallel Processing, 6th International Euro-Par Conference,
Munich, Germany, August 29 - September 1, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1900},
pages = {194--198},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44520-X\_26},
doi = {10.1007/3-540-44520-X\_26},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/VeraLGB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/BermudoVGL00,
author = {Nerina Bermudo and
Xavier Vera and
Antonio Gonz{\'{a}}lez and
Josep Llosa},
title = {An efficient solver for Cache Miss Equations},
booktitle = {2000 {IEEE} International Symposium on Performance Analysis of Systems
and Software, April 24-35, 2000, Austin, Texas, USA, Proceedings},
pages = {139--145},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ISPASS.2000.842293},
doi = {10.1109/ISPASS.2000.842293},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/BermudoVGL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ZalameaLAV00,
author = {Javier Zalamea and
Josep Llosa and
Eduard Ayguad{\'{e}} and
Mateo Valero},
editor = {Andrew Wolfe and
Michael S. Schlansker},
title = {Two-level hierarchical register file organization for {VLIW} processors},
booktitle = {Proceedings of the 33rd Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 33, Monterey, California, USA, December
10-13, 2000},
pages = {137--146},
publisher = {{ACM/IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/MICRO.2000.898065},
doi = {10.1109/MICRO.2000.898065},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/ZalameaLAV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pldi/ZalameaLAV00,
author = {Javier Zalamea and
Josep Llosa and
Eduard Ayguad{\'{e}} and
Mateo Valero},
editor = {Monica S. Lam},
title = {Improved spill code generation for software pipelined loops},
booktitle = {Proceedings of the 2000 {ACM} {SIGPLAN} Conference on Programming
Language Design and Implementation (PLDI), Vancouver, Britith Columbia,
Canada, June 18-21, 2000},
pages = {134--144},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/349299.349319},
doi = {10.1145/349299.349319},
timestamp = {Thu, 08 Jul 2021 16:04:02 +0200},
biburl = {https://dblp.org/rec/conf/pldi/ZalameaLAV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/FernandesLT99,
author = {Marcio Merino Fernandes and
Josep Llosa and
Nigel P. Topham},
title = {Distributed Modulo Scheduling},
booktitle = {Proceedings of the Fifth International Symposium on High-Performance
Computer Architecture, Orlando, FL, USA, January 9-12, 1999},
pages = {130--134},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/HPCA.1999.744349},
doi = {10.1109/HPCA.1999.744349},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/FernandesLT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/LopezLAV99,
author = {David L{\'{o}}pez and
Josep Llosa and
Eduard Ayguad{\'{e}} and
Mateo Valero},
title = {Impact on Performance of Fused Multiply-Add Units in Aggressive {VLIW}
Architectures},
booktitle = {Proceedings of the International Conference on Parallel Processing
1999, {ICPP} 1999, Wakamatsu, Japan, September 21-24, 1999},
pages = {22--29},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICPP.1999.797384},
doi = {10.1109/ICPP.1999.797384},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/LopezLAV99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/LlosaAV98,
author = {Josep Llosa and
Eduard Ayguad{\'{e}} and
Mateo Valero},
title = {Quantitative Evaluation of Register Pressure on Software Pipelined
Loops},
journal = {Int. J. Parallel Program.},
volume = {26},
number = {2},
pages = {121--142},
year = {1998},
url = {https://doi.org/10.1023/A:1018743102645},
doi = {10.1023/A:1018743102645},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/LlosaAV98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LlosaVAG98,
author = {Josep Llosa and
Mateo Valero and
Eduard Ayguad{\'{e}} and
Antonio Gonz{\'{a}}lez},
title = {Modulo Scheduling with Reduced Register Pressure},
journal = {{IEEE} Trans. Computers},
volume = {47},
number = {6},
pages = {625--638},
year = {1998},
url = {https://doi.org/10.1109/12.689643},
doi = {10.1109/12.689643},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LlosaVAG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/LopezLVA98,
author = {David L{\'{o}}pez and
Josep Llosa and
Mateo Valero and
Eduard Ayguad{\'{e}}},
editor = {Greg K. Egan and
Richard P. Brent and
Dennis Gannon},
title = {Resource Widening Versus Replication: Limits and Performance-cost
Trade-off},
booktitle = {Proceedings of the 12th international conference on Supercomputing,
{ICS} 1998, Melbourne, Australia, July 13-17, 1998},
pages = {441--448},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/277830.277938},
doi = {10.1145/277830.277938},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/LopezLVA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/FernandesLT98,
author = {Marcio Merino Fernandes and
Josep Llosa and
Nigel P. Topham},
title = {Partitioned Schedules for Clustered {VLIW} Architectures},
booktitle = {12th International Parallel Processing Symposium / 9th Symposium on
Parallel and Distributed Processing {(IPPS/SPDP} '98), March 30 -
April 3, 1998, Orlando, Florida, USA, Proceedings},
pages = {386--391},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IPPS.1998.669945},
doi = {10.1109/IPPS.1998.669945},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/FernandesLT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LopezLVA98,
author = {David L{\'{o}}pez and
Josep Llosa and
Mateo Valero and
Eduard Ayguad{\'{e}}},
editor = {James O. Bondi and
Jim Smith},
title = {Widening Resources: {A} Cost-effective Technique for Aggressive {ILP}
Architectures},
booktitle = {Proceedings of the 31st Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 31, Dallas, Texas, USA, November 30
- December 2, 1998},
pages = {237--246},
publisher = {{ACM/IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/MICRO.1998.742785},
doi = {10.1109/MICRO.1998.742785},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/LopezLVA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/FernandesLT97,
author = {Marcio Merino Fernandes and
Josep Llosa and
Nigel P. Topham},
editor = {Christian Lengauer and
Martin Griebl and
Sergei Gorlatch},
title = {Allocating Lifetimes to Queues in Software Pipelined Architectures},
booktitle = {Euro-Par '97 Parallel Processing, Third International Euro-Par Conference,
Passau, Germany, August 26-29, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1300},
pages = {1066--1073},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/BFb0002854},
doi = {10.1007/BFB0002854},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/FernandesLT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/LopezVLA97,
author = {David L{\'{o}}pez and
Mateo Valero and
Josep Llosa and
Eduard Ayguad{\'{e}}},
editor = {Steven J. Wallach and
Hans P. Zima},
title = {Increasing Memory Bandwidth with Wide Buses: Compiler, Hardware and
Performance Trade-Offs},
booktitle = {Proceedings of the 11th international conference on Supercomputing,
{ICS} 1997, Vienna, Austria, July 7-11, 1997},
pages = {12--19},
publisher = {{ACM}},
year = {1997},
url = {https://doi.org/10.1145/263580.263585},
doi = {10.1145/263580.263585},
timestamp = {Tue, 06 Nov 2018 11:07:03 +0100},
biburl = {https://dblp.org/rec/conf/ics/LopezVLA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/LlosaGAV96,
author = {Josep Llosa and
Antonio Gonz{\'{a}}lez and
Eduard Ayguad{\'{e}} and
Mateo Valero},
title = {Swing module scheduling: a lifetime-sensitive approach},
booktitle = {Proceedings of the Fifth International Conference on Parallel Architectures
and Compilation Techniques, PACT'96, Boston, MA, USA, October 20-23,
1996},
pages = {80--86},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/PACT.1996.554030},
doi = {10.1109/PACT.1996.554030},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/LlosaGAV96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LlosaVA96,
author = {Josep Llosa and
Mateo Valero and
Eduard Ayguad{\'{e}}},
editor = {Stephen W. Melvin and
Steve Beaty},
title = {Heuristics for Register-Constrained Software Pipelining},
booktitle = {Proceedings of the 29th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 29, Paris, France, December 2-4, 1996},
pages = {250--261},
publisher = {{ACM/IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/MICRO.1996.566466},
doi = {10.1109/MICRO.1996.566466},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/LlosaVA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LlosaVA95,
author = {Josep Llosa and
Mateo Valero and
Eduard Ayguad{\'{e}}},
title = {Non-Consistent Dual Register Files to Reduce Register Pressure},
booktitle = {Proceedings of the 1st {IEEE} Symposium on High-Performance Computer
Architecture {(HPCA} 1995), Raleigh, North Carolina, USA, January
22-25, 1995},
pages = {22--31},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/HPCA.1995.386558},
doi = {10.1109/HPCA.1995.386558},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/LlosaVA95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LlosaVAG95,
author = {Josep Llosa and
Mateo Valero and
Eduard Ayguad{\'{e}} and
Antonio Gonz{\'{a}}lez},
editor = {Trevor N. Mudge and
Kemal Ebcioglu},
title = {Hypernode reduction modulo scheduling},
booktitle = {Proceedings of the 28th Annual International Symposium on Microarchitecture,
Ann Arbor, Michigan, USA, November 29 - December 1, 1995},
pages = {350--360},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/MICRO.1995.476844},
doi = {10.1109/MICRO.1995.476844},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/LlosaVAG95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/conpar/LlosaVFA94,
author = {Josep Llosa and
Mateo Valero and
Jos{\'{e}} A. B. Fortes and
Eduard Ayguad{\'{e}}},
editor = {Bruno Buchberger and
Jens Volkert},
title = {Using Sacks to Organize Registers in {VLIW} Machines},
booktitle = {Parallel Processing: {CONPAR} 94 - {VAPP} VI, Third Joint International
Conference on Vector and Parallel Processing, Linz, Austria, September
6-8, 1994, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {854},
pages = {628--639},
publisher = {Springer},
year = {1994},
url = {https://doi.org/10.1007/3-540-58430-7\_55},
doi = {10.1007/3-540-58430-7\_55},
timestamp = {Tue, 14 May 2019 10:00:55 +0200},
biburl = {https://dblp.org/rec/conf/conpar/LlosaVFA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2023-10-01 22:30 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
