BibTeX records: Seongil O

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@inproceedings{DBLP:conf/isscc/KimSAKDCKOJPJKL22,
  author       = {Dae{-}Hyun Kim and
                  Byungkyu Song and
                  Hyun{-}A. Ahn and
                  Woongjoon Ko and
                  Sung{-}Geun Do and
                  Seokjin Cho and
                  Kihan Kim and
                  Seung{-}Hoon Oh and
                  Hye{-}Yoon Joo and
                  Geuntae Park and
                  Jin{-}Hun Jang and
                  Yong{-}Hun Kim and
                  Donghun Lee and
                  Jaehoon Jung and
                  Yongmin Kwon and
                  Youngjae Kim and
                  Jaewoo Jung and
                  Seongil O and
                  Seoulmin Lee and
                  Jaeseong Lim and
                  Junho Son and
                  Jisu Min and
                  Haebin Do and
                  Jaejun Yoon and
                  Isak Hwang and
                  Jinsol Park and
                  Hong Shim and
                  Seryeong Yoon and
                  Dongyeong Choi and
                  Jihoon Lee and
                  Soohan Woo and
                  Eunki Hong and
                  Junha Choi and
                  Jae{-}Sung Kim and
                  Sangkeun Han and
                  Jong{-}Min Bang and
                  Bokgue Park and
                  Jang{-}Hoo Kim and
                  Seouk{-}Kyu Choi and
                  Gong{-}Heum Han and
                  Yoo{-}Chang Sung and
                  Wonil Bae and
                  Jeong{-}Don Lim and
                  Seungjae Lee and
                  Changsik Yoo and
                  Sang Joon Hwang and
                  Jooyoung Lee},
  title        = {A 16Gb 9.5Gb/S/pin {LPDDR5X} {SDRAM} With Low-Power Schemes Exploiting
                  Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense
                  Amplifiers in a Fourth Generation 10nm {DRAM} Process},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
                  San Francisco, CA, USA, February 20-26, 2022},
  pages        = {448--450},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ISSCC42614.2022.9731537},
  doi          = {10.1109/ISSCC42614.2022.9731537},
  timestamp    = {Sun, 30 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/KimSAKDCKOJPJKL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LeeKLKLSYLLSKOI21,
  author       = {Suk Han Lee and
                  Shinhaeng Kang and
                  Jaehoon Lee and
                  Hyeonsu Kim and
                  Eojin Lee and
                  Seungwoo Seo and
                  Hosang Yoon and
                  Seungwon Lee and
                  Kyounghwan Lim and
                  Hyunsung Shin and
                  Jinhyun Kim and
                  Seongil O and
                  Anand Iyer and
                  David Wang and
                  Kyomin Sohn and
                  Nam Sung Kim},
  title        = {Hardware Architecture and Software Stack for {PIM} Based on Commercial
                  {DRAM} Technology : Industrial Product},
  booktitle    = {48th {ACM/IEEE} Annual International Symposium on Computer Architecture,
                  {ISCA} 2021, Virtual Event / Valencia, Spain, June 14-18, 2021},
  pages        = {43--56},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISCA52012.2021.00013},
  doi          = {10.1109/ISCA52012.2021.00013},
  timestamp    = {Mon, 19 Feb 2024 07:32:07 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/LeeKLKLSYLLSKOI21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/KwonLLKRSOYLKCK21,
  author       = {Young{-}Cheon Kwon and
                  Suk Han Lee and
                  Jaehoon Lee and
                  Sang{-}Hyuk Kwon and
                  Je{-}Min Ryu and
                  Jong{-}Pil Son and
                  Seongil O and
                  Hak{-}soo Yu and
                  Haesuk Lee and
                  Soo Young Kim and
                  Youngmin Cho and
                  Jin Guk Kim and
                  Jongyoon Choi and
                  Hyunsung Shin and
                  Jin Kim and
                  BengSeng Phuah and
                  Hyoungmin Kim and
                  Myeong Jun Song and
                  Ahn Choi and
                  Daeho Kim and
                  Sooyoung Kim and
                  Eun{-}Bong Kim and
                  David Wang and
                  Shinhaeng Kang and
                  Yuhwan Ro and
                  Seungwoo Seo and
                  Joon{-}Ho Song and
                  Jaeyoun Youn and
                  Kyomin Sohn and
                  Nam Sung Kim},
  title        = {25.4 {A} 20nm 6GB Function-In-Memory DRAM, Based on {HBM2} with a
                  1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism,
                  for Machine Learning Applications},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
                  San Francisco, CA, USA, February 13-22, 2021},
  pages        = {350--352},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISSCC42613.2021.9365862},
  doi          = {10.1109/ISSCC42613.2021.9365862},
  timestamp    = {Thu, 18 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/KwonLLKRSOYLKCK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/LeeLSAKCOOAK18,
  author       = {Sukhan Lee and
                  Kiwon Lee and
                  Min Chul Sung and
                  Mohammad Alian and
                  Chankyung Kim and
                  Wooyeong Cho and
                  Reum Oh and
                  Seongil O and
                  Jung Ho Ahn and
                  Nam Sung Kim},
  editor       = {Skevos Evripidou and
                  Per Stenstr{\"{o}}m and
                  Michael F. P. O'Boyle},
  title        = {3D-Xpath: high-density managed {DRAM} architecture with cost-effective
                  alternative paths for memory transactions},
  booktitle    = {Proceedings of the 27th International Conference on Parallel Architectures
                  and Compilation Techniques, {PACT} 2018, Limassol, Cyprus, November
                  01-04, 2018},
  pages        = {22:1--22:12},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3243176.3243191},
  doi          = {10.1145/3243176.3243191},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/IEEEpact/LeeLSAKCOOAK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ChaOSHPJCJSCAK17,
  author       = {Sang{-}uhn Cha and
                  Seongil O and
                  Hyunsung Shin and
                  Sangjoon Hwang and
                  Kwang{-}Il Park and
                  Seong{-}Jin Jang and
                  Joo{-}Sun Choi and
                  Gyo{-}Young Jin and
                  Young Hoon Son and
                  Hyunyoon Cho and
                  Jung Ho Ahn and
                  Nam Sung Kim},
  title        = {Defect Analysis and Cost-Effective Resilience Architecture for Future
                  {DRAM} Devices},
  booktitle    = {2017 {IEEE} International Symposium on High Performance Computer Architecture,
                  {HPCA} 2017, Austin, TX, USA, February 4-8, 2017},
  pages        = {61--72},
  publisher    = {{IEEE} Computer Society},
  year         = {2017},
  url          = {https://doi.org/10.1109/HPCA.2017.30},
  doi          = {10.1109/HPCA.2017.30},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hpca/ChaOSHPJCJSCAK17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/LiLLAKKAOLD16,
  author       = {Sheng Li and
                  Hyeontaek Lim and
                  Victor W. Lee and
                  Jung Ho Ahn and
                  Anuj Kalia and
                  Michael Kaminsky and
                  David G. Andersen and
                  Seongil O and
                  Sukhan Lee and
                  Pradeep Dubey},
  title        = {Achieving One Billion Key-Value Requests per Second on a Single Server},
  journal      = {{IEEE} Micro},
  volume       = {36},
  number       = {3},
  pages        = {94--104},
  year         = {2016},
  url          = {https://doi.org/10.1109/MM.2016.13},
  doi          = {10.1109/MM.2016.13},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/micro/LiLLAKKAOLD16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tocs/LiLLAKKAOLD16,
  author       = {Sheng Li and
                  Hyeontaek Lim and
                  Victor W. Lee and
                  Jung Ho Ahn and
                  Anuj Kalia and
                  Michael Kaminsky and
                  David G. Andersen and
                  Seongil O and
                  Sukhan Lee and
                  Pradeep Dubey},
  title        = {Full-Stack Architecting to Achieve a Billion-Requests-Per-Second Throughput
                  on a Single Key-Value Store Server Platform},
  journal      = {{ACM} Trans. Comput. Syst.},
  volume       = {34},
  number       = {2},
  pages        = {5:1--5:30},
  year         = {2016},
  url          = {https://doi.org/10.1145/2897393},
  doi          = {10.1145/2897393},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tocs/LiLLAKKAOLD16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/OKSPA15,
  author       = {Seongil O and
                  Sanghyuk Kwon and
                  Young Hoon Son and
                  Yujin Park and
                  Jung Ho Ahn},
  title        = {{CIDR:} {A} Cache Inspired Area-Efficient {DRAM} Resilience Architecture
                  against Permanent Faults},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {17--20},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2324894},
  doi          = {10.1109/LCA.2014.2324894},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/OKSPA15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SonLSKKA15,
  author       = {Young Hoon Son and
                  Sukhan Lee and
                  Seongil O and
                  Sanghyuk Kwon and
                  Nam Sung Kim and
                  Jung Ho Ahn},
  title        = {CiDRA: {A} cache-inspired {DRAM} resilience architecture},
  booktitle    = {21st {IEEE} International Symposium on High Performance Computer Architecture,
                  {HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015},
  pages        = {502--513},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/HPCA.2015.7056058},
  doi          = {10.1109/HPCA.2015.7056058},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hpca/SonLSKKA15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/ChenLAMZXO0BJ15,
  author       = {Ke Chen and
                  Sheng Li and
                  Jung Ho Ahn and
                  Naveen Muralimanohar and
                  Jishen Zhao and
                  Cong Xu and
                  Seongil O and
                  Yuan Xie and
                  Jay B. Brockman and
                  Norman P. Jouppi},
  editor       = {Laxmi N. Bhuyan and
                  Fred Chong and
                  Vivek Sarkar},
  title        = {History-Assisted Adaptive-Granularity Caches (HAAG{\textdollar}) for
                  High Performance 3D {DRAM} Architectures},
  booktitle    = {Proceedings of the 29th {ACM} on International Conference on Supercomputing,
                  ICS'15, Newport Beach/Irvine, CA, USA, June 08 - 11, 2015},
  pages        = {251--261},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {https://doi.org/10.1145/2751205.2751227},
  doi          = {10.1145/2751205.2751227},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ics/ChenLAMZXO0BJ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LiLLAKKASLD15,
  author       = {Sheng Li and
                  Hyeontaek Lim and
                  Victor W. Lee and
                  Jung Ho Ahn and
                  Anuj Kalia and
                  Michael Kaminsky and
                  David G. Andersen and
                  Seongil O and
                  Sukhan Lee and
                  Pradeep Dubey},
  editor       = {Deborah T. Marr and
                  David H. Albonesi},
  title        = {Architecting to achieve a billion requests per second throughput on
                  a single key-value store server platform},
  booktitle    = {Proceedings of the 42nd Annual International Symposium on Computer
                  Architecture, Portland, OR, USA, June 13-17, 2015},
  pages        = {476--488},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {https://doi.org/10.1145/2749469.2750416},
  doi          = {10.1145/2749469.2750416},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/LiLLAKKASLD15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/OSKA14,
  author       = {Seongil O and
                  Young Hoon Son and
                  Nam Sung Kim and
                  Jung Ho Ahn},
  title        = {Row-buffer decoupling: {A} case for low-latency {DRAM} microarchitecture},
  booktitle    = {{ACM/IEEE} 41st International Symposium on Computer Architecture,
                  {ISCA} 2014, Minneapolis, MN, USA, June 14-18, 2014},
  pages        = {337--348},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISCA.2014.6853230},
  doi          = {10.1109/ISCA.2014.6853230},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/OSKA14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/SonSYJAKKL14,
  author       = {Young Hoon Son and
                  Seongil O and
                  Hyunggyun Yang and
                  Daejin Jung and
                  Jung Ho Ahn and
                  John Kim and
                  Jangwoo Kim and
                  Jae W. Lee},
  editor       = {Trish Damkroger and
                  Jack J. Dongarra},
  title        = {Microbank: Architecting Through-Silicon Interposer-Based Main Memory
                  Systems},
  booktitle    = {International Conference for High Performance Computing, Networking,
                  Storage and Analysis, {SC} 2014, New Orleans, LA, USA, November 16-21,
                  2014},
  pages        = {1059--1070},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/SC.2014.91},
  doi          = {10.1109/SC.2014.91},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/sc/SonSYJAKKL14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SonSRLA13,
  author       = {Young Hoon Son and
                  Seongil O and
                  Yuhwan Ro and
                  Jae W. Lee and
                  Jung Ho Ahn},
  editor       = {Avi Mendelson},
  title        = {Reducing memory access latency with asymmetric {DRAM} bank organizations},
  booktitle    = {The 40th Annual International Symposium on Computer Architecture,
                  ISCA'13, Tel-Aviv, Israel, June 23-27, 2013},
  pages        = {380--391},
  publisher    = {{ACM}},
  year         = {2013},
  url          = {https://doi.org/10.1145/2485922.2485955},
  doi          = {10.1145/2485922.2485955},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/SonSRLA13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/AhnLSJ13,
  author       = {Jung Ho Ahn and
                  Sheng Li and
                  Seongil O and
                  Norman P. Jouppi},
  title        = {McSimA+: {A} manycore simulator with application-level+ simulation
                  and detailed microarchitecture modeling},
  booktitle    = {2012 {IEEE} International Symposium on Performance Analysis of Systems
                  {\&} Software, Austin, TX, USA, 21-23 April, 2013},
  pages        = {74--85},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/ISPASS.2013.6557148},
  doi          = {10.1109/ISPASS.2013.6557148},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ispass/AhnLSJ13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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