BibTeX records: K. Parthasarathy

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@article{DBLP:journals/ijwmip/NambudiriP14,
  author       = {T. C. Easwaran Nambudiri and
                  K. Parthasarathy},
  title        = {Phase space frames and frame operators},
  journal      = {Int. J. Wavelets Multiresolution Inf. Process.},
  volume       = {12},
  number       = {6},
  year         = {2014},
  url          = {https://doi.org/10.1142/S0219691314500398},
  doi          = {10.1142/S0219691314500398},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ijwmip/NambudiriP14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsid/GhoshNP94,
  author       = {Debabrata Ghosh and
                  S. K. Nandy and
                  K. Parthasarathy},
  title        = {{TWTXBB:} {A} Low Latency, High Throughput Multiplier Architecture
                  Using a New 4 --{\textgreater} 2 Compressor},
  booktitle    = {Proceedings of the Seventh International Conference on {VLSI} Design,
                  {VLSI} Design 1994, Calcutta, India, January 5-8, 1994},
  pages        = {77--82},
  publisher    = {{IEEE} Computer Society},
  year         = {1994},
  url          = {https://doi.org/10.1109/ICVD.1994.282660},
  doi          = {10.1109/ICVD.1994.282660},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/GhoshNP94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsid/RathnaNP94,
  author       = {G. N. Rathna and
                  S. K. Nandy and
                  K. Parthasarathy},
  title        = {A Methodology for Architecture Synthesis of Cascaded {IIR} Filters
                  on {TLU} FPGAs},
  booktitle    = {Proceedings of the Seventh International Conference on {VLSI} Design,
                  {VLSI} Design 1994, Calcutta, India, January 5-8, 1994},
  pages        = {225--228},
  publisher    = {{IEEE} Computer Society},
  year         = {1994},
  url          = {https://doi.org/10.1109/ICVD.1994.282690},
  doi          = {10.1109/ICVD.1994.282690},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/RathnaNP94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/GhoshNSP93,
  author       = {Debabrata Ghosh and
                  S. K. Nandy and
                  P. Sadayappan and
                  K. Parthasarathy},
  editor       = {Alfred E. Dunlop},
  title        = {Architectural Synthesis of Performance-Driven Multipliers with Accumulator
                  Interleaving},
  booktitle    = {Proceedings of the 30th Design Automation Conference. Dallas, Texas,
                  USA, June 14-18, 1993},
  pages        = {303--307},
  publisher    = {{ACM} Press},
  year         = {1993},
  url          = {https://doi.org/10.1145/157485.164902},
  doi          = {10.1145/157485.164902},
  timestamp    = {Tue, 27 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/dac/GhoshNSP93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsid/GhoshNPV93,
  author       = {Debabrata Ghosh and
                  S. K. Nandy and
                  K. Parthasarathy and
                  V. Visvanathan},
  title        = {{NPCPL:} Normal Process Complementary Pass Transistor Logic for Low
                  Latency, High Throughput Designs},
  booktitle    = {Proceedings of the Sixth International Conference on {VLSI} Design,
                  {VLSI} Design 1993, Bombay, India, January 3-6, 1993},
  pages        = {341--346},
  publisher    = {{IEEE} Computer Society},
  year         = {1993},
  url          = {https://doi.org/10.1109/ICVD.1993.669707},
  doi          = {10.1109/ICVD.1993.669707},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/GhoshNPV93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/isci/SridharSP87,
  author       = {M. K. Sridhar and
                  R. Srinath and
                  K. Parthasarathy},
  title        = {On the direct parallel solution of systems of linear equations: New
                  algorithms and systolic structures},
  journal      = {Inf. Sci.},
  volume       = {43},
  number       = {1-2},
  pages        = {25--53},
  year         = {1987},
  url          = {https://doi.org/10.1016/0020-0255(87)90030-2},
  doi          = {10.1016/0020-0255(87)90030-2},
  timestamp    = {Sat, 27 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/isci/SridharSP87.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/pieee/FakruddinP85,
  author       = {D. B. Fakruddin and
                  K. Parthasarathy},
  title        = {Simplified algorithms based on Haar transforms for signal recognition
                  in protective relays},
  journal      = {Proc. {IEEE}},
  volume       = {73},
  number       = {5},
  pages        = {940--942},
  year         = {1985},
  url          = {https://doi.org/10.1109/PROC.1985.13222},
  doi          = {10.1109/PROC.1985.13222},
  timestamp    = {Tue, 30 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/pieee/FakruddinP85.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}