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ORCIDBibTeX records: Janak H. Patel
@inproceedings{DBLP:conf/iccd/LaiPRC05,
author = {Liyang Lai and
Janak H. Patel and
Thomas Rinderknecht and
Wu{-}Tung Cheng},
title = {Hardware Ef.cient LBISTWith Complementary Weights},
booktitle = {23rd International Conference on Computer Design {(ICCD} 2005), 2-5
October 2005, San Jose, CA, {USA}},
pages = {479--484},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ICCD.2005.63},
doi = {10.1109/ICCD.2005.63},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LaiPRC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/XiangP04,
author = {Dong Xiang and
Janak H. Patel},
title = {Partial Scan Design Based on Circuit State Information and Functional
Analysis},
journal = {{IEEE} Trans. Computers},
volume = {53},
number = {3},
pages = {276--287},
year = {2004},
url = {https://doi.org/10.1109/TC.2004.1261835},
doi = {10.1109/TC.2004.1261835},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/XiangP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip/IyerSPK04,
author = {Ravishankar K. Iyer and
William H. Sanders and
Janak H. Patel and
Zbigniew Kalbarczyk},
editor = {Ren{\'{e}} Jacquart},
title = {The evolution of dependable computing at the University of Illinois},
booktitle = {Building the Information Society, {IFIP} 18th World Computer Congress,
Topical Sessions, 22-27 August 2004, Toulouse, France},
series = {{IFIP}},
volume = {156},
pages = {135--164},
publisher = {Kluwer/Springer},
year = {2004},
url = {https://doi.org/10.1007/978-1-4020-8157-6\_15},
doi = {10.1007/978-1-4020-8157-6\_15},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip/IyerSPK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ShahP04,
author = {Mihir A. Shah and
Janak H. Patel},
title = {Enhancement of the Illinois Scan Architecture for Use with Multiple
Scan Inputs},
booktitle = {2004 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2004), Emerging Trends in {VLSI} Systems Design, 19-20 February 2004,
Lafayette, LA, {USA}},
pages = {167--172},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ISVLSI.2004.1339525},
doi = {10.1109/ISVLSI.2004.1339525},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ShahP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LaiPRC04,
author = {Liyang Lai and
Janak H. Patel and
Thomas Rinderknecht and
Wu{-}Tung Cheng},
title = {Logic {BIST} with Scan Chain Segmentation},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {57--66},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1386937},
doi = {10.1109/TEST.2004.1386937},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/LaiPRC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SharmaP04,
author = {Manish Sharma and
Janak H. Patel},
title = {What Does Robust Testing a Subset of Paths, Tell us about the Untested
Paths in the Circuit?},
booktitle = {22nd {IEEE} {VLSI} Test Symposium {(VTS} 2004), 25-29 April 2004,
Napa Valley, CA, {USA}},
pages = {31--36},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/VTEST.2004.1299222},
doi = {10.1109/VTEST.2004.1299222},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SharmaP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LaiRCP04,
author = {Liyang Lai and
Thomas Rinderknecht and
Wu{-}Tung Cheng and
Janak H. Patel},
title = {Logic {BIST} Using Constrained Scan Cells},
booktitle = {22nd {IEEE} {VLSI} Test Symposium {(VTS} 2004), 25-29 April 2004,
Napa Valley, CA, {USA}},
pages = {199--205},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/VTEST.2004.1299244},
doi = {10.1109/VTEST.2004.1299244},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LaiRCP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SharmaPR03,
author = {Manish Sharma and
Janak H. Patel and
Jeff Rearick},
title = {Test Data Compression and Test Time Reduction of Longest-Path-Per-Gate
Tests based on Illinois Scan Architecture},
booktitle = {21st {IEEE} {VLSI} Test Symposium {(VTS} 2003), 27 April - 1 May 2003,
Napa Valley, CA, {USA}},
pages = {15--21},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/VTEST.2003.1197628},
doi = {10.1109/VTEST.2003.1197628},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SharmaPR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PatelLR03,
author = {Janak H. Patel and
Steven S. Lumetta and
Sudhakar M. Reddy},
title = {Application of Saluja-Karpovsky Compactors to Test Responses with
Many Unknowns},
booktitle = {21st {IEEE} {VLSI} Test Symposium {(VTS} 2003), 27 April - 1 May 2003,
Napa Valley, CA, {USA}},
pages = {107--112},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/VTEST.2003.1197640},
doi = {10.1109/VTEST.2003.1197640},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PatelLR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PandeyP02,
author = {Amit R. Pandey and
Janak H. Patel},
title = {An Incremental Algorithm for Test Generation in Illinois Scan Architecture
Based Designs},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {368--375},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998300},
doi = {10.1109/DATE.2002.998300},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/PandeyP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SharmaP02,
author = {Manish Sharma and
Janak H. Patel},
title = {Finding a Small Set of Longest Testable Paths that Cover Every Gate},
booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
MD, USA, October 7-10, 2002},
pages = {974--982},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/TEST.2002.1041853},
doi = {10.1109/TEST.2002.1041853},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SharmaP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PandeyP02,
author = {Amit R. Pandey and
Janak H. Patel},
title = {Reconfiguration Technique for Reducing Test Time and Test Data Volume
in Illinois Scan Architecture Based Designs},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {9--15},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011104},
doi = {10.1109/VTS.2002.1011104},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PandeyP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/HartantoVFRPC01,
author = {Ismed Hartanto and
Srikanth Venkataraman and
W. Kent Fuchs and
Elizabeth M. Rudnick and
Janak H. Patel and
Sreejit Chakravarty},
title = {Diagnostic simulation of stuck-at faults in sequential circuits using
compact lists},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {6},
number = {4},
pages = {471--489},
year = {2001},
url = {https://doi.org/10.1145/502175.502177},
doi = {10.1145/502175.502177},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/HartantoVFRPC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/HsuBP01,
author = {Frank F. Hsu and
Kenneth M. Butler and
Janak H. Patel},
title = {A case study on the implementation of the Illinois Scan Architecture},
booktitle = {Proceedings {IEEE} International Test Conference 2001, Baltimore,
MD, USA, 30 October - 1 November 2001},
pages = {538--547},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/TEST.2001.966672},
doi = {10.1109/TEST.2001.966672},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/HsuBP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SharmaP01,
author = {Manish Sharma and
Janak H. Patel},
title = {Testing of critical paths for delay faults},
booktitle = {Proceedings {IEEE} International Test Conference 2001, Baltimore,
MD, USA, 30 October - 1 November 2001},
pages = {634--641},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/TEST.2001.966683},
doi = {10.1109/TEST.2001.966683},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SharmaP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ZhaoNP01,
author = {Jian{-}Kun Zhao and
Jeffrey A. Newquist and
Janak H. Patel},
title = {A Graph Traversal Based Framework For Sequential Logic Implication
With An Application To C-Cycle Redundancy Identification},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {163},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902656},
doi = {10.1109/ICVD.2001.902656},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ZhaoNP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HamzaogluP00,
author = {Ilker Hamzaoglu and
Janak H. Patel},
title = {Test set compaction algorithms for combinational circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {19},
number = {8},
pages = {957--963},
year = {2000},
url = {https://doi.org/10.1109/43.856980},
doi = {10.1109/43.856980},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HamzaogluP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/HsiaoRP00,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Dynamic state traversal for sequential circuit test generation},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {5},
number = {3},
pages = {548--565},
year = {2000},
url = {https://doi.org/10.1145/348019.348288},
doi = {10.1145/348019.348288},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/HsiaoRP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/HsiaoRP00,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Peak power estimation of {VLSI} circuits: new peak power measures},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {8},
number = {4},
pages = {435--439},
year = {2000},
url = {https://doi.org/10.1109/92.863624},
doi = {10.1109/92.863624},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/HsiaoRP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HamzaogluP00,
author = {Ilker Hamzaoglu and
Janak H. Patel},
editor = {Ellen Sentovich},
title = {Deterministic Test Pattern Generation Techniques for Sequential Circuits},
booktitle = {Proceedings of the 2000 {IEEE/ACM} International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000},
pages = {538--543},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICCAD.2000.896528},
doi = {10.1109/ICCAD.2000.896528},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HamzaogluP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SharmaP00,
author = {Manish Sharma and
Janak H. Patel},
title = {Enhanced delay defect coverage with path-segments},
booktitle = {Proceedings {IEEE} International Test Conference 2000, Atlantic City,
NJ, USA, October 2000},
pages = {385--392},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/TEST.2000.894228},
doi = {10.1109/TEST.2000.894228},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SharmaP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SharmaP00,
author = {Manish Sharma and
Janak H. Patel},
title = {Bounding Circuit Delay by Testing a Very Small Subset of Paths},
booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000,
Montreal, Canada},
pages = {333--342},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/VTEST.2000.843863},
doi = {10.1109/VTEST.2000.843863},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SharmaP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HamzaogluP00,
author = {Ilker Hamzaoglu and
Janak H. Patel},
title = {Reducing Test Application Time for Built-in-Self-Test Test Pattern
Generators},
booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000,
Montreal, Canada},
pages = {369--376},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/VTEST.2000.843867},
doi = {10.1109/VTEST.2000.843867},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HamzaogluP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/HamzaogluP99,
author = {Ilker Hamzaoglu and
Janak H. Patel},
title = {New Techniques for Deterministic Test Pattern Generation},
journal = {J. Electron. Test.},
volume = {15},
number = {1-2},
pages = {63--73},
year = {1999},
url = {https://doi.org/10.1023/A:1008355411566},
doi = {10.1023/A:1008355411566},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/HamzaogluP99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/HsiaoRP99,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Fast Static Compaction Algorithms for Sequential Circuit Test Vectors},
journal = {{IEEE} Trans. Computers},
volume = {48},
number = {3},
pages = {311--322},
year = {1999},
url = {https://doi.org/10.1109/12.754997},
doi = {10.1109/12.754997},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/HsiaoRP99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/RudnickP99,
author = {Elizabeth M. Rudnick and
Janak H. Patel},
title = {Efficient Techniques for Dynamic Test Sequence Compaction},
journal = {{IEEE} Trans. Computers},
volume = {48},
number = {3},
pages = {323--330},
year = {1999},
url = {https://doi.org/10.1109/12.754998},
doi = {10.1109/12.754998},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/RudnickP99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/HamzaogluP99,
author = {Ilker Hamzaoglu and
Janak H. Patel},
title = {Reducing Test Application Time for Full Scan Embedded Cores},
booktitle = {Digest of Papers: FTCS-29, The Twenty-Ninth Annual International Symposium
on Fault-Tolerant Computing, Madison, Wisconsin, USA, June 15-18,
1999},
pages = {260--267},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/FTCS.1999.781060},
doi = {10.1109/FTCS.1999.781060},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ftcs/HamzaogluP99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KalbarczykPLI99,
author = {Zbigniew Kalbarczyk and
Janak H. Patel and
Myeong S. Lee and
Ravishankar K. Iyer},
title = {An Approach to Evaluating the Effects of Realistic Faults in Digital
Circuits},
booktitle = {12th International Conference on {VLSI} Design {(VLSI} Design 1999),
10-13 January 1999, Goa, India},
pages = {260--265},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICVD.1999.745158},
doi = {10.1109/ICVD.1999.745158},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KalbarczykPLI99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HeraguPA99,
author = {Keerthi Heragu and
Janak H. Patel and
Vishwani D. Agrawal},
title = {A Test Generator for Segment Delay Faults},
booktitle = {12th International Conference on {VLSI} Design {(VLSI} Design 1999),
10-13 January 1999, Goa, India},
pages = {484--491},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICVD.1999.745202},
doi = {10.1109/ICVD.1999.745202},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HeraguPA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/HsuP98,
author = {Frank F. Hsu and
Janak H. Patel},
title = {High-Level Controllability and Observability Analysis for Test Synthesis},
journal = {J. Electron. Test.},
volume = {13},
number = {2},
pages = {93--103},
year = {1998},
url = {https://doi.org/10.1023/A:1008349603232},
doi = {10.1023/A:1008349603232},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/HsuP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HsiaoRP98,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Application of genetically engineered finite-state-machine sequences
to sequential circuit {ATPG}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {17},
number = {3},
pages = {239--254},
year = {1998},
url = {https://doi.org/10.1109/43.700722},
doi = {10.1109/43.700722},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HsiaoRP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HsuP98,
author = {Frank F. Hsu and
Janak H. Patel},
editor = {Hiroto Yasuura},
title = {High-level variable selection for partial-scan implementation},
booktitle = {Proceedings of the 1998 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1998, San Jose, CA, USA, November 8-12, 1998},
pages = {79--84},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1145/288548.288564},
doi = {10.1145/288548.288564},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HsuP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HamzaogluP98,
author = {Ilker Hamzaoglu and
Janak H. Patel},
editor = {Hiroto Yasuura},
title = {Test set compaction algorithms for combinational circuits},
booktitle = {Proceedings of the 1998 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1998, San Jose, CA, USA, November 8-12, 1998},
pages = {283--289},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1145/288548.288615},
doi = {10.1145/288548.288615},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HamzaogluP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/CornoPRRV98,
author = {Fulvio Corno and
Janak H. Patel and
Elizabeth M. Rudnick and
Matteo Sonza Reorda and
Roberto Vietti},
title = {Enhancing topological {ATPG} with high-level information and symbolic
techniques},
booktitle = {International Conference on Computer Design: {VLSI} in Computers and
Processors, {ICCD} 1998, Proceedings, 5-7 October, 1998, Austin, TX,
{USA}},
pages = {504--509},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ICCD.1998.727096},
doi = {10.1109/ICCD.1998.727096},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/CornoPRRV98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Patel98,
author = {Janak H. Patel},
editor = {Gurindar S. Sohi},
title = {Retrospective: Improving the Throughput of a Pipeline by Insertion
of Delays},
booktitle = {25 Years of the International Symposia on Computer Architecture (Selected
Papers)},
pages = {5},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/285930.285933},
doi = {10.1145/285930.285933},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/Patel98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Patel98a,
author = {Janak H. Patel},
editor = {Gurindar S. Sohi},
title = {Retrospective: {A} Low-Overhead Coherence Solution for Multiprocessors
with Private Cache Memories},
booktitle = {25 Years of the International Symposia on Computer Architecture (Selected
Papers)},
pages = {39--41},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/285930.285947},
doi = {10.1145/285930.285947},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Patel98a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PatelD98,
author = {Janak H. Patel and
Edward S. Davidson},
editor = {Gurindar S. Sohi},
title = {Improving the Throughput of a Pipeline by Insertion of Delays},
booktitle = {25 Years of the International Symposia on Computer Architecture (Selected
Papers)},
pages = {132--137},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/285930.285973},
doi = {10.1145/285930.285973},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/PatelD98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PapamarcosP98,
author = {Mark S. Papamarcos and
Janak H. Patel},
editor = {Gurindar S. Sohi},
title = {A Low-Overhead Coherence Solution for Multiprocessors with Private
Cache Memories},
booktitle = {25 Years of the International Symposia on Computer Architecture (Selected
Papers)},
pages = {284--290},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/285930.285987},
doi = {10.1145/285930.285987},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/PapamarcosP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/HamzaogluP98,
author = {Ilker Hamzaoglu and
Janak H. Patel},
title = {Compact two-pattern test set generation for combinational and full
scan circuits},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {944--953},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743288},
doi = {10.1109/TEST.1998.743288},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/HamzaogluP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Butler97a,
author = {Janak H. Patel},
title = {Stuck-at fault: a fault model for the next millennium},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {1166},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743358},
doi = {10.1109/TEST.1998.743358},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Butler97a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HsiaoSRP98,
author = {Michael S. Hsiao and
Gurjeet S. Saund and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Partial Scan Selection Based on Dynamic Reachability and Observability
Information},
booktitle = {11th International Conference on {VLSI} Design {(VLSI} Design 1991),
4-7 January 1998, Chennai, India},
pages = {174--180},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ICVD.1998.646598},
doi = {10.1109/ICVD.1998.646598},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HsiaoSRP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VenkataramanFP98,
author = {Srikanth Venkataraman and
W. Kent Fuchs and
Janak H. Patel},
title = {Diagnostic Simulation of Sequential Circuits Using Fault Sampling},
booktitle = {11th International Conference on {VLSI} Design {(VLSI} Design 1991),
4-7 January 1998, Chennai, India},
pages = {476--481},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ICVD.1998.646652},
doi = {10.1109/ICVD.1998.646652},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VenkataramanFP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HamzaogluP98,
author = {Ilker Hamzaoglu and
Janak H. Patel},
title = {New Techniques for Deterministic Test Pattern Generation},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {446--452},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670910},
doi = {10.1109/VTEST.1998.670910},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HamzaogluP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/HsuP97,
author = {Frank F. Hsu and
Janak H. Patel},
title = {Design for Testability Using State Distances},
journal = {J. Electron. Test.},
volume = {11},
number = {1},
pages = {93--100},
year = {1997},
url = {https://doi.org/10.1023/A:1008204118797},
doi = {10.1023/A:1008204118797},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/HsuP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HeraguABP97,
author = {Keerthi Heragu and
Vishwani D. Agrawal and
Michael L. Bushnell and
Janak H. Patel},
title = {Improving a nonenumerative method to estimate path delay fault coverage},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {16},
number = {7},
pages = {759--762},
year = {1997},
url = {https://doi.org/10.1109/43.644037},
doi = {10.1109/43.644037},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HeraguABP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RudnickPGN97,
author = {Elizabeth M. Rudnick and
Janak H. Patel and
Gary S. Greenstein and
Thomas M. Niermann},
title = {A genetic algorithm framework for test generation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {16},
number = {9},
pages = {1034--1044},
year = {1997},
url = {https://doi.org/10.1109/43.658571},
doi = {10.1109/43.658571},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RudnickPGN97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ThadikaranCP97,
author = {Paul J. Thadikaran and
Sreejit Chakravarty and
Janak H. Patel},
title = {Algorithms to compute bridging fault coverage of \emph{I\({}_{\mbox{DDQ}}\)}
test sets},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {2},
number = {3},
pages = {281--305},
year = {1997},
url = {https://doi.org/10.1145/264995.264999},
doi = {10.1145/264995.264999},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/ThadikaranCP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HsiaoRP97,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Sequential circuit test generation using dynamic state traversal},
booktitle = {European Design and Test Conference, ED{\&}TC '97, Paris, France,
17-20 March 1997},
pages = {22--28},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/EDTC.1997.582325},
doi = {10.1109/EDTC.1997.582325},
timestamp = {Fri, 20 May 2022 15:59:03 +0200},
biburl = {https://dblp.org/rec/conf/date/HsiaoRP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/SaundHP97,
author = {Gurjeet S. Saund and
Michael S. Hsiao and
Janak H. Patel},
title = {Partial Scan beyond Cycle Cutting},
booktitle = {Digest of Papers: FTCS-27, The Twenty-Seventh Annual International
Symposium on Fault-Tolerant Computing, Seattle, Washington, USA, June
24-27, 1997},
pages = {320--328},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/FTCS.1997.614106},
doi = {10.1109/FTCS.1997.614106},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ftcs/SaundHP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HsiaoRP97,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
editor = {Ralph H. J. M. Otten and
Hiroto Yasuura},
title = {Effects of delay models on peak power estimation of {VLSI} sequential
circuits},
booktitle = {Proceedings of the 1997 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1997, San Jose, CA, USA, November 9-13, 1997},
pages = {45--51},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1997},
url = {https://doi.org/10.1109/ICCAD.1997.643360},
doi = {10.1109/ICCAD.1997.643360},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HsiaoRP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HeraguPA97,
author = {Keerthi Heragu and
Janak H. Patel and
Vishwani D. Agrawal},
editor = {Ralph H. J. M. Otten and
Hiroto Yasuura},
title = {Fast identification of untestable delay faults using implications},
booktitle = {Proceedings of the 1997 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1997, San Jose, CA, USA, November 9-13, 1997},
pages = {642--647},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1997},
url = {https://doi.org/10.1109/ICCAD.1997.643606},
doi = {10.1109/ICCAD.1997.643606},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HeraguPA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/HsiaoRP97,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
editor = {Brock Barton and
Massoud Pedram and
Anantha P. Chandrakasan and
Sayfe Kiaei},
title = {{K2:} an estimator for peak sustainable power of {VLSI} circuits},
booktitle = {Proceedings of the 1997 International Symposium on Low Power Electronics
and Design, 1997, Monterey, California, USA, August 18-20, 1997},
pages = {178--183},
publisher = {{ACM}},
year = {1997},
url = {https://doi.org/10.1145/263272.263321},
doi = {10.1145/263272.263321},
timestamp = {Mon, 27 Sep 2021 11:47:11 +0200},
biburl = {https://dblp.org/rec/conf/islped/HsiaoRP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/RudnickP97,
author = {Elizabeth M. Rudnick and
Janak H. Patel},
title = {Putting the Squeeze on Test Sequences},
booktitle = {Proceedings {IEEE} International Test Conference 1997, Washington,
DC, USA, November 3-5, 1997},
pages = {723--732},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/TEST.1997.639685},
doi = {10.1109/TEST.1997.639685},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/RudnickP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/CuseyP97,
author = {James P. Cusey and
Janak H. Patel},
title = {{BART:} {A} Bridging Fault Test Generation for Sequential Circuits},
booktitle = {Proceedings {IEEE} International Test Conference 1997, Washington,
DC, USA, November 3-5, 1997},
pages = {838--847},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/TEST.1997.639698},
doi = {10.1109/TEST.1997.639698},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/CuseyP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pads/KrishnaswamyBRP97,
author = {Dilip Krishnaswamy and
Prithviraj Banerjee and
Elizabeth M. Rudnick and
Janak H. Patel},
editor = {Alois Ferscha and
Rassul Ayani and
Carl Tropper},
title = {Asynchronous Parallel Algorithms for Test Set Partitioned Fault Simulation},
booktitle = {Proceedings of the Eleventh Workshop on Parallel and Distributed Simulation,
{PADS} '97, Lockenhaus, Austria, June 10-13, 1997},
pages = {30--37},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/PADS.1997.594583},
doi = {10.1109/PADS.1997.594583},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pads/KrishnaswamyBRP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KrishnaswamyHSRPB97,
author = {Dilip Krishnaswamy and
Michael S. Hsiao and
Vikram Saxena and
Elizabeth M. Rudnick and
Janak H. Patel and
Prithviraj Banerjee},
title = {Parallel Genetic Algorithms for Simulation-Based Sequential Circuit
Test Generation},
booktitle = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
4-7 January 1997, Hyderabad, India},
pages = {475--481},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICVD.1997.568180},
doi = {10.1109/ICVD.1997.568180},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KrishnaswamyHSRPB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RudnickP97,
author = {Elizabeth M. Rudnick and
Janak H. Patel},
title = {Overcoming the Serial Logic Simulation Bottleneck in Parallel Fault
Simulation},
booktitle = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
4-7 January 1997, Hyderabad, India},
pages = {495--503},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICVD.1997.568183},
doi = {10.1109/ICVD.1997.568183},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RudnickP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GrahamRP97,
author = {Charles R. Graham and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Dynamic Fault Grouping for {PROOFS:} {A} Win for Large Sequential
Circuits},
booktitle = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
4-7 January 1997, Hyderabad, India},
pages = {542--544},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICVD.1997.568204},
doi = {10.1109/ICVD.1997.568204},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GrahamRP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HsiaoRP97,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Fast Algorithms for Static Compaction of Sequential Circuit Test Vectors},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {188--195},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600260},
doi = {10.1109/VTEST.1997.600260},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HsiaoRP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HartantoBPF97,
author = {Ismed Hartanto and
Vamsi Boppana and
Janak H. Patel and
W. Kent Fuchs},
title = {Diagnostic Test Pattern Generation for Sequential Circuits},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {196--202},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600264},
doi = {10.1109/VTEST.1997.600264},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HartantoBPF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KrishnaswamyRPB97,
author = {Dilip Krishnaswamy and
Elizabeth M. Rudnick and
Janak H. Patel and
Prithviraj Banerjee},
title = {{SPITFIRE:} scalable parallel algorithms for test set partitioned
fault simulation},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {274--281},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600663},
doi = {10.1109/VTEST.1997.600663},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KrishnaswamyRPB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ZhaoRP97,
author = {Jian{-}Kun Zhao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Static logic implication with application to redundancy identification},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {288--295},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600290},
doi = {10.1109/VTEST.1997.600290},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ZhaoRP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChaRPIC96,
author = {Hungse Cha and
Elizabeth M. Rudnick and
Janak H. Patel and
Ravishankar K. Iyer and
Gwan S. Choi},
title = {A Gate-Level Simulation Environment for Alpha-Particle-Induced Transient
Faults},
journal = {{IEEE} Trans. Computers},
volume = {45},
number = {11},
pages = {1248--1256},
year = {1996},
url = {https://doi.org/10.1109/12.544481},
doi = {10.1109/12.544481},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChaRPIC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeeP96,
author = {Jaushin Lee and
Janak H. Patel},
title = {Hierarchical test generation under architectural level functional
constraints},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {15},
number = {9},
pages = {1144--1151},
year = {1996},
url = {https://doi.org/10.1109/43.536720},
doi = {10.1109/43.536720},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LeeP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/XiangVFP96,
author = {Dong Xiang and
Srikanth Venkataraman and
W. Kent Fuchs and
Janak H. Patel},
editor = {Thomas Pennino and
Ellen J. Yoffa},
title = {Partial Scan Design Based on Circuit State Information},
booktitle = {Proceedings of the 33st Conference on Design Automation, Las Vegas,
Nevada, USA, Las Vegas Convention Center, June 3-7, 1996},
pages = {807--812},
publisher = {{ACM} Press},
year = {1996},
url = {https://doi.org/10.1145/240518.240670},
doi = {10.1145/240518.240670},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/XiangVFP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HsiaoRP96,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Alternating Strategies for Sequential Circuit {ATPG}},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {368--374},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494327},
doi = {10.1109/EDTC.1996.494327},
timestamp = {Fri, 20 May 2022 15:52:30 +0200},
biburl = {https://dblp.org/rec/conf/date/HsiaoRP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PomeranzRP96,
author = {Irith Pomeranz and
Sudhakar M. Reddy and
Janak H. Patel},
title = {On Double Transition Faults as a Delay Fault Model},
booktitle = {6th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '96), March 22-23,
1996, Ames, IA, {USA}},
pages = {282--287},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/GLSV.1996.497634},
doi = {10.1109/GLSV.1996.497634},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PomeranzRP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/RudnickP96,
author = {Elizabeth M. Rudnick and
Janak H. Patel},
editor = {Rob A. Rutenbar and
Ralph H. J. M. Otten},
title = {Simulation-based techniques for dynamic test sequence compaction},
booktitle = {Proceedings of the 1996 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1996, San Jose, CA, USA, November 10-14, 1996},
pages = {67--73},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1996},
url = {https://doi.org/10.1109/ICCAD.1996.568942},
doi = {10.1109/ICCAD.1996.568942},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/RudnickP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HsuRP96,
author = {Frank F. Hsu and
Elizabeth M. Rudnick and
Janak H. Patel},
editor = {Rob A. Rutenbar and
Ralph H. J. M. Otten},
title = {Enhancing high-level control-flow for improved testability},
booktitle = {Proceedings of the 1996 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1996, San Jose, CA, USA, November 10-14, 1996},
pages = {322--328},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1996},
url = {https://doi.org/10.1109/ICCAD.1996.569720},
doi = {10.1109/ICCAD.1996.569720},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HsuRP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HeraguPA96,
author = {Keerthi Heragu and
Janak H. Patel and
Vishwani D. Agrawal},
editor = {Rob A. Rutenbar and
Ralph H. J. M. Otten},
title = {{SIGMA:} a simulator for segment delay faults},
booktitle = {Proceedings of the 1996 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1996, San Jose, CA, USA, November 10-14, 1996},
pages = {502--508},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1996},
url = {https://doi.org/10.1109/ICCAD.1996.569902},
doi = {10.1109/ICCAD.1996.569902},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HeraguPA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/HsuRP96,
author = {Frank F. Hsu and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Testability Insertion in Behavioral Descriptions},
booktitle = {Proceedings of the 9th International Symposium on System Synthesis,
{ISSS} '96, San Diego, CA, USA, November 6-8, 1996},
pages = {139--144},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ISSS.1996.565896},
doi = {10.1109/ISSS.1996.565896},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isss/HsuRP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/RudnickPP96,
author = {Elizabeth M. Rudnick and
Janak H. Patel and
Irith Pomeranz},
title = {On Potential Fault Detection in Sequential Circuits},
booktitle = {Proceedings {IEEE} International Test Conference 1996, Test and Design
Validity, Washington, DC, USA, October 20-25, 1996},
pages = {142--149},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/TEST.1996.556956},
doi = {10.1109/TEST.1996.556956},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/RudnickPP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/XiangP96,
author = {Dong Xiang and
Janak H. Patel},
title = {A Global Algorithm for the Partial Scan Design Problem Using Circuit
State Information},
booktitle = {Proceedings {IEEE} International Test Conference 1996, Test and Design
Validity, Washington, DC, USA, October 20-25, 1996},
pages = {548--557},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/TEST.1996.557081},
doi = {10.1109/TEST.1996.557081},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/XiangP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HeraguPA96,
author = {Keerthi Heragu and
Janak H. Patel and
Vishwani D. Agrawal},
title = {Improving accuracy in path delay fault coverage estimation},
booktitle = {9th International Conference on {VLSI} Design {(VLSI} Design 1996),
3-6 January 1996, Bangalore, India},
pages = {422--425},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ICVD.1996.489646},
doi = {10.1109/ICVD.1996.489646},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HeraguPA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HeraguPA96,
author = {Keerthi Heragu and
Janak H. Patel and
Vishwani D. Agrawal},
title = {Segment delay faults: a new fault model},
booktitle = {14th {IEEE} {VLSI} Test Symposium (VTS'96), April 28 - May 1, 1996,
Princeton, NJ, {USA}},
pages = {32--41},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/VTEST.1996.510832},
doi = {10.1109/VTEST.1996.510832},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HeraguPA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HsiaoRP96,
author = {Michael S. Hsiao and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Automatic test generation using genetically-engineered distinguishing
sequences},
booktitle = {14th {IEEE} {VLSI} Test Symposium (VTS'96), April 28 - May 1, 1996,
Princeton, NJ, {USA}},
pages = {216--223},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/VTEST.1996.510860},
doi = {10.1109/VTEST.1996.510860},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HsiaoRP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LeeHRP96,
author = {Terry Lee and
Ibrahim N. Hajj and
Elizabeth M. Rudnick and
Janak H. Patel},
title = {Genetic-algorithm-based test generation for current testing of bridging
faults in {CMOS} {VLSI} circuits},
booktitle = {14th {IEEE} {VLSI} Test Symposium (VTS'96), April 28 - May 1, 1996,
Princeton, NJ, {USA}},
pages = {456--462},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/VTEST.1996.510893},
doi = {10.1109/VTEST.1996.510893},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LeeHRP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/RudnickCBP95,
author = {Elizabeth M. Rudnick and
Vivek Chickermane and
Prithviraj Banerjee and
Janak H. Patel},
title = {Sequential circuit testability enhancement using a nonscan approach},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {3},
number = {2},
pages = {333--338},
year = {1995},
url = {https://doi.org/10.1109/92.386233},
doi = {10.1109/92.386233},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/RudnickCBP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HaradaP95,
author = {Eiji Harada and
Janak H. Patel},
title = {Overhead reduction techniques for hierarchical fault simulation},
booktitle = {4th Asian Test Symposium {(ATS} '95), November 23-24, 1995. Bangalore,
India},
pages = {79--85},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ATS.1995.485320},
doi = {10.1109/ATS.1995.485320},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/HaradaP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/VenkataramanHFRCP95,
author = {Srikanth Venkataraman and
Ismed Hartanto and
W. Kent Fuchs and
Elizabeth M. Rudnick and
Sreejit Chakravarty and
Janak H. Patel},
editor = {Bryan Preas},
title = {Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential
Circuits Using Compact Lists},
booktitle = {Proceedings of the 32st Conference on Design Automation, San Francisco,
California, USA, Moscone Center, June 12-16, 1995},
pages = {133--138},
publisher = {{ACM} Press},
year = {1995},
url = {https://doi.org/10.1145/217474.217519},
doi = {10.1145/217474.217519},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/VenkataramanHFRCP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/RudnickP95,
author = {Elizabeth M. Rudnick and
Janak H. Patel},
editor = {Bryan Preas},
title = {Combining Deterministic and Genetic Approaches for Sequential Circuit
Test Generation},
booktitle = {Proceedings of the 32st Conference on Design Automation, San Francisco,
California, USA, Moscone Center, June 12-16, 1995},
pages = {183--188},
publisher = {{ACM} Press},
year = {1995},
url = {https://doi.org/10.1145/217474.217527},
doi = {10.1145/217474.217527},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/RudnickP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/ThadikaranCP95,
author = {Paul J. Thadikaran and
Sreejit Chakravarty and
Janak H. Patel},
title = {Fault Simulation of\emph{I\({}_{\mbox{DDQ}}\)} Tests for Bridging
Faults in Sequential Circuits},
booktitle = {Digest of Papers: FTCS-25, The Twenty-Fifth International Symposium
on Fault-Tolerant Computing, Pasadena, California, USA, June 27-30,
1995},
pages = {340--349},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/FTCS.1995.466965},
doi = {10.1109/FTCS.1995.466965},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ftcs/ThadikaranCP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ParkesBP95,
author = {Steven Parkes and
Prithviraj Banerjee and
Janak H. Patel},
title = {A parallel algorithm for fault simulation based on {PROOFS}},
booktitle = {1995 International Conference on Computer Design {(ICCD} '95), {VLSI}
in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings},
pages = {616--621},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICCD.1995.528932},
doi = {10.1109/ICCD.1995.528932},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ParkesBP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HsiaoP95,
author = {Michael S. Hsiao and
Janak H. Patel},
title = {A new architectural-level fault simulation using propagation prediction
of grouped fault-effects},
booktitle = {1995 International Conference on Computer Design {(ICCD} '95), {VLSI}
in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings},
pages = {628--635},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICCD.1995.528934},
doi = {10.1109/ICCD.1995.528934},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HsiaoP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RudnickP95,
author = {Elizabeth M. Rudnick and
Janak H. Patel},
title = {A genetic approach to test application time reduction for full scan
and partial scan circuits},
booktitle = {8th International Conference on {VLSI} Design {(VLSI} Design 1995),
4-7 January 1995, New Delhi, India},
pages = {288--293},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICVD.1995.512126},
doi = {10.1109/ICVD.1995.512126},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RudnickP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DabholkarCNP95,
author = {Vinay Dabholkar and
Sreejit Chakravarty and
J. Najm and
Janak H. Patel},
title = {Cyclic stress tests for full scan circuits},
booktitle = {13th {IEEE} {VLSI} Test Symposium (VTS'95), April 30 - May 3, 1995,
Princeton, New Jersey, {USA}},
pages = {89--94},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/VTEST.1995.512622},
doi = {10.1109/VTEST.1995.512622},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DabholkarCNP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HsuP95,
author = {Frank F. Hsu and
Janak H. Patel},
title = {A distance reduction approach to design for testability},
booktitle = {13th {IEEE} {VLSI} Test Symposium (VTS'95), April 30 - May 3, 1995,
Princeton, New Jersey, {USA}},
pages = {158--163},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/VTEST.1995.512631},
doi = {10.1109/VTEST.1995.512631},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HsuP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChickermaneLP94,
author = {Vivek Chickermane and
Jaushin Lee and
Janak H. Patel},
title = {Addressing design for testability at the architectural level},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {13},
number = {7},
pages = {920--934},
year = {1994},
url = {https://doi.org/10.1109/43.293949},
doi = {10.1109/43.293949},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChickermaneLP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RudnickCP94,
author = {Elizabeth M. Rudnick and
Vivek Chickermane and
Janak H. Patel},
title = {An observability enhancement approach for improved testability and
at-speed test},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {13},
number = {8},
pages = {1051--1056},
year = {1994},
url = {https://doi.org/10.1109/43.298041},
doi = {10.1109/43.298041},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RudnickCP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeeP94,
author = {Jaushin Lee and
Janak H. Patel},
title = {Architectural level test generation for microprocessors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {13},
number = {10},
pages = {1288--1300},
year = {1994},
url = {https://doi.org/10.1109/43.317464},
doi = {10.1109/43.317464},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LeeP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AbrahamKPdDLSW94,
author = {Jacob A. Abraham and
Sandip Kundu and
Janak H. Patel and
Manuel A. d'Abreu and
Bulent I. Dervisoglu and
Marc E. Levitt and
Hector R. Sucar and
Ron G. Walther},
editor = {Michael J. Lorenzetti},
title = {Microprocessor Testing: Which Technique is Best? (Panel)},
booktitle = {Proceedings of the 31st Conference on Design Automation, San Diego,
California, USA, June 6-10, 1994},
pages = {294},
publisher = {{ACM} Press},
year = {1994},
url = {https://doi.org/10.1145/196244.196383},
doi = {10.1145/196244.196383},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/AbrahamKPdDLSW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/RudnickPGN94,
author = {Elizabeth M. Rudnick and
Janak H. Patel and
Gary S. Greenstein and
Thomas M. Niermann},
editor = {Michael J. Lorenzetti},
title = {Sequential Circuit Test Generation in a Genetic Algorithm Framework},
booktitle = {Proceedings of the 31st Conference on Design Automation, San Diego,
California, USA, June 6-10, 1994},
pages = {698--704},
publisher = {{ACM} Press},
year = {1994},
url = {https://doi.org/10.1145/196244.196619},
doi = {10.1145/196244.196619},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/RudnickPGN94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ParkesBP94,
author = {Steven Parkes and
Prithviraj Banerjee and
Janak H. Patel},
editor = {Michael J. Lorenzetti},
title = {ProperHITEC: {A} Portable, Parallel, Object-Oriented Approach to Sequential
Test Generation},
booktitle = {Proceedings of the 31st Conference on Design Automation, San Diego,
California, USA, June 6-10, 1994},
pages = {717--721},
publisher = {{ACM} Press},
year = {1994},
url = {https://doi.org/10.1145/196244.196624},
doi = {10.1145/196244.196624},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ParkesBP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/RudnickHSP94,
author = {Elizabeth M. Rudnick and
John G. Holm and
Daniel G. Saab and
Janak H. Patel},
editor = {Robert Werner},
title = {Application of Simple Genetic Algorithms to Sequential Circuit Test
Generation},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {40--45},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/EDTC.1994.326901},
doi = {10.1109/EDTC.1994.326901},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/RudnickHSP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hicss/FuP94,
author = {John W. C. Fu and
Janak H. Patel},
title = {Trace Driven Simulation using Sampled Traces},
booktitle = {27th Annual Hawaii International Conference on System Sciences (HICSS-27),
January 4-7, 1994, Maui, Hawaii, {USA}},
pages = {211--220},
publisher = {{IEEE} Computer Society},
year = {1994},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hicss/FuP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/DharchoudhuryKCP94,
author = {Abhijit Dharchoudhury and
Sung{-}Mo Kang and
Hungse Cha and
Janak H. Patel},
editor = {Jochen A. G. Jess and
Richard L. Rudell},
title = {Fast timing simulation of transient faults in digital circuits},
booktitle = {Proceedings of the 1994 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1994, San Jose, California, USA, November 6-10, 1994},
pages = {719--722},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1994},
url = {https://doi.org/10.1109/ICCAD.1994.629902},
doi = {10.1109/ICCAD.1994.629902},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/DharchoudhuryKCP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChaP94,
author = {Hungse Cha and
Janak H. Patel},
title = {Latch Design for Transient Pulse Tolerance},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {385--388},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331932},
doi = {10.1109/ICCD.1994.331932},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ChaP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/BaxterFRP94,
author = {Jeff Baxter and
John W. C. Fu and
Balkrishna Ramkumar and
Janak H. Patel},
editor = {Howard Jay Siegel},
title = {Hybrid Resource Management Algorithms for Multicomputer Systems},
booktitle = {Proceedings of the 8th International Symposium on Parallel Processing,
Canc{\'{u}}n, Mexico, April 1994},
pages = {482--489},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IPPS.1994.288259},
doi = {10.1109/IPPS.1994.288259},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/BaxterFRP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/LeeP93,
author = {Jaushin Lee and
Janak H. Patel},
title = {An architectural level test generator based on nonlinear equation
solving},
journal = {J. Electron. Test.},
volume = {4},
number = {2},
pages = {137--150},
year = {1993},
url = {https://doi.org/10.1007/BF00971643},
doi = {10.1007/BF00971643},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/LeeP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/ChoudharyPA93,
author = {Alok N. Choudhary and
Janak H. Patel and
Narendra Ahuja},
title = {{NETRA:} {A} Hierarchical and Partitionable Architecture for Computer
Vision Systems},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {4},
number = {10},
pages = {1092--1104},
year = {1993},
url = {https://doi.org/10.1109/71.246071},
doi = {10.1109/71.246071},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/ChoudharyPA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChickermaneRBP93,
author = {Vivek Chickermane and
Elizabeth M. Rudnick and
Prithviraj Banerjee and
Janak H. Patel},
editor = {Alfred E. Dunlop},
title = {Non-Scan Design-for-Testability Techniques for Sequential Circuits},
booktitle = {Proceedings of the 30th Design Automation Conference. Dallas, Texas,
USA, June 14-18, 1993},
pages = {236--241},
publisher = {{ACM} Press},
year = {1993},
url = {https://doi.org/10.1145/157485.164686},
doi = {10.1145/157485.164686},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ChickermaneRBP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/ChaRCPI93,
author = {Hungse Cha and
Elizabeth M. Rudnick and
Gwan S. Choi and
Janak H. Patel and
Ravishankar K. Iyer},
title = {A Fast and Accurate Gate-Level Transient Fault Simulation Environment},
booktitle = {Digest of Papers: FTCS-23, The Twenty-Third Annual International Symposium
on Fault-Tolerant Computing, Toulouse, France, June 22-24, 1993},
pages = {310--319},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/FTCS.1993.627334},
doi = {10.1109/FTCS.1993.627334},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/ChaRCPI93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/PomeranzRP93,
author = {Irith Pomeranz and
Sudhakar M. Reddy and
Janak H. Patel},
title = {Theory and Practice of Sequential Machine Testing and Testability},
booktitle = {Digest of Papers: FTCS-23, The Twenty-Third Annual International Symposium
on Fault-Tolerant Computing, Toulouse, France, June 22-24, 1993},
pages = {330--337},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/FTCS.1993.627336},
doi = {10.1109/FTCS.1993.627336},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/PomeranzRP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChaP93,
author = {Hungse Cha and
Janak H. Patel},
title = {A Logic-Level Model for alpha-Paricle Hits in {CMOS} Circuits},
booktitle = {Proceedings 1993 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '93, Cambridge, MA, USA,
October 3-6, 1993},
pages = {538--542},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/ICCD.1993.393319},
doi = {10.1109/ICCD.1993.393319},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ChaP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/FuP93,
author = {John W. C. Fu and
Janak H. Patel},
editor = {Alok N. Choudhary and
P. Bruce Berra},
title = {Memory Reference Behavior of Compiler Optimized Programs on High Speed},
booktitle = {Proceedings of the 1993 International Conference on Parallel Processing,
Syracuse University, NY, USA, August 16-20, 1993. Volume {II:} Software},
pages = {87--94},
publisher = {{CRC} Press},
year = {1993},
url = {https://doi.org/10.1109/ICPP.1993.114},
doi = {10.1109/ICPP.1993.114},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/FuP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChungHP93,
author = {Pi{-}Yu Chung and
Ibrahim N. Hajj and
Janak H. Patel},
title = {Efficient Variable Ordering Heuristics for Shared {ROBDD}},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1690--1693},
publisher = {{IEEE}},
year = {1993},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChungHP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/RearickP93,
author = {Jeff Rearick and
Janak H. Patel},
title = {Fast and Accurate {CMOS} Bridging Fault Simulation},
booktitle = {Proceedings {IEEE} International Test Conference 1993, Designing,
Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October
17-21, 1993},
pages = {54--62},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/TEST.1993.470718},
doi = {10.1109/TEST.1993.470718},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/RearickP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LeeP93,
author = {Jaushin Lee and
Janak H. Patel},
title = {Testability analysis based on structural and behavioral information},
booktitle = {11th {IEEE} {VLSI} Test Symposium (VTS'93), 6 Apr 1993-8 Apr 1993,
Atlantic City, NJ, {USA}},
pages = {139--146},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/VTEST.1993.313335},
doi = {10.1109/VTEST.1993.313335},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LeeP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LeeCP93,
author = {Jaushin Lee and
Vivek Chickermane and
Janak H. Patel},
title = {Impact of high level functional constraints on testability},
booktitle = {11th {IEEE} {VLSI} Test Symposium (VTS'93), 6 Apr 1993-8 Apr 1993,
Atlantic City, NJ, {USA}},
pages = {309--312},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/VTEST.1993.313364},
doi = {10.1109/VTEST.1993.313364},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LeeCP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/MazumderP92,
author = {Pinaki Mazumder and
Janak H. Patel},
title = {An efficient design of embedded memories and their testability analysis
using Markov chains},
journal = {J. Electron. Test.},
volume = {3},
number = {3},
pages = {235--250},
year = {1992},
url = {https://doi.org/10.1007/BF00134733},
doi = {10.1007/BF00134733},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/MazumderP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NiermannCP92,
author = {Thomas M. Niermann and
Wu{-}Tung Cheng and
Janak H. Patel},
title = {{PROOFS:} a fast, memory-efficient sequential circuit fault simulator},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {11},
number = {2},
pages = {198--207},
year = {1992},
url = {https://doi.org/10.1109/43.124398},
doi = {10.1109/43.124398},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NiermannCP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NiermannRPA92,
author = {Thomas M. Niermann and
Rabindra K. Roy and
Janak H. Patel and
Jacob A. Abraham},
title = {Test compaction for sequential circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {11},
number = {2},
pages = {260--267},
year = {1992},
url = {https://doi.org/10.1109/43.124404},
doi = {10.1109/43.124404},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NiermannRPA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KimBCP92,
author = {Sungho Kim and
Prithviraj Banerjee and
Vivek Chickermane and
Janak H. Patel},
editor = {Daniel G. Schweikert},
title = {{APT:} An Area-Performance-Testability Driven Placement Algorithm},
booktitle = {Proceedings of the 29th Design Automation Conference, Anaheim, California,
USA, June 8-12, 1992},
pages = {141--146},
publisher = {{IEEE} Computer Society Press},
year = {1992},
url = {http://portal.acm.org/citation.cfm?id=113938.110364},
timestamp = {Thu, 16 Mar 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/KimBCP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/LeeP92,
author = {Jaushin Lee and
Janak H. Patel},
editor = {Daniel G. Schweikert},
title = {Hierarchical Test Generation under Intensive Global Functional Constraints},
booktitle = {Proceedings of the 29th Design Automation Conference, Anaheim, California,
USA, June 8-12, 1992},
pages = {261--266},
publisher = {{IEEE} Computer Society Press},
year = {1992},
url = {http://portal.acm.org/citation.cfm?id=113938.149433},
timestamp = {Thu, 16 Mar 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/LeeP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/RoyCPAd92,
author = {Rabindra K. Roy and
Abhijit Chatterjee and
Janak H. Patel and
Jacob A. Abraham and
Manuel A. d'Abreu},
editor = {Louise Trevillyan and
Michael R. Lightner},
title = {Automatic test generation for linear digital systems with bi-level
search using matrix transform methods},
booktitle = {1992 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 1992, Santa Clara, CA, USA, November 8-12, 1992. Digest of
Technical Papers},
pages = {224--228},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1992},
url = {https://doi.org/10.1109/ICCAD.1992.279370},
doi = {10.1109/ICCAD.1992.279370},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/RoyCPAd92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/GreensteinP92,
author = {Gary S. Greenstein and
Janak H. Patel},
editor = {Louise Trevillyan and
Michael R. Lightner},
title = {{E-PROOFS:} a {CMOS} bridging fault simulator},
booktitle = {1992 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 1992, Santa Clara, CA, USA, November 8-12, 1992. Digest of
Technical Papers},
pages = {268--271},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1992},
url = {https://doi.org/10.1109/ICCAD.1992.279362},
doi = {10.1109/ICCAD.1992.279362},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/GreensteinP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChickermaneLP92,
author = {Vivek Chickermane and
Jaushin Lee and
Janak H. Patel},
editor = {Louise Trevillyan and
Michael R. Lightner},
title = {A comparative study of design for testability methods using high-level
and gate-level descriptions},
booktitle = {1992 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 1992, Santa Clara, CA, USA, November 8-12, 1992. Digest of
Technical Papers},
pages = {620--624},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1992},
url = {https://doi.org/10.1109/ICCAD.1992.279302},
doi = {10.1109/ICCAD.1992.279302},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChickermaneLP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/BaxterRP92,
author = {Jeff Baxter and
Balkrishna Ramkumar and
Janak H. Patel},
editor = {Trevor N. Mudge},
title = {Compile Time Parallel Resource Allocation for Unbounded Tree Structure
Task Graphs},
booktitle = {Proceedings of the 1992 International Conference on Parallel Processing,
University of Michigan, An Arbor, Michigan, USA, August 17-21, 1992.
Volume {I:} Architecture},
pages = {202--209},
publisher = {{CRC} Press},
year = {1992},
timestamp = {Mon, 28 Jul 2014 17:06:00 +0200},
biburl = {https://dblp.org/rec/conf/icpp/BaxterRP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/BaxterP92,
author = {Jeff Baxter and
Janak H. Patel},
editor = {Viktor K. Prasanna and
Larry H. Canter},
title = {Profiling Based Task Migration},
booktitle = {Proceedings of the 6th International Parallel Processing Symposium,
Beverly Hills, CA, USA, March 1992},
pages = {192--195},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IPPS.1992.223048},
doi = {10.1109/IPPS.1992.223048},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/BaxterP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LeeP92,
author = {Jaushin Lee and
Janak H. Patel},
title = {An Instruction Sequence Assembling Methodology for Testing Microprocessors},
booktitle = {Proceedings {IEEE} International Test Conference 1992, Discover the
New World of Test and Design, Baltimore, Maryland, USA, September
20-24, 1992},
pages = {49--58},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/TEST.1992.527803},
doi = {10.1109/TEST.1992.527803},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/LeeP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/RudnickFP92,
author = {Elizabeth M. Rudnick and
W. Kent Fuchs and
Janak H. Patel},
title = {Diagnostic Fault Simulation of Sequential Circuits},
booktitle = {Proceedings {IEEE} International Test Conference 1992, Discover the
New World of Test and Design, Baltimore, Maryland, USA, September
20-24, 1992},
pages = {178--186},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/TEST.1992.527818},
doi = {10.1109/TEST.1992.527818},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/RudnickFP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChickermaneLP92,
author = {Vivek Chickermane and
Jaushin Lee and
Janak H. Patel},
title = {Design for Testability Using Architectural Descriptions},
booktitle = {Proceedings {IEEE} International Test Conference 1992, Discover the
New World of Test and Design, Baltimore, Maryland, USA, September
20-24, 1992},
pages = {752--761},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/TEST.1992.527897},
doi = {10.1109/TEST.1992.527897},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ChickermaneLP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/FuPJ92,
author = {John W. C. Fu and
Janak H. Patel and
Bob L. Janssens},
editor = {Wen{-}mei W. Hwu},
title = {Stride directed prefetching in scalar processors},
booktitle = {Proceedings of the 25th Annual International Symposium on Microarchitecture,
Portland, Oregon, USA, November 1992},
pages = {102--110},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/MICRO.1992.697004},
doi = {10.1109/MICRO.1992.697004},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/FuPJ92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/RudnickCP92,
author = {Elizabeth M. Rudnick and
Vivek Chickermane and
Janak H. Patel},
title = {Probe point insertion for at-speed test},
booktitle = {10th {IEEE} {VLSI} Test Symposium (VTS'92), 7-9 Apr 1992, Atlantic
City, NJ, {USA}},
pages = {223--228},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/VTEST.1992.232756},
doi = {10.1109/VTEST.1992.232756},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/RudnickCP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dsp/ChatterjeeRAP91,
author = {Abhijit Chatterjee and
Rabindra K. Roy and
Jacob A. Abraham and
Janak H. Patel},
title = {Efficient testing strategies for bit- and digit-serial arrays used
in digital signal processors},
journal = {Digit. Signal Process.},
volume = {1},
number = {4},
pages = {231--244},
year = {1991},
url = {https://doi.org/10.1016/1051-2004(91)90115-2},
doi = {10.1016/1051-2004(91)90115-2},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dsp/ChatterjeeRAP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/PatilBP91,
author = {Srinivas Patil and
Prithviraj Banerjee and
Janak H. Patel},
editor = {A. Richard Newton},
title = {Parallel Test Generation for Sequential Circuits on General-Purpose
Multiprocessors},
booktitle = {Proceedings of the 28th Design Automation Conference, San Francisco,
California, USA, June 17-21, 1991},
pages = {155--159},
publisher = {{ACM}},
year = {1991},
url = {https://doi.org/10.1145/127601.127651},
doi = {10.1145/127601.127651},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/PatilBP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/NiermannP91,
author = {Thomas M. Niermann and
Janak H. Patel},
editor = {Tony Ambler and
Jochen A. G. Jess and
Hugo De Man},
title = {{HITEC:} a test generation package for sequential circuits},
booktitle = {Proceedings of the conference on European design automation, EURO-DAC'91,
Amsterdam, The Netherlands, 1991},
pages = {214--218},
publisher = {{EEE} Computer Society},
year = {1991},
url = {http://dl.acm.org/citation.cfm?id=951560},
timestamp = {Tue, 17 Nov 2015 16:02:17 +0100},
biburl = {https://dblp.org/rec/conf/eurodac/NiermannP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/LeeP91,
author = {Jaushin Lee and
Janak H. Patel},
title = {An Architectural Level Test Generator for a Hierarchical Design Environment},
booktitle = {Proceedings of the 1991 International Symposium on Fault-Tolerant
Computing, Montreal, Canada},
pages = {44--51},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/FTCS.1991.146631},
doi = {10.1109/FTCS.1991.146631},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/LeeP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChickermaneP91,
author = {Vivek Chickermane and
Janak H. Patel},
title = {A Fault Oriented Partial Scan Design Approach},
booktitle = {1991 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 1993, Santa Clara, CA, USA, November 11-14, 1991. Digest of
Technical Papers},
pages = {400--403},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/ICCAD.1991.185287},
doi = {10.1109/ICCAD.1991.185287},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChickermaneP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LeeP91,
author = {Jaushin Lee and
Janak H. Patel},
title = {A Signal-Driven Discrete Relaxation Technique for Architectural Level
Test Generation},
booktitle = {1991 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 1993, Santa Clara, CA, USA, November 11-14, 1991. Digest of
Technical Papers},
pages = {458--461},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/ICCAD.1991.185303},
doi = {10.1109/ICCAD.1991.185303},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/LeeP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/RudnickNP91,
author = {Elizabeth M. Rudnick and
Thomas M. Niermann and
Janak H. Patel},
title = {Methods for Reducing Events in Sequential Circuit Fault Simulation},
booktitle = {1991 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 1993, Santa Clara, CA, USA, November 11-14, 1991. Digest of
Technical Papers},
pages = {546--549},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/ICCAD.1991.185328},
doi = {10.1109/ICCAD.1991.185328},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/RudnickNP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/FuP91,
author = {John W. C. Fu and
Janak H. Patel},
editor = {V. K. Prasanna Kumar},
title = {Data Prefetching Strategies for Vector Cache Memories},
booktitle = {The Fifth International Parallel Processing Symposium, Proceedings,
Anaheim, California, USA, April 30 - May 2, 1991},
pages = {555--560},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IPPS.1991.153836},
doi = {10.1109/IPPS.1991.153836},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/FuP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/BrennerFGKLMNPPRSSW91,
author = {Alfred Brenner and
Richard F. Freund and
R. Stockton Gaines and
Rob Kelly and
Louis Lome and
Richard McAndrew and
Alexandru Nicolau and
Janak H. Patel and
Thomas Probert and
John H. Reif and
Jorge L. C. Sanz and
Howard Jay Siegel and
Jon A. Webb},
editor = {V. K. Prasanna Kumar},
title = {How Do We Make Parallel Processing a Reality? Bridging the Gap Between
Theory and Practice},
booktitle = {The Fifth International Parallel Processing Symposium, Proceedings,
Anaheim, California, USA, April 30 - May 2, 1991},
pages = {648--653},
publisher = {{IEEE} Computer Society},
year = {1991},
timestamp = {Fri, 01 Aug 2014 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ipps/BrennerFGKLMNPPRSSW91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FuP91,
author = {John W. C. Fu and
Janak H. Patel},
editor = {Zvonko G. Vranesic},
title = {Data Prefetching in Multiprocessor Vector Cache Memories},
booktitle = {Proceedings of the 18th Annual International Symposium on Computer
Architecture. Toronto, Canada, May, 27-30 1991},
pages = {54--63},
publisher = {{ACM}},
year = {1991},
url = {https://doi.org/10.1145/115952.115959},
doi = {10.1145/115952.115959},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/FuP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LeeP91,
author = {Jaushin Lee and
Janak H. Patel},
title = {{ARTEST:} An Architectural Level Test Generator for Data Path Faults
and Control Faults},
booktitle = {Proceedings {IEEE} International Test Conference 1991, Test: Faster,
Better, Sooner, Nashville, TN, USA, October 26-30, 1991},
pages = {729--738},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/TEST.1991.519738},
doi = {10.1109/TEST.1991.519738},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/itc/LeeP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/WuFP90,
author = {Kun{-}Lung Wu and
W. Kent Fuchs and
Janak H. Patel},
title = {Error Recovery in Shared Memory Multiprocessors Using Private Caches},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {1},
number = {2},
pages = {231--240},
year = {1990},
url = {https://doi.org/10.1109/71.80134},
doi = {10.1109/71.80134},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/WuFP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/NiermannCP90,
author = {Thomas M. Niermann and
Wu{-}Tung Cheng and
Janak H. Patel},
editor = {Richard C. Smith},
title = {Proofs: {A} Fast, Memory Efficient Sequential Circuit Fault Simulator},
booktitle = {Proceedings of the 27th {ACM/IEEE} Design Automation Conference. Orlando,
Florida, USA, June 24-28, 1990},
pages = {535--540},
publisher = {{IEEE} Computer Society Press},
year = {1990},
url = {https://doi.org/10.1145/123186.123396},
doi = {10.1145/123186.123396},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/NiermannCP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/ChengP90,
author = {Wu{-}Tung Cheng and
Janak H. Patel},
editor = {Gordon Adshead and
Jochen A. G. Jess},
title = {{PROOFS:} a super fast fault simulator for sequential circuits},
booktitle = {European Design Automation Conference, {EURO-DAC} 1990, Glasgow, Scotland,
UK, March 12-15, 1990},
pages = {475--479},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/EDAC.1990.136694},
doi = {10.1109/EDAC.1990.136694},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/ChengP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/ChoudharyP90,
author = {Alok N. Choudhary and
Janak H. Patel},
editor = {Benjamin W. Wah},
title = {Performance Evaluation of Clusters of {NETRA:} An Architecture for
Computer Vision Systems},
booktitle = {Proceedings of the 1990 International Conference on Parallel Processing,
Urbana-Champaign, IL, USA, August 1990. Volume 1: Architecture},
pages = {494--497},
publisher = {Pennsylvania State University Press},
year = {1990},
timestamp = {Mon, 28 Jul 2014 17:06:01 +0200},
biburl = {https://dblp.org/rec/conf/icpp/ChoudharyP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpr/ChoudharyLHP90,
author = {Alok N. Choudhary and
Mun K. Leung and
Thomas S. Huang and
Janak H. Patel},
title = {Parallel implementation and evaluation of motion estimation system
algorithms on a distributed memory multiprocessor using knowledge
based mappings},
booktitle = {10th {IAPR} International Conference on Pattern Recognition, Conference
{C:} image, speech, and signal processing, and Conference {D:} computer
architecture for vision in pattern recognition, {ICPR} 1990, Atlantic
City, NJ, USA, 16-21 June, 1990, Volume 2},
pages = {337--342},
publisher = {{IEEE}},
year = {1990},
url = {https://doi.org/10.1109/ICPR.1990.119379},
doi = {10.1109/ICPR.1990.119379},
timestamp = {Sat, 21 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpr/ChoudharyLHP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpr/ChoudharyDAP90,
author = {Alok N. Choudhary and
Subhodev Das and
Narendra Ahuja and
Janak H. Patel},
title = {A reconfigurable and hierarchical parallel processing architecture:
performance results for stereo vision},
booktitle = {10th {IAPR} International Conference on Pattern Recognition, Conference
{C:} image, speech, and signal processing, and Conference {D:} computer
architecture for vision in pattern recognition, {ICPR} 1990, Atlantic
City, NJ, USA, 16-21 June, 1990, Volume 2},
pages = {389--393},
publisher = {{IEEE}},
year = {1990},
url = {https://doi.org/10.1109/ICPR.1990.119388},
doi = {10.1109/ICPR.1990.119388},
timestamp = {Fri, 20 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpr/ChoudharyDAP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChickermaneP90,
author = {Vivek Chickermane and
Janak H. Patel},
title = {An optimization based approach to the partial scan design problem},
booktitle = {Proceedings {IEEE} International Test Conference 1990, Washington,
D.C., USA, September 10-14, 1990},
pages = {377--386},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/TEST.1990.114045},
doi = {10.1109/TEST.1990.114045},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ChickermaneP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MazumderP89,
author = {Pinaki Mazumder and
Janak H. Patel},
title = {Parallel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access
Memories},
journal = {{IEEE} Trans. Computers},
volume = {38},
number = {3},
pages = {394--407},
year = {1989},
url = {https://doi.org/10.1109/12.21126},
doi = {10.1109/12.21126},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/MazumderP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChangFP89,
author = {Ming{-}Feng Chang and
W. Kent Fuchs and
Janak H. Patel},
title = {Diagnosis and Repair of Memory with Coupling Faults},
journal = {{IEEE} Trans. Computers},
volume = {38},
number = {4},
pages = {493--500},
year = {1989},
url = {https://doi.org/10.1109/12.21142},
doi = {10.1109/12.21142},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChangFP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChandraP89,
author = {Susheel J. Chandra and
Janak H. Patel},
title = {Experimental evaluation of testability measures for test generation
(logic circuits)},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {8},
number = {1},
pages = {93--97},
year = {1989},
url = {https://doi.org/10.1109/43.21822},
doi = {10.1109/43.21822},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChandraP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DaveP89,
author = {Utpal J. Dav{\'{e}} and
Janak H. Patel},
editor = {Donald E. Thomas},
title = {A Functional-Level Test Generation Methodology Using Two-level Representations},
booktitle = {Proceedings of the 26th {ACM/IEEE} Design Automation Conference, Las
Vegas, Nevada, USA, June 25-29, 1989},
pages = {722--725},
publisher = {{ACM} Press},
year = {1989},
url = {https://doi.org/10.1145/74382.74513},
doi = {10.1145/74382.74513},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/DaveP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChandraP89,
author = {Susheel J. Chandra and
Janak H. Patel},
title = {Accurate logic simulation in the presence of unknowns},
booktitle = {1989 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1989, Santa Clara, CA, USA, November 5-9, 1989. Digest of Technical
Papers},
pages = {34--37},
publisher = {{IEEE} Computer Society},
year = {1989},
url = {https://doi.org/10.1109/ICCAD.1989.76899},
doi = {10.1109/ICCAD.1989.76899},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChandraP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/WuFP89,
author = {Kun{-}Lung Wu and
W. Kent Fuchs and
Janak H. Patel},
title = {Cache-Based Error Recovery for Shared Memory Multiprocessor Systems},
booktitle = {Proceedings of the International Conference on Parallel Processing,
{ICPP} '89, The Pennsylvania State University, University Park, PA,
USA, August 1989. Volume 1: Architecture},
pages = {159--166},
publisher = {Pennsylvania State University Press},
year = {1989},
timestamp = {Mon, 28 Jul 2014 17:06:00 +0200},
biburl = {https://dblp.org/rec/conf/icpp/WuFP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/BaxterP89,
author = {Jeff Baxter and
Janak H. Patel},
title = {The {LAST} Algorithm: {A} Heuristic-Based Static Task Allocation Algorithm},
booktitle = {Proceedings of the International Conference on Parallel Processing,
{ICPP} '89, The Pennsylvania State University, University Park, PA,
USA, August 1989. Volume 2: Software},
pages = {217--222},
publisher = {Pennsylvania State University Press},
year = {1989},
timestamp = {Mon, 15 Jun 2015 19:00:07 +0200},
biburl = {https://dblp.org/rec/conf/icpp/BaxterP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/ChoudharyP89,
author = {Alok N. Choudhary and
Janak H. Patel},
editor = {F. Ron Bailey},
title = {Load balancing and task decomposition techniques for parallel implementation
of integrated vision systems algorithms},
booktitle = {Proceedings Supercomputing '89, Reno, NV, USA, November 12-17, 1989},
pages = {266--275},
publisher = {{ACM}},
year = {1989},
url = {https://doi.org/10.1145/76263.76292},
doi = {10.1145/76263.76292},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/sc/ChoudharyP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LahaPI88,
author = {Subhasis Laha and
Janak H. Patel and
Ravishankar K. Iyer},
title = {Accurate Low-Cost Methods for Performance Evaluation of Cache Memory
Systems},
journal = {{IEEE} Trans. Computers},
volume = {37},
number = {11},
pages = {1325--1336},
year = {1988},
url = {https://doi.org/10.1109/12.8699},
doi = {10.1109/12.8699},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LahaPI88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MazumderPF88,
author = {Pinaki Mazumder and
Janak H. Patel and
W. Kent Fuchs},
title = {Methodologies for testing embedded content addressable memories},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {7},
number = {1},
pages = {11--20},
year = {1988},
url = {https://doi.org/10.1109/43.3126},
doi = {10.1109/43.3126},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MazumderPF88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/RoyNPAS88,
author = {Rabindra K. Roy and
Thomas M. Niermann and
Janak H. Patel and
Jacob A. Abraham and
Resve A. Saleh},
title = {Compaction of ATPG-generated test sequences for sequential circuits},
booktitle = {1988 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1988, Santa Clara, CA, USA, November 7-10, 1988. Digest of Technical
Papers},
pages = {382--385},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/ICCAD.1988.122533},
doi = {10.1109/ICCAD.1988.122533},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/RoyNPAS88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChangFP88,
author = {Ming{-}Feng Chang and
W. Kent Fuchs and
Janak H. Patel},
title = {Diagnosis and repair of memory with coupling faults},
booktitle = {1988 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1988, Santa Clara, CA, USA, November 7-10, 1988. Digest of Technical
Papers},
pages = {524--527},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/ICCAD.1988.122563},
doi = {10.1109/ICCAD.1988.122563},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChangFP88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChandraP88,
author = {Susheel J. Chandra and
Janak H. Patel},
title = {Test generation in a parallel processing environment},
booktitle = {Computer Design: {VLSI} in Computers and Processors, {ICCD} 1988.,
Proceedings of the 1988 {IEEE} International Conference on, Rye Brook,
NY, USA, October 3-5, 1988},
pages = {11--14},
publisher = {{IEEE}},
year = {1988},
url = {https://doi.org/10.1109/ICCD.1988.25649},
doi = {10.1109/ICCD.1988.25649},
timestamp = {Mon, 09 Aug 2021 14:54:02 +0200},
biburl = {https://dblp.org/rec/conf/iccd/ChandraP88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/ChoudharyP88,
author = {Alok N. Choudhary and
Janak H. Patel},
title = {A Parallel Processing Architecture for an Integrated Vision System},
booktitle = {Proceedings of the International Conference on Parallel Processing,
{ICPP} '88, The Pennsylvania State University, University Park, PA,
USA, August 1988. Volume 1: Architecture},
pages = {383--387},
publisher = {Pennsylvania State University Press},
year = {1988},
timestamp = {Mon, 28 Jul 2014 17:06:01 +0200},
biburl = {https://dblp.org/rec/conf/icpp/ChoudharyP88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/EickenmeyerP88,
author = {Richard J. Eickemeyer and
Janak H. Patel},
editor = {Howard Jay Siegel},
title = {Performance Evaluation of On-Chip Register and Cache Organizations},
booktitle = {Proceedings of the 15th Annual International Symposium on Computer
Architecture, Honolulu, Hawaii, USA, May-June 1988},
pages = {64--72},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/ISCA.1988.5211},
doi = {10.1109/ISCA.1988.5211},
timestamp = {Thu, 08 Jul 2021 16:04:01 +0200},
biburl = {https://dblp.org/rec/conf/isca/EickenmeyerP88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChengP87,
author = {Wu{-}Tung Cheng and
Janak H. Patel},
title = {A Minimum Test Set for Multiple Fault Detection in Ripple Carry Adders},
journal = {{IEEE} Trans. Computers},
volume = {36},
number = {7},
pages = {891--895},
year = {1987},
url = {https://doi.org/10.1109/TC.1987.1676985},
doi = {10.1109/TC.1987.1676985},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChengP87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChandraP87,
author = {Susheel J. Chandra and
Janak H. Patel},
editor = {A. O'Neill and
D. Thomas},
title = {A Hierarchical Approach Test Vector Generation},
booktitle = {Proceedings of the 24th {ACM/IEEE} Design Automation Conference. Miami
Beach, FL, USA, June 28 - July 1, 1987},
pages = {495--501},
publisher = {{IEEE} Computer Society Press / {ACM}},
year = {1987},
url = {https://doi.org/10.1145/37888.37962},
doi = {10.1145/37888.37962},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ChandraP87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/MazumderPF87,
author = {Pinaki Mazumder and
Janak H. Patel and
W. Kent Fuchs},
editor = {A. O'Neill and
D. Thomas},
title = {Design and Algorithms for Parallel Testing of Random Access and Content
Addressable Memories},
booktitle = {Proceedings of the 24th {ACM/IEEE} Design Automation Conference. Miami
Beach, FL, USA, June 28 - July 1, 1987},
pages = {689--694},
publisher = {{IEEE} Computer Society Press / {ACM}},
year = {1987},
url = {https://doi.org/10.1145/37888.37999},
doi = {10.1145/37888.37999},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/MazumderPF87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/AbrahamP87,
author = {Santosh G. Abraham and
Janak H. Patel},
title = {Parallel Garbage Collection on a Virtual Memory System},
booktitle = {International Conference on Parallel Processing, ICPP'87, University
Park, PA, USA, August 1987},
pages = {243--246},
publisher = {Pennsylvania State University Press},
year = {1987},
timestamp = {Mon, 28 Jul 2014 17:06:01 +0200},
biburl = {https://dblp.org/rec/conf/icpp/AbrahamP87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/EickemeyerP87,
author = {Richard J. Eickemeyer and
Janak H. Patel},
editor = {Daniel C. St. Clair},
title = {Performance Evaluation of Multiple Register Sets},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {264--271},
year = {1987},
url = {https://doi.org/10.1145/30350.30380},
doi = {10.1145/30350.30380},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/EickemeyerP87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/PatelP86,
author = {Sanjay J. Patel and
Janak H. Patel},
editor = {Don Thomas},
title = {Effectiveness of heuristics measures for automatic test pattern generation},
booktitle = {Proceedings of the 23rd {ACM/IEEE} Design Automation Conference. Las
Vegas, NV, USA, June, 1986},
pages = {547--552},
publisher = {{IEEE} Computer Society Press},
year = {1986},
url = {https://doi.org/10.1145/318013.318101},
doi = {10.1145/318013.318101},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/PatelP86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/MalkawiP86,
author = {Mohammad Malkawi and
Janak H. Patel},
editor = {Hideo Aiso},
title = {Performance Measurement of Paging Behavior in Multiprogramming Systems},
booktitle = {Proceedings of the 13th Annual Symposium on Computer Architecture,
Tokyo, Japan, June 1986},
pages = {111--118},
publisher = {{IEEE} Computer Society},
year = {1986},
url = {https://doi.org/10.1145/17356.17369},
doi = {10.1145/17356.17369},
timestamp = {Mon, 12 Jul 2021 17:55:24 +0200},
biburl = {https://dblp.org/rec/conf/isca/MalkawiP86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/RamP85,
author = {Ashwin Ram and
Janak H. Patel},
editor = {Thomas F. Gannon and
Tilak Agerwala and
Charles V. Freiman},
title = {Parallel Garbage Collection Without Synchronization Overhead},
booktitle = {Proceedings of the 12th Annual Symposium on Computer Architecture,
Boston, MA, USA, June 1985},
pages = {84--90},
publisher = {{IEEE} Computer Society},
year = {1985},
url = {https://doi.org/10.1145/327070.327134},
doi = {10.1145/327070.327134},
timestamp = {Thu, 07 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/RamP85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SohiDP85,
author = {Gurindar S. Sohi and
Edward S. Davidson and
Janak H. Patel},
editor = {Thomas F. Gannon and
Tilak Agerwala and
Charles V. Freiman},
title = {An Efficient LISP-Execution Architecture with a New Representation
for List Structures},
booktitle = {Proceedings of the 12th Annual Symposium on Computer Architecture,
Boston, MA, USA, June 1985},
pages = {91--98},
publisher = {{IEEE} Computer Society},
year = {1985},
url = {https://doi.org/10.1145/327070.327136},
doi = {10.1145/327070.327136},
timestamp = {Mon, 12 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/SohiDP85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChengP85,
author = {Wu{-}Tung Cheng and
Janak H. Patel},
title = {Multiple-Fault Detection in Iterative Logic Arrays},
booktitle = {Proceedings International Test Conference 1985, Philadelphia, PA,
USA, November 1985},
pages = {493--499},
publisher = {{IEEE} Computer Society},
year = {1985},
timestamp = {Mon, 11 Nov 2002 15:59:32 +0100},
biburl = {https://dblp.org/rec/conf/itc/ChengP85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sosp/MalkawiP85,
author = {Mohammad Malkawi and
Janak H. Patel},
editor = {Forest Baskett and
Andrew Birrell and
David R. Cheriton},
title = {Compiler Directed Memory Management Policy For Numerical Programs},
booktitle = {Proceedings of the Tenth {ACM} Symposium on Operating System Principles,
{SOSP} 1985, Orcas Island, Washington, USA, December 1-4, 1985},
pages = {97--106},
publisher = {{ACM}},
year = {1985},
url = {https://doi.org/10.1145/323647.323638},
doi = {10.1145/323647.323638},
timestamp = {Tue, 06 Nov 2018 16:59:32 +0100},
biburl = {https://dblp.org/rec/conf/sosp/MalkawiP85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PapamarcosP84,
author = {Mark S. Papamarcos and
Janak H. Patel},
editor = {Dharma P. Agrawal},
title = {A Low-Overhead Coherence Solution for Multiprocessors with Private
Cache Memories},
booktitle = {Proceedings of the 11th Annual Symposium on Computer Architecture,
Ann Arbor, USA, June 1984},
pages = {348--354},
publisher = {{ACM}},
year = {1984},
url = {https://doi.org/10.1145/800015.808204},
doi = {10.1145/800015.808204},
timestamp = {Tue, 13 Jul 2021 10:01:21 +0200},
biburl = {https://dblp.org/rec/conf/isca/PapamarcosP84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/DandapaniPA84,
author = {Ramaswami Dandapani and
Janak H. Patel and
Jacob A. Abraham},
title = {Design of Test Pattern Generators for Built-In Test},
booktitle = {Proceedings International Test Conference 1984, Philadelphia, PA,
USA, October 1984},
pages = {315--319},
publisher = {{IEEE} Computer Society},
year = {1984},
timestamp = {Fri, 22 Nov 2002 13:40:15 +0100},
biburl = {https://dblp.org/rec/conf/itc/DandapaniPA84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/YehPD83,
author = {Phil C. C. Yeh and
Janak H. Patel and
Edward S. Davidson},
title = {Shared Cache for Multiple-Stream Computer Systems},
journal = {{IEEE} Trans. Computers},
volume = {32},
number = {1},
pages = {38--47},
year = {1983},
url = {https://doi.org/10.1109/TC.1983.1676122},
doi = {10.1109/TC.1983.1676122},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/YehPD83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PatelF83,
author = {Janak H. Patel and
Leona Y. Fung},
title = {Concurrent Error Detection in Multiply and Divide Arrays},
journal = {{IEEE} Trans. Computers},
volume = {32},
number = {4},
pages = {417--422},
year = {1983},
url = {https://doi.org/10.1109/TC.1983.1676246},
doi = {10.1109/TC.1983.1676246},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PatelF83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/YehPD83,
author = {Phil C. C. Yeh and
Janak H. Patel and
Edward S. Davidson},
editor = {Harold W. Lawson Jr. and
Tilak Agerwala and
Hans H. Heilborn and
Hideo Aiso and
Lars{-}Erik Thorelli and
Jean{-}Loup Baer and
Mario Tokoro},
title = {Performance of Shared Cache for Parallel-Pipelined Computer Systems},
booktitle = {Proceedings of the 10th Annual Symposium on Computer Architecture,
1983},
pages = {117--123},
publisher = {{ACM}},
year = {1983},
url = {https://doi.org/10.1145/800046.801646},
doi = {10.1145/800046.801646},
timestamp = {Tue, 13 Jul 2021 10:01:21 +0200},
biburl = {https://dblp.org/rec/conf/isca/YehPD83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Patel82,
author = {Janak H. Patel},
title = {Analysis of Multiprocessors with Private Cache Memories},
journal = {{IEEE} Trans. Computers},
volume = {31},
number = {4},
pages = {296--304},
year = {1982},
url = {https://doi.org/10.1109/TC.1982.1675995},
doi = {10.1109/TC.1982.1675995},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Patel82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PatelF82,
author = {Janak H. Patel and
Leona Y. Fung},
title = {Concurrent Error Detection in ALU's by Recomputing with Shifted Operands},
journal = {{IEEE} Trans. Computers},
volume = {31},
number = {7},
pages = {589--595},
year = {1982},
url = {https://doi.org/10.1109/TC.1982.1676055},
doi = {10.1109/TC.1982.1676055},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PatelF82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/YenPD82,
author = {David W. L. Yen and
Janak H. Patel and
Edward S. Davidson},
title = {Memory Interference in Synchronous Multiprocessor Systems},
journal = {{IEEE} Trans. Computers},
volume = {31},
number = {11},
pages = {1116--1121},
year = {1982},
url = {https://doi.org/10.1109/TC.1982.1675928},
doi = {10.1109/TC.1982.1675928},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/YenPD82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/GrohoskiP82,
author = {Gregory F. Grohoski and
Janak H. Patel},
title = {A performance model for instruction prefetch in pipelined instruction
units},
booktitle = {International Conference on Parallel Processing, ICPP'82, August 24-27,
1982, Bellaire, Michigan, {USA}},
pages = {248--252},
publisher = {{IEEE} Computer Society},
year = {1982},
timestamp = {Sat, 06 Sep 2008 15:25:30 +0200},
biburl = {https://dblp.org/rec/conf/icpp/GrohoskiP82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Patel81,
author = {Janak H. Patel},
title = {Performance of Processor-Memory Interconnections for Multiprocessors},
journal = {{IEEE} Trans. Computers},
volume = {30},
number = {10},
pages = {771--780},
year = {1981},
url = {https://doi.org/10.1109/TC.1981.1675695},
doi = {10.1109/TC.1981.1675695},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Patel81.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Patel80,
author = {Janak H. Patel},
title = {An Alternative to the Distributed Pipeline},
journal = {{IEEE} Trans. Computers},
volume = {29},
number = {8},
pages = {736--737},
year = {1980},
url = {https://doi.org/10.1109/TC.1980.1675656},
doi = {10.1109/TC.1980.1675656},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Patel80.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Patel79,
author = {Janak H. Patel},
editor = {Barry R. Borgerson and
E. Douglas Jensen and
Harold W. Lawson Jr. and
Hideo Aiso and
Garold S. Tjaden and
Richard F. Welch and
Philip Holmer and
Len Haynes and
Jerry Hommes and
Ted Jones and
Winifred Grelis and
Rosalie Ashenfelter},
title = {Processor-Memory Interconnections for Multiprocessors},
booktitle = {Proceedings of the 6th Annual Symposium on Computer Architecture,
Philadelphia, PA, USA, April 1979},
pages = {168--177},
publisher = {{ACM}},
year = {1979},
url = {https://doi.org/10.1145/800090.802906},
doi = {10.1145/800090.802906},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/Patel79.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mark2/BriggsFHP79,
author = {Faye A. Briggs and
King{-}Sun Fu and
Kai Hwang and
Janak H. Patel},
title = {PM\({}^{\mbox{4}}\) - {A} reconfigurable multiprocessor system for
pattern recognition and image processing},
booktitle = {1979 International Workshop on Managing Requirements Knowledge, {MARK}
1979, New York, NY, USA, June 4-7, 1979},
pages = {255--266},
publisher = {{IEEE}},
year = {1979},
url = {https://doi.org/10.1109/MARK.1979.8817082},
doi = {10.1109/MARK.1979.8817082},
timestamp = {Tue, 08 Nov 2022 21:42:40 +0100},
biburl = {https://dblp.org/rec/conf/mark2/BriggsFHP79.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Patel78,
author = {Janak H. Patel},
editor = {Edward J. McCluskey and
John F. Wakerly and
E. David Crockett and
Thomas H. Bredt and
David J. Lu and
William M. van Cleemput and
Susan S. Owicki and
Roy C. Ogus and
Ravi Apte and
M. Danielle Beaurdy and
Jacques Losq},
title = {Pipelines wth Internal Buffers},
booktitle = {Proceedings of the 5th Annual Symposium on Computer Architecture,
Palo Alto, CA, USA, April 1978},
pages = {249--255},
publisher = {{ACM}},
year = {1978},
url = {https://doi.org/10.1145/800094.803057},
doi = {10.1145/800094.803057},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/Patel78.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PatelD76,
author = {Janak H. Patel and
Edward S. Davidson},
editor = {Michael J. Flynn and
Oscar N. Garcia and
Daniel P. Siewiorek},
title = {Improving the Throughput of a Pipeline by Insertion of Delays},
booktitle = {Proceedings of the 3rd Annual Symposium on Computer Architecture,
Clearwater, FL, USA, January 1976},
pages = {159--164},
publisher = {{ACM}},
year = {1976},
url = {https://doi.org/10.1145/800110.803575},
doi = {10.1145/800110.803575},
timestamp = {Mon, 19 Jul 2021 11:32:48 +0200},
biburl = {https://dblp.org/rec/conf/isca/PatelD76.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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