BibTeX records: Alberto Puggelli

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@article{DBLP:journals/jssc/KellerCZKPLBBCD17,
  author       = {Ben Keller and
                  Martin Cochet and
                  Brian Zimmer and
                  Jaehwa Kwak and
                  Alberto Puggelli and
                  Yunsup Lee and
                  Milovan Blagojevic and
                  Stevo Bailey and
                  Pi{-}Feng Chiu and
                  Daniel Palmer Dabbelt and
                  Colin Schmidt and
                  Elad Alon and
                  Krste Asanovic and
                  Borivoje Nikolic},
  title        = {A {RISC-V} Processor SoC With Integrated Power Management at Submicrosecond
                  Timescales in 28 nm {FD-SOI}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {52},
  number       = {7},
  pages        = {1863--1875},
  year         = {2017},
  url          = {https://doi.org/10.1109/JSSC.2017.2690859},
  doi          = {10.1109/JSSC.2017.2690859},
  timestamp    = {Sat, 11 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/KellerCZKPLBBCD17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tac/ShoukryNPSST17,
  author       = {Yasser Shoukry and
                  Pierluigi Nuzzo and
                  Alberto Puggelli and
                  Alberto L. Sangiovanni{-}Vincentelli and
                  Sanjit A. Seshia and
                  Paulo Tabuada},
  title        = {Secure State Estimation for Cyber-Physical Systems Under Sensor Attacks:
                  {A} Satisfiability Modulo Theory Approach},
  journal      = {{IEEE} Trans. Autom. Control.},
  volume       = {62},
  number       = {10},
  pages        = {4917--4932},
  year         = {2017},
  url          = {https://doi.org/10.1109/TAC.2017.2676679},
  doi          = {10.1109/TAC.2017.2676679},
  timestamp    = {Mon, 15 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tac/ShoukryNPSST17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ZimmerLPKJKBBCL16,
  author       = {Brian Zimmer and
                  Yunsup Lee and
                  Alberto Puggelli and
                  Jaehwa Kwak and
                  Ruzica Jevtic and
                  Ben Keller and
                  Steven Bailey and
                  Milovan Blagojevic and
                  Pi{-}Feng Chiu and
                  Hanh{-}Phuc Le and
                  Po{-}Hung Chen and
                  Nicholas Sutardja and
                  Rimas Avizienis and
                  Andrew Waterman and
                  Brian C. Richards and
                  Philippe Flatresse and
                  Elad Alon and
                  Krste Asanovic and
                  Borivoje Nikolic},
  title        = {A {RISC-V} Vector Processor With Simultaneous-Switching Switched-Capacitor
                  {DC-DC} Converters in 28 nm {FDSOI}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {51},
  number       = {4},
  pages        = {930--942},
  year         = {2016},
  url          = {https://doi.org/10.1109/JSSC.2016.2519386},
  doi          = {10.1109/JSSC.2016.2519386},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/ZimmerLPKJKBBCL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/LeeWCZKPKJBBCAR16,
  author       = {Yunsup Lee and
                  Andrew Waterman and
                  Henry Cook and
                  Brian Zimmer and
                  Ben Keller and
                  Alberto Puggelli and
                  Jaehwa Kwak and
                  Ruzica Jevtic and
                  Stevo Bailey and
                  Milovan Blagojevic and
                  Pi{-}Feng Chiu and
                  Rimas Avizienis and
                  Brian C. Richards and
                  Jonathan Bachrach and
                  David A. Patterson and
                  Elad Alon and
                  Bora Nikolic and
                  Krste Asanovic},
  title        = {An Agile Approach to Building {RISC-V} Microprocessors},
  journal      = {{IEEE} Micro},
  volume       = {36},
  number       = {2},
  pages        = {8--20},
  year         = {2016},
  url          = {https://doi.org/10.1109/MM.2016.11},
  doi          = {10.1109/MM.2016.11},
  timestamp    = {Thu, 13 Apr 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/micro/LeeWCZKPKJBBCAR16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/CochetPKZBCRAN16,
  author       = {Martin Cochet and
                  Alberto Puggelli and
                  Ben Keller and
                  Brian Zimmer and
                  Milovan Blagojevic and
                  Sylvain Clerc and
                  Philippe Roche and
                  Jean{-}Luc Autran and
                  Borivoje Nikolic},
  title        = {On-chip supply power measurement and waveform reconstruction in a
                  28nm {FD-SOI} processor SoC},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2016, Toyama,
                  Japan, November 7-9, 2016},
  pages        = {125--128},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ASSCC.2016.7844151},
  doi          = {10.1109/ASSCC.2016.7844151},
  timestamp    = {Fri, 27 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/asscc/CochetPKZBCRAN16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/KellerCZLBKPBCD16,
  author       = {Ben Keller and
                  Martin Cochet and
                  Brian Zimmer and
                  Yunsup Lee and
                  Milovan Blagojevic and
                  Jaehwa Kwak and
                  Alberto Puggelli and
                  Stevo Bailey and
                  Pi{-}Feng Chiu and
                  Daniel Palmer Dabbelt and
                  Colin Schmidt and
                  Elad Alon and
                  Krste Asanovic and
                  Borivoje Nikolic},
  title        = {Sub-microsecond adaptive voltage scaling in a 28nm {FD-SOI} processor
                  SoC},
  booktitle    = {{ESSCIRC} Conference 2016: 42\({}^{\mbox{nd}}\) European Solid-State
                  Circuits Conference, Lausanne, Switzerland, September 12-15, 2016},
  pages        = {269--272},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ESSCIRC.2016.7598294},
  doi          = {10.1109/ESSCIRC.2016.7598294},
  timestamp    = {Sat, 11 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/KellerCZLBKPBCD16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sj/PuggelliMLS15,
  author       = {Alberto Puggelli and
                  Mohammad Mostafizur Rahman Mozumdar and
                  Luciano Lavagno and
                  Alberto L. Sangiovanni{-}Vincentelli},
  title        = {Routing-Aware Design of Indoor Wireless Sensor Networks Using an Interactive
                  Tool},
  journal      = {{IEEE} Syst. J.},
  volume       = {9},
  number       = {3},
  pages        = {714--727},
  year         = {2015},
  url          = {https://doi.org/10.1109/JSYST.2013.2287460},
  doi          = {10.1109/JSYST.2013.2287460},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/sj/PuggelliMLS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/amcc/ShoukryPNSST15,
  author       = {Yasser Shoukry and
                  Alberto Puggelli and
                  Pierluigi Nuzzo and
                  Alberto L. Sangiovanni{-}Vincentelli and
                  Sanjit A. Seshia and
                  Paulo Tabuada},
  title        = {Sound and complete state estimation for linear dynamical systems under
                  sensor attacks using Satisfiability Modulo Theory solving},
  booktitle    = {American Control Conference, {ACC} 2015, Chicago, IL, USA, July 1-3,
                  2015},
  pages        = {3818--3823},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ACC.2015.7171925},
  doi          = {10.1109/ACC.2015.7171925},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/amcc/ShoukryPNSST15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/LeeZWPKJKBBCCAR15,
  author       = {Yunsup Lee and
                  Brian Zimmer and
                  Andrew Waterman and
                  Alberto Puggelli and
                  Jaehwa Kwak and
                  Ruzica Jevtic and
                  Ben Keller and
                  Stevo Bailey and
                  Milovan Blagojevic and
                  Pi{-}Feng Chiu and
                  Henry Cook and
                  Rimas Avizienis and
                  Brian C. Richards and
                  Elad Alon and
                  Borivoje Nikolic and
                  Krste Asanovic},
  title        = {Raven: {A} 28nm {RISC-V} vector processor with integrated switched-capacitor
                  {DC-DC} converters and adaptive clocking},
  booktitle    = {2015 {IEEE} Hot Chips 27 Symposium (HCS), Cupertino, CA, USA, August
                  22-25, 2015},
  pages        = {1--45},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2015.7477469},
  doi          = {10.1109/HOTCHIPS.2015.7477469},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hotchips/LeeZWPKJKBBCCAR15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/ZimmerLPKJKBBCL15,
  author       = {Brian Zimmer and
                  Yunsup Lee and
                  Alberto Puggelli and
                  Jaehwa Kwak and
                  Ruzica Jevtic and
                  Ben Keller and
                  Stevo Bailey and
                  Milovan Blagojevic and
                  Pi{-}Feng Chiu and
                  Hanh{-}Phuc Le and
                  Po{-}Hung Chen and
                  Nicholas Sutardja and
                  Rimas Avizienis and
                  Andrew Waterman and
                  Brian C. Richards and
                  Philippe Flatresse and
                  Elad Alon and
                  Krste Asanovic and
                  Borivoje Nikolic},
  title        = {A {RISC-V} vector processor with tightly-integrated switched-capacitor
                  {DC-DC} converters in 28nm {FDSOI}},
  booktitle    = {Symposium on {VLSI} Circuits, {VLSIC} 2015, Kyoto, Japan, June 17-19,
                  2015},
  pages        = {316},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/VLSIC.2015.7231305},
  doi          = {10.1109/VLSIC.2015.7231305},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsic/ZimmerLPKJKBBCL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/us/Puggelli14,
  author       = {Alberto Puggelli},
  title        = {Formal Techniques for the Verification and Optimal Control of Probabilistic
                  Systems in the Presence of Modeling Uncertainties},
  school       = {University of California, Berkeley, {USA}},
  year         = {2014},
  url          = {https://www.escholarship.org/uc/item/9hj3m991},
  timestamp    = {Wed, 22 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/phd/us/Puggelli14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aaaiss/SadighDPLSBSSS14,
  author       = {Dorsa Sadigh and
                  Katherine Rose Driggs{-}Campbell and
                  Alberto Puggelli and
                  Wenchao Li and
                  Victor Shia and
                  Ruzena Bajcsy and
                  Alberto L. Sangiovanni{-}Vincentelli and
                  S. Shankar Sastry and
                  Sanjit A. Seshia},
  title        = {Data-Driven Probabilistic Modeling and Verification of Human Driver
                  Behavior},
  booktitle    = {2014 {AAAI} Spring Symposia, Stanford University, Palo Alto, California,
                  USA, March 24-26, 2014},
  publisher    = {{AAAI} Press},
  year         = {2014},
  url          = {http://www.aaai.org/ocs/index.php/SSS/SSS14/paper/view/7749},
  timestamp    = {Mon, 05 Sep 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/aaaiss/SadighDPLSBSSS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/emsoft/PuggelliSS14,
  author       = {Alberto Puggelli and
                  Alberto L. Sangiovanni{-}Vincentelli and
                  Sanjit A. Seshia},
  editor       = {Tulika Mitra and
                  Jan Reineke},
  title        = {Robust strategy synthesis for probabilistic systems applied to risk-limiting
                  renewable-energy pricing},
  booktitle    = {2014 International Conference on Embedded Software, {EMSOFT} 2014,
                  New Delhi, India, October 12-17, 2014},
  pages        = {13:1--13:10},
  publisher    = {{ACM}},
  year         = {2014},
  url          = {https://doi.org/10.1145/2656045.2656069},
  doi          = {10.1145/2656045.2656069},
  timestamp    = {Wed, 04 Jan 2023 16:50:45 +0100},
  biburl       = {https://dblp.org/rec/conf/emsoft/PuggelliSS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/ShoukryNPSST14,
  author       = {Yasser Shoukry and
                  Pierluigi Nuzzo and
                  Alberto Puggelli and
                  Alberto L. Sangiovanni{-}Vincentelli and
                  Sanjit A. Seshia and
                  Paulo Tabuada},
  title        = {Secure State Estimation Under Sensor Attacks: {A} Satisfiability Modulo
                  Theory Approach},
  journal      = {CoRR},
  volume       = {abs/1412.4324},
  year         = {2014},
  url          = {http://arxiv.org/abs/1412.4324},
  eprinttype    = {arXiv},
  eprint       = {1412.4324},
  timestamp    = {Mon, 15 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/ShoukryNPSST14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/PuggelliLSS13,
  author       = {Alberto Puggelli and
                  Wenchao Li and
                  Alberto L. Sangiovanni{-}Vincentelli and
                  Sanjit A. Seshia},
  editor       = {Natasha Sharygina and
                  Helmut Veith},
  title        = {Polynomial-Time Verification of {PCTL} Properties of MDPs with Convex
                  Uncertainties},
  booktitle    = {Computer Aided Verification - 25th International Conference, {CAV}
                  2013, Saint Petersburg, Russia, July 13-19, 2013. Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {8044},
  pages        = {527--542},
  publisher    = {Springer},
  year         = {2013},
  url          = {https://doi.org/10.1007/978-3-642-39799-8\_35},
  doi          = {10.1007/978-3-642-39799-8\_35},
  timestamp    = {Wed, 07 Dec 2022 23:12:58 +0100},
  biburl       = {https://dblp.org/rec/conf/cav/PuggelliLSS13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/CrossleyPLYNJKNLSASA13,
  author       = {John Crossley and
                  Alberto Puggelli and
                  Hanh{-}Phuc Le and
                  B. Yang and
                  R. Nancollas and
                  Kwangmo Jung and
                  Lingkai Kong and
                  Nathan Narevsky and
                  Yue Lu and
                  Nicholas Sutardja and
                  E. J. An and
                  Alberto L. Sangiovanni{-}Vincentelli and
                  Elad Alon},
  editor       = {J{\"{o}}rg Henkel},
  title        = {{BAG:} a designer-oriented integrated framework for the development
                  of {AMS} circuit generators},
  booktitle    = {The {IEEE/ACM} International Conference on Computer-Aided Design,
                  ICCAD'13, San Jose, CA, USA, November 18-21, 2013},
  pages        = {74--81},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ICCAD.2013.6691100},
  doi          = {10.1109/ICCAD.2013.6691100},
  timestamp    = {Thu, 27 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/CrossleyPLYNJKNLSASA13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccnc/PuggelliMSL12,
  author       = {Alberto Puggelli and
                  Mohammad Mostafizur Rahman Mozumdar and
                  Alberto L. Sangiovanni{-}Vincentelli and
                  Luciano Lavagno},
  title        = {A routing-algorithm-aware design tool for indoor wireless sensor networks},
  booktitle    = {International Conference on Computing, Networking and Communications,
                  {ICNC} 2012, Maui, HI, USA, January 30 - February 2, 2012},
  pages        = {964--969},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/ICCNC.2012.6167569},
  doi          = {10.1109/ICCNC.2012.6167569},
  timestamp    = {Wed, 16 Oct 2019 14:14:57 +0200},
  biburl       = {https://dblp.org/rec/conf/iccnc/PuggelliMSL12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/PuggelliWKS11,
  author       = {Alberto Puggelli and
                  Tobias Welp and
                  Andreas Kuehlmann and
                  Alberto L. Sangiovanni{-}Vincentelli},
  editor       = {Leon Stok and
                  Nikil D. Dutt and
                  Soha Hassoun},
  title        = {Are logic synthesis tools robust?},
  booktitle    = {Proceedings of the 48th Design Automation Conference, {DAC} 2011,
                  San Diego, California, USA, June 5-10, 2011},
  pages        = {633--638},
  publisher    = {{ACM}},
  year         = {2011},
  url          = {https://doi.org/10.1145/2024724.2024869},
  doi          = {10.1145/2024724.2024869},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/PuggelliWKS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/ZanusoLPSL10,
  author       = {Marco Zanuso and
                  Salvatore Levantino and
                  Alberto Puggelli and
                  Carlo Samori and
                  Andrea L. Lacaita},
  title        = {Time-to-digital converter with 3-ps resolution and digital linearization
                  algorithm},
  booktitle    = {36th European Solid-State Circuits Conference, {ESSCIRC} 2010, Sevilla,
                  Spain, September 13-17, 2010},
  pages        = {262--265},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ESSCIRC.2010.5619879},
  doi          = {10.1109/ESSCIRC.2010.5619879},
  timestamp    = {Mon, 09 Aug 2021 14:54:02 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/ZanusoLPSL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmcad/NuzzoPSS10,
  author       = {Pierluigi Nuzzo and
                  Alberto Puggelli and
                  Sanjit A. Seshia and
                  Alberto L. Sangiovanni{-}Vincentelli},
  editor       = {Roderick Bloem and
                  Natasha Sharygina},
  title        = {CalCS: {SMT} solving for non-linear convex constraints},
  booktitle    = {Proceedings of 10th International Conference on Formal Methods in
                  Computer-Aided Design, {FMCAD} 2010, Lugano, Switzerland, October
                  20-23},
  pages        = {71--79},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://ieeexplore.ieee.org/document/5770935/},
  timestamp    = {Mon, 15 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fmcad/NuzzoPSS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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