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BibTeX records: Muhammad Adeel Tajammul
@article{DBLP:journals/vlsisp/ShamiTH19, author = {Muhammad Ali Shami and Muhammad Adeel Tajammul and Ahmed Hemani}, title = {Configurable {FFT} Processor Using Dynamically Reconfigurable Resource Arrays}, journal = {J. Signal Process. Syst.}, volume = {91}, number = {5}, pages = {459--473}, year = {2019}, url = {https://doi.org/10.1007/s11265-017-1326-7}, doi = {10.1007/S11265-017-1326-7}, timestamp = {Thu, 12 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsisp/ShamiTH19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/JafriTHPPET16, author = {Syed Mohammad Asad Hassan Jafri and Muhammad Adeel Tajammul and Ahmed Hemani and Kolin Paul and Juha Plosila and Peeter Ellervee and Hannu Tenhunen}, title = {Polymorphic Configuration Architecture for CGRAs}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {24}, number = {1}, pages = {403--407}, year = {2016}, url = {https://doi.org/10.1109/TVLSI.2015.2402392}, doi = {10.1109/TVLSI.2015.2402392}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/JafriTHPPET16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/TajammulJHE16, author = {Muhammad Adeel Tajammul and Syed M. A. H. Jafri and Ahmed Hemani and Peeter Ellervee}, title = {TransMem: {A} memory architecture to support dynamic remapping and parallelism in low power high performance CGRAs}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {92--99}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833431}, doi = {10.1109/PATMOS.2016.7833431}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/TajammulJHE16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mse/AzadKTE15, author = {Siavoosh Payandeh Azad and Hannes Kinks and Muhammad Adeel Tajammul and Peeter Ellervee}, title = {An ad-hoc implementation of a remote laboratory}, booktitle = {2015 {IEEE} International Conference on Microelectronics Systems Education, {MSE} 2015, Pittsburgh, PA, USA, May 20-21, 2015}, pages = {48--51}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/MSE.2015.7160015}, doi = {10.1109/MSE.2015.7160015}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mse/AzadKTE15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mse/TajammulAE15, author = {Muhammad Adeel Tajammul and Siavoosh Payandeh Azad and Peeter Ellervee}, title = {Digital system modeling and synthesis as an introduction to Computer Systems Engineering}, booktitle = {2015 {IEEE} International Conference on Microelectronics Systems Education, {MSE} 2015, Pittsburgh, PA, USA, May 20-21, 2015}, pages = {52--55}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/MSE.2015.7160016}, doi = {10.1109/MSE.2015.7160016}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mse/TajammulAE15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsid/TajammulJEHTP15, author = {Muhammad Adeel Tajammul and Syed M. A. H. Jafri and Peeter Ellervee and Ahmed Hemani and Hannu Tenhunen and Juha Plosila}, title = {DyMeP: An Infrastructure to Support Dynamic Memory Binding for Runtime Mapping in CGRAs}, booktitle = {28th International Conference on {VLSI} Design, {VLSID} 2015, Bangalore, India, January 3-7, 2015}, pages = {547--552}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/VLSID.2015.98}, doi = {10.1109/VLSID.2015.98}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsid/TajammulJEHTP15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/FarahiniHSJTP14, author = {Nasim Farahini and Ahmed Hemani and Hasan Sohofi and Syed M. A. H. Jafri and Muhammad Adeel Tajammul and Kolin Paul}, title = {Parallel distributed scalable runtime address generation scheme for a coarse grain reconfigurable computation and storage fabric}, journal = {Microprocess. Microsystems}, volume = {38}, number = {8}, pages = {788--802}, year = {2014}, url = {https://doi.org/10.1016/j.micpro.2014.05.009}, doi = {10.1016/J.MICPRO.2014.05.009}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/FarahiniHSJTP14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/JafriTDHPEPT14, author = {Syed Mohammad Asad Hassan Jafri and Muhammad Adeel Tajammul and Masoud Daneshtalab and Ahmed Hemani and Kolin Paul and Peeter Ellervee and Juha Plosila and Hannu Tenhunen}, title = {Morphable Compression Architecture for Efficient Configuration in CGRAs}, booktitle = {17th Euromicro Conference on Digital System Design, {DSD} 2014, Verona, Italy, August 27-29, 2014}, pages = {42--49}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/DSD.2014.36}, doi = {10.1109/DSD.2014.36}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/JafriTDHPEPT14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/JafriTDHPEPT14, author = {Syed M. A. H. Jafri and Muhammad Adeel Tajammul and Masoud Daneshtalab and Ahmed Hemani and Kolin Paul and Peeter Ellervee and Juha Plosila and Hannu Tenhunen}, title = {Customizable Compression Architecture for Efficient Configuration in CGRAs}, booktitle = {22nd {IEEE} Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2014, Boston, MA, USA, May 11-13, 2014}, pages = {31}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/FCCM.2014.18}, doi = {10.1109/FCCM.2014.18}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/JafriTDHPEPT14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/asap/TajammulJHPT13, author = {Muhammad Adeel Tajammul and Syed M. A. H. Jafri and Ahmed Hemani and Juha Plosila and Hannu Tenhunen}, title = {Private configuration environments {(PCE)} for efficient reconfiguration, in CGRAs}, booktitle = {24th International Conference on Application-Specific Systems, Architectures and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013}, pages = {227--236}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/ASAP.2013.6567579}, doi = {10.1109/ASAP.2013.6567579}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/asap/TajammulJHPT13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/FarahiniLTSCHY13, author = {Nasim Farahini and Shuo Li and Muhammad Adeel Tajammul and Muhammad Ali Shami and Guo Chen and Ahmed Hemani and Wei Ye}, title = {39.9 GOPs/watt multi-mode {CGRA} accelerator for a multi-standard basestation}, booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013}, pages = {1448--1451}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/ISCAS.2013.6572129}, doi = {10.1109/ISCAS.2013.6572129}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/FarahiniLTSCHY13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/JafriTHPPT13, author = {Syed M. A. H. Jafri and Muhammad Adeel Tajammul and Ahmed Hemani and Kolin Paul and Juha Plosila and Hannu Tenhunen}, title = {Energy-aware-task-parallelism for efficient dynamic voltage, and frequency scaling, in CGRAs}, booktitle = {2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2013, Agios Konstantinos, Samos Island, Greece, July 15-18, 2013}, pages = {104--112}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/SAMOS.2013.6621112}, doi = {10.1109/SAMOS.2013.6621112}, timestamp = {Sat, 09 Apr 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/samos/JafriTHPPT13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mcsoc/TajammulSH12, author = {Muhammad Adeel Tajammul and Muhammad Ali Shami and Ahmed Hemani}, title = {Segmented Bus Based Path Setup Scheme for a Distributed Memory Architecture}, booktitle = {{IEEE} 6th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2012, Fukushima, Japan, September 20-22, 2012}, pages = {67--74}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/MCSoC.2012.34}, doi = {10.1109/MCSOC.2012.34}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mcsoc/TajammulSH12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsid/TajammulSHM11, author = {Muhammad Adeel Tajammul and Muhammad Ali Shami and Ahmed Hemani and Sridharan Moorthi}, title = {NoC Based Distributed Partitionable Memory System for a Coarse Grain Reconfigurable Architecture}, booktitle = {{VLSI} Design 2011: 24th International Conference on {VLSI} Design, {IIT} Madras, Chennai, India, 2-7 January 2011}, pages = {232--237}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/VLSID.2011.45}, doi = {10.1109/VLSID.2011.45}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsid/TajammulSHM11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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