BibTeX records: Vamsi Boppana

download as .bib file

@inproceedings{DBLP:conf/hotchips/AhmadSBLHKNSW19,
  author       = {Sagheer Ahmad and
                  Sridhar Subramanian and
                  Vamsi Boppana and
                  Shankar Lakka and
                  Fu{-}Hing Ho and
                  Tomai Knopp and
                  Juanjo Noguera and
                  Gaurav Singh and
                  Ralph Wittig},
  title        = {Xilinx First 7nm Device: Versal {AI} Core {(VC1902)}},
  booktitle    = {Hot Chips Symposium},
  pages        = {1--28},
  publisher    = {{IEEE}},
  year         = {2019}
}
@article{DBLP:journals/micro/AhmadBGKRW16,
  author       = {Sagheer Ahmad and
                  Vamsi Boppana and
                  Ilya Ganusov and
                  Vinod Kathail and
                  Vidya Rajagopalan and
                  Ralph Wittig},
  title        = {A 16-nm Multiprocessing System-on-Chip Field-Programmable Gate Array
                  Platform},
  journal      = {{IEEE} Micro},
  volume       = {36},
  number       = {2},
  pages        = {48--62},
  year         = {2016}
}
@inproceedings{DBLP:conf/hotchips/BoppanaAGKRW15,
  author       = {Vamsi Boppana and
                  Sagheer Ahmad and
                  Ilya Ganusov and
                  Vinod Kathail and
                  Vidya Rajagopalan and
                  Ralph Wittig},
  title        = {UltraScale+ MPSoC and {FPGA} families},
  booktitle    = {Hot Chips Symposium},
  pages        = {1--37},
  publisher    = {{IEEE}},
  year         = {2015}
}
@inproceedings{DBLP:conf/hotchips/RajagopalanBDTW11,
  author       = {Vidya Rajagopalan and
                  Vamsi Boppana and
                  Sandeep Dutta and
                  Brad Taylor and
                  Ralph Wittig},
  title        = {Xilinx Zynq-7000 {EPP:} An extensible processing platform family},
  booktitle    = {Hot Chips Symposium},
  pages        = {1--24},
  publisher    = {{IEEE}},
  year         = {2011}
}
@inproceedings{DBLP:conf/islped/BhongeB08,
  author       = {Shashank Bhonge and
                  Vamsi Boppana},
  title        = {Low power chips: a fabless asic perspective},
  booktitle    = {{ISLPED}},
  pages        = {347--348},
  publisher    = {{ACM}},
  year         = {2008}
}
@inproceedings{DBLP:conf/vlsid/BoppanaVB08,
  author       = {Vamsi Boppana and
                  Rahoul Varma and
                  S. Balajee},
  title        = {Implementing the Best Processor Cores},
  booktitle    = {{VLSI} Design},
  pages        = {17--18},
  publisher    = {{IEEE} Computer Society},
  year         = {2008}
}
@article{DBLP:journals/computer/RoyBB05,
  author       = {Rob Roy and
                  Debashis Bhattacharya and
                  Vamsi Boppana},
  title        = {Transistor-Level Optimization of Digital Designs with Flex Cells},
  journal      = {Computer},
  volume       = {38},
  number       = {2},
  pages        = {53--61},
  year         = {2005}
}
@inproceedings{DBLP:conf/dac/YoshidaDB04,
  author       = {Hiroaki Yoshida and
                  Kaushik De and
                  Vamsi Boppana},
  title        = {Accurate pre-layout estimation of standard cell characteristics},
  booktitle    = {{DAC}},
  pages        = {208--211},
  publisher    = {{ACM}},
  year         = {2004}
}
@article{DBLP:journals/tcad/AmyeenFPB03,
  author       = {M. Enamul Amyeen and
                  W. Kent Fuchs and
                  Irith Pomeranz and
                  Vamsi Boppana},
  title        = {Fault equivalence identification in combinational circuits using implication
                  and evaluation techniques},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {22},
  number       = {7},
  pages        = {922--936},
  year         = {2003}
}
@inproceedings{DBLP:conf/vlsid/GhoshSB02,
  author       = {Indradeep Ghosh and
                  Krishna Sekar and
                  Vamsi Boppana},
  title        = {Design for Verification at the Register Transfer Level},
  booktitle    = {{ASP-DAC/VLSI} Design},
  pages        = {420--425},
  publisher    = {{IEEE} Computer Society},
  year         = {2002}
}
@article{DBLP:journals/tcad/RaviGBJ01,
  author       = {Srivaths Ravi and
                  Indradeep Ghosh and
                  Vamsi Boppana and
                  Niraj K. Jha},
  title        = {Fault-diagnosis-based technique for establishing {RTL} and gate-levelcorrespondences},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {20},
  number       = {12},
  pages        = {1414--1425},
  year         = {2001}
}
@inproceedings{DBLP:conf/aspdac/SikdarDBYMC01,
  author       = {Biplab K. Sikdar and
                  Debesh K. Das and
                  Vamsi Boppana and
                  Cliff Yang and
                  Sobhan Mukherjee and
                  Parimal Pal Chaudhuri},
  title        = {Cellular automata as a built in self test structure},
  booktitle    = {{ASP-DAC}},
  pages        = {319--324},
  publisher    = {{ACM}},
  year         = {2001}
}
@inproceedings{DBLP:conf/vts/AmyeenFPB01,
  author       = {M. Enamul Amyeen and
                  W. Kent Fuchs and
                  Irith Pomeranz and
                  Vamsi Boppana},
  title        = {Fault Equivalence Identification Using Redundancy Information and
                  Static and Dynamic Extraction},
  booktitle    = {{VTS}},
  pages        = {124--130},
  publisher    = {{IEEE} Computer Society},
  year         = {2001}
}
@inproceedings{DBLP:conf/iccd/RaviJGB00,
  author       = {Srivaths Ravi and
                  Niraj K. Jha and
                  Indradeep Ghosh and
                  Vamsi Boppana},
  title        = {A Technique for Identifying {RTL} and Gate-Level Correspondences},
  booktitle    = {{ICCD}},
  pages        = {591--594},
  publisher    = {{IEEE} Computer Society},
  year         = {2000}
}
@inproceedings{DBLP:conf/vlsid/BoppanaGMJF00,
  author       = {Vamsi Boppana and
                  Indradeep Ghosh and
                  Rajarshi Mukherjee and
                  Jawahar Jain and
                  Masahiro Fujita},
  title        = {Hierarchical Error Diagnosis Targeting {RTL} Circuits},
  booktitle    = {{VLSI} Design},
  pages        = {436--441},
  publisher    = {{IEEE} Computer Society},
  year         = {2000}
}
@inproceedings{DBLP:conf/vlsid/SikdarPBCBYM00,
  author       = {Biplab K. Sikdar and
                  Kolin Paul and
                  Gosta Pada Biswas and
                  Parimal Pal Chaudhuri and
                  Vamsi Boppana and
                  Cliff Yang and
                  Sobhan Mukherjee},
  title        = {Theory and Application of GF(2p) Cellular Automata as On-chip Test
                  Pattern Generator},
  booktitle    = {{VLSI} Design},
  pages        = {556--561},
  publisher    = {{IEEE} Computer Society},
  year         = {2000}
}
@inproceedings{DBLP:conf/vts/JainBMJFH00,
  author       = {Ankur Jain and
                  Vamsi Boppana and
                  Rajarshi Mukherjee and
                  Jawahar Jain and
                  Masahiro Fujita and
                  Michael S. Hsiao},
  title        = {Testing, Verification, and Diagnosis in the Presence of Unknowns},
  booktitle    = {{VTS}},
  pages        = {263--270},
  publisher    = {{IEEE} Computer Society},
  year         = {2000}
}
@inproceedings{DBLP:conf/cav/BoppanaRTF99,
  author       = {Vamsi Boppana and
                  Sreeranga P. Rajan and
                  Koichiro Takayama and
                  Masahiro Fujita},
  title        = {Model Checking Based on Sequential {ATPG}},
  booktitle    = {{CAV}},
  series       = {Lecture Notes in Computer Science},
  volume       = {1633},
  pages        = {418--430},
  publisher    = {Springer},
  year         = {1999}
}
@inproceedings{DBLP:conf/dac/BoppanaMJFB99,
  author       = {Vamsi Boppana and
                  Rajarshi Mukherjee and
                  Jawahar Jain and
                  Masahiro Fujita and
                  Pradeep Bollineni},
  title        = {Multiple Error Diagnosis Based on Xlists},
  booktitle    = {{DAC}},
  pages        = {660--665},
  publisher    = {{ACM} Press},
  year         = {1999}
}
@inproceedings{DBLP:conf/vts/AmyeenFPB99,
  author       = {M. Enamul Amyeen and
                  W. Kent Fuchs and
                  Irith Pomeranz and
                  Vamsi Boppana},
  title        = {Implication and Evaluation Techniques for Proving Fault Equivalence},
  booktitle    = {{VTS}},
  pages        = {201--213},
  publisher    = {{IEEE} Computer Society},
  year         = {1999}
}
@inproceedings{DBLP:conf/vts/JainHBF99,
  author       = {Ankur Jain and
                  Michael S. Hsiao and
                  Vamsi Boppana and
                  Masahiro Fujita},
  title        = {On the Evaluation of Arbitrary Defect Coverage of Test Sets},
  booktitle    = {{VTS}},
  pages        = {426--432},
  publisher    = {{IEEE} Computer Society},
  year         = {1999}
}
@inproceedings{DBLP:conf/iccad/BoppanaF98,
  author       = {Vamsi Boppana and
                  W. Kent Fuchs},
  title        = {Dynamic fault collapsing and diagnostic test pattern generation for
                  sequential circuits},
  booktitle    = {{ICCAD}},
  pages        = {147--154},
  publisher    = {{ACM} / {IEEE} Computer Society},
  year         = {1998}
}
@inproceedings{DBLP:conf/itc/BoppanaF98,
  author       = {Vamsi Boppana and
                  Masahiro Fujita},
  title        = {Modeling the unknown! Towards model-independent fault and error diagnosis},
  booktitle    = {{ITC}},
  pages        = {1094--1101},
  publisher    = {{IEEE} Computer Society},
  year         = {1998}
}
@phdthesis{DBLP:phd/us/Boppana97,
  author       = {Vamsi Boppana},
  title        = {State Information-Based Solutions for Sequential Circuit Diagnosis
                  and Testing},
  school       = {University of Illinois Urbana-Champaign, {USA}},
  year         = {1997}
}
@inproceedings{DBLP:conf/vlsid/BoppanaHF97,
  author       = {Vamsi Boppana and
                  Ismed Hartanto and
                  W. Kent Fuchs},
  title        = {Characterization and Implicit Identification of Sequential Indistinguishability},
  booktitle    = {{VLSI} Design},
  pages        = {376--380},
  publisher    = {{IEEE} Computer Society},
  year         = {1997}
}
@inproceedings{DBLP:conf/vts/HartantoBPF97,
  author       = {Ismed Hartanto and
                  Vamsi Boppana and
                  Janak H. Patel and
                  W. Kent Fuchs},
  title        = {Diagnostic Test Pattern Generation for Sequential Circuits},
  booktitle    = {{VTS}},
  pages        = {196--202},
  publisher    = {{IEEE} Computer Society},
  year         = {1997}
}
@inproceedings{DBLP:conf/europar/BoppanaSBFL96,
  author       = {Vamsi Boppana and
                  Prashant Saxena and
                  Prithviraj Banerjee and
                  W. Kent Fuchs and
                  C. L. Liu},
  title        = {A Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs},
  booktitle    = {Euro-Par, Vol. {I}},
  series       = {Lecture Notes in Computer Science},
  volume       = {1123},
  pages        = {828--831},
  publisher    = {Springer},
  year         = {1996}
}
@inproceedings{DBLP:conf/ftcs/BoppanaHF96,
  author       = {Vamsi Boppana and
                  Ismed Hartanto and
                  W. Kent Fuchs},
  title        = {Fault Diagnosis Using State Information},
  booktitle    = {{FTCS}},
  pages        = {96--103},
  publisher    = {{IEEE} Computer Society},
  year         = {1996}
}
@inproceedings{DBLP:conf/iccad/HartantoBF96,
  author       = {Ismed Hartanto and
                  Vamsi Boppana and
                  W. Kent Fuchs},
  title        = {Identification of unsettable flip-flops for partial scan and faster
                  {ATPG}},
  booktitle    = {{ICCAD}},
  pages        = {63--66},
  publisher    = {{IEEE} Computer Society / {ACM}},
  year         = {1996}
}
@inproceedings{DBLP:conf/iccad/BoppanaF96,
  author       = {Vamsi Boppana and
                  W. Kent Fuchs},
  title        = {Integrated fault diagnosis targeting reduced simulation},
  booktitle    = {{ICCAD}},
  pages        = {681--684},
  publisher    = {{IEEE} Computer Society / {ACM}},
  year         = {1996}
}
@inproceedings{DBLP:conf/itc/HartantoBF96,
  author       = {Ismed Hartanto and
                  Vamsi Boppana and
                  W. Kent Fuchs},
  title        = {Diagnostic Fault Equivalence Identification Using Redundancy Information
                  and Structural Analysis},
  booktitle    = {{ITC}},
  pages        = {294--302},
  publisher    = {{IEEE} Computer Society},
  year         = {1996}
}
@inproceedings{DBLP:conf/itc/BoppanaF96,
  author       = {Vamsi Boppana and
                  W. Kent Fuchs},
  title        = {Partial Scan Design Based on State Transition Modeling},
  booktitle    = {{ITC}},
  pages        = {538--547},
  publisher    = {{IEEE} Computer Society},
  year         = {1996}
}
@inproceedings{DBLP:conf/vts/BoppanaHF96,
  author       = {Vamsi Boppana and
                  Ismed Hartanto and
                  W. Kent Fuchs},
  title        = {Full fault dictionary storage based on labeled tree encoding},
  booktitle    = {{VTS}},
  pages        = {174--179},
  publisher    = {{IEEE} Computer Society},
  year         = {1996}
}
@inproceedings{DBLP:conf/iccad/BoppanaF94,
  author       = {Vamsi Boppana and
                  W. Kent Fuchs},
  title        = {Fault dictionary compaction by output sequence removal},
  booktitle    = {{ICCAD}},
  pages        = {576--579},
  publisher    = {{IEEE} Computer Society / {ACM}},
  year         = {1994}
}
@inproceedings{DBLP:conf/vlsid/NandiBC94,
  author       = {Sukumar Nandi and
                  Vamsi Boppana and
                  Parimal Pal Chaudhuri},
  title        = {A {CAD} Tool for Design of On-Chip Store {\&} Generate Scheme},
  booktitle    = {{VLSI} Design},
  pages        = {169--174},
  publisher    = {{IEEE} Computer Society},
  year         = {1994}
}
@inproceedings{DBLP:conf/vlsid/NandiBCCR93,
  author       = {Sukumar Nandi and
                  Vamsi Boppana and
                  Supratik Chakraborty and
                  Parimal Pal Chaudhuri and
                  Samir Roy},
  title        = {Delay Fault Test Generation with Cellular Automata},
  booktitle    = {{VLSI} Design},
  pages        = {281--286},
  publisher    = {{IEEE} Computer Society},
  year         = {1993}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics