BibTeX records: Vikram Saxena

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@inproceedings{DBLP:conf/slpat/BhatASK13,
  author       = {Chitralekha Bhat and
                  Imran Ahmed and
                  Vikram Saxena and
                  Sunil Kumar Kopparapu},
  editor       = {Jan Alexandersson and
                  Peter Ljungl{\"{o}}f and
                  Kathleen F. McCoy and
                  Fran{\c{c}}ois Portet and
                  Brian Roark and
                  Frank Rudzicz and
                  Michel Vacher},
  title        = {Visual Subtitles for Internet Videos},
  booktitle    = {Proceedings of the Fourth Workshop on Speech and Language Processing
                  for Assistive Technologies, {SLPAT} 2013, Grenoble, France, August
                  21-22, 2013},
  pages        = {17--20},
  publisher    = {Association for Computational Linguistics},
  year         = {2013},
  url          = {https://aclanthology.org/W13-3904/},
  timestamp    = {Fri, 06 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/slpat/BhatASK13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/uksim/SaxenaK13,
  author       = {Vikram Saxena and
                  Sunil Kumar Kopparapu},
  editor       = {David Al{-}Dabass and
                  Alessandra Orsoni and
                  Jasmy Yunus and
                  Richard J. Cant and
                  Zuwairie Ibrahim},
  title        = {An Optimization Approach to Identify the Best Sell Market},
  booktitle    = {15th International Conference on Computer Modelling and Simulation,
                  UKSim 2013, Cambridge, United Kingdom, April 10-12, 2013},
  pages        = {177--181},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/UKSim.2013.100},
  doi          = {10.1109/UKSIM.2013.100},
  timestamp    = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl       = {https://dblp.org/rec/conf/uksim/SaxenaK13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/BanerjeeHNKSPBPTZAU04,
  author       = {Prithviraj Banerjee and
                  Malay Haldar and
                  Anshuman Nayak and
                  Victor Kim and
                  Vikram Saxena and
                  Steven Parkes and
                  Debabrata Bagchi and
                  Satrajit Pal and
                  Nikhil Tripathi and
                  David Zaretsky and
                  Robert Anderson and
                  Juan Ramon Uribe},
  title        = {Overview of a compiler for synthesizing {MATLAB} programs onto FPGAs},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {12},
  number       = {3},
  pages        = {312--324},
  year         = {2004},
  url          = {https://doi.org/10.1109/TVLSI.2004.824301},
  doi          = {10.1109/TVLSI.2004.824301},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/BanerjeeHNKSPBPTZAU04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/BanerjeeSUHNKBPTA03,
  author       = {Prithviraj Banerjee and
                  Vikram Saxena and
                  Juan Ramon Uribe and
                  Malay Haldar and
                  Anshuman Nayak and
                  Victor Kim and
                  Debabrata Bagchi and
                  Satrajit Pal and
                  Nikhil Tripathi and
                  Robert Anderson},
  editor       = {Steve Trimberger and
                  Russell Tessier},
  title        = {Making area-performance tradeoffs at the high level using the AccelFPGA
                  compiler for FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
  pages        = {237},
  publisher    = {{ACM}},
  year         = {2003},
  url          = {https://doi.org/10.1145/611817.611854},
  doi          = {10.1145/611817.611854},
  timestamp    = {Tue, 09 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/BanerjeeSUHNKBPTA03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/SaxenaNH02,
  author       = {Vikram Saxena and
                  Farid N. Najm and
                  Ibrahim N. Hajj},
  title        = {Estimation of state line statistics in sequential circuits},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {7},
  number       = {3},
  pages        = {455--473},
  year         = {2002},
  url          = {https://doi.org/10.1145/567270.567275},
  doi          = {10.1145/567270.567275},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/SaxenaNH02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/SaxenaNH97,
  author       = {Vikram Saxena and
                  Farid N. Najm and
                  Ibrahim N. Hajj},
  title        = {Monte-Carlo approach for power estimation in sequential circuits},
  booktitle    = {European Design and Test Conference, ED{\&}TC '97, Paris, France,
                  17-20 March 1997},
  pages        = {416--420},
  publisher    = {{IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/EDTC.1997.582393},
  doi          = {10.1109/EDTC.1997.582393},
  timestamp    = {Fri, 20 May 2022 15:59:03 +0200},
  biburl       = {https://dblp.org/rec/conf/date/SaxenaNH97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsid/KrishnaswamyHSRPB97,
  author       = {Dilip Krishnaswamy and
                  Michael S. Hsiao and
                  Vikram Saxena and
                  Elizabeth M. Rudnick and
                  Janak H. Patel and
                  Prithviraj Banerjee},
  title        = {Parallel Genetic Algorithms for Simulation-Based Sequential Circuit
                  Test Generation},
  booktitle    = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
                  4-7 January 1997, Hyderabad, India},
  pages        = {475--481},
  publisher    = {{IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ICVD.1997.568180},
  doi          = {10.1109/ICVD.1997.568180},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/KrishnaswamyHSRPB97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsi/RavikumarS96,
  author       = {C. P. Ravikumar and
                  Vikram Saxena},
  title        = {{TOGAPS:} {A} Testability Oriented Genetic Algorithm For Pipeline
                  Synthesis},
  journal      = {{VLSI} Design},
  volume       = {5},
  number       = {1},
  pages        = {77--87},
  year         = {1996},
  url          = {https://doi.org/10.1155/1996/65320},
  doi          = {10.1155/1996/65320},
  timestamp    = {Sat, 05 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsi/RavikumarS96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsid/RavikumarS96,
  author       = {C. P. Ravikumar and
                  Vikram Saxena},
  title        = {Synthesis of Testable Pipelined Datapaths Using Genetic Search},
  booktitle    = {9th International Conference on {VLSI} Design {(VLSI} Design 1996),
                  3-6 January 1996, Bangalore, India},
  pages        = {205--210},
  publisher    = {{IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ICVD.1996.489485},
  doi          = {10.1109/ICVD.1996.489485},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/RavikumarS96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}