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Bon Woong Ku

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2018
[c7]
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  dblp key:
  - conf/ispd/KuCL18
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Bon Woong Ku, Kyungwook Chang, Sung Kyu Lim:
Compact-2D: A Physical Design Methodology to Build Commercial-Quality Face-to-Face-Bonded 3D ICs. ISPD 2018: 90-97
2017
[c6]
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  - conf/iccad/ChangKSL17
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Kyungwook Chang, Bon Woong Ku, Saurabh Sinha, Sung Kyu Lim:
Full-chip monolithic 3D IC design and power performance analysis with ASAP7 library: (Invited Paper). ICCAD 2017: 1005-1010
[c5]
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  - conf/islped/KuSNL17
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Bon Woong Ku, Taigon Song, Arthur Nieuwoudt, Sung Kyu Lim:
Transistor-level monolithic 3D standard cell layout optimization for full-chip static power integrity. ISLPED 2017: 1-6
2016
[c4]
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Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Sung Kyu Lim:
How much cost reduction justifies the adoption of monolithic 3D ICs at 7nm node? ICCAD 2016: 87
[c3]
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Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Diederik Verkest, Aaron Thean, Sung Kyu Lim:
Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs. ISLPED 2016: 76-81
[c2]
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  - conf/isqed/AcharyaCKPSCYL16
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Kartik Acharya, Kyungwook Chang, Bon Woong Ku, Shreepad Panth, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
Monolithic 3D IC design: Power, performance, and area impact at 7nm. ISQED 2016: 41-48
2015
[c1]
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  - conf/dac/PengKPPJCL15
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Yarui Peng, Bon Woong Ku, Youn-Sik Park, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Sung Kyu Lim:
Design, packaging, and architectural policy co-optimization for DC power integrity in 3D DRAM. DAC 2015: 91:1-91:6

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