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ORCIDJosé Carlos S. Palma
Person information
- affiliation: Federal University of Rio Grande do Sul, Porto Alegre, Brazil
Other persons with the same name
- José T. Palma
![[0000-0003-2502-4378]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0003-2502-4378")
(aka: José Palma 0001, José T. Palma-Méndez, José Tomás Palma Méndez) — University of Murcia, Department of Information and Communications Engineering, Artificial Intelligence and Knowledge Engineering Research Group, Spain - José Palma 0003 — ESTSetúbal, IPS, Portugal
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2000 – 2009
- 2008
[c13]José Carlos S. Palma, César A. M. Marcon, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Luciano Azevedo, Carlos Eduardo Reif, Carolina Metzler:
A Passive 915 MHz UHF RFID Tag. ISQED 2008: 348-351- 2007
- [c12]José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Ricardo Reis, Manfred Glesner:
Reducing the Power Consumption in Networks-on-Chip through Data Coding Schemes. ICECS 2007: 1007-1010 - [c11]José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis:
Inserting Data Encoding Techniques into NoC-Based Systems. ISVLSI 2007: 299-304 - [c10]César A. M. Marcon, José Carlos S. Palma, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Carlos Eduardo Reif, Luciano Azevedo, Carolina Metzler:
A 915 MHz UHF low power RFID tag. SBCCI 2007: 276-281 - [c9]José Carlos S. Palma, César A. M. Marcon, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Luciano Azevedo, Carlos Eduardo Reif, Carolina Metzler:
A Flexible Design Flow for a Low Power RFID Tag. VLSI-SoC 2007: 300-303 - 2006
- [c8]José Carlos S. Palma, Ricardo A. L. Reis, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Fernando Gehm Moraes:
Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip. ISVLSI 2006: 426-427 - [c7]José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis:
Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry. PATMOS 2006: 603-613 - 2005
- [c6]Luciano Ost, Aline Mello, José Palma, Fernando Gehm Moraes, Ney Calazans:
MAIA: a framework for networks on chip generation and verification. ASP-DAC 2005: 49-52 - [c5]José Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin:
Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation. SBCCI 2005: 196-201 - [c4]César A. M. Marcon, José Carlos S. Palma, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis:
Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs. VLSI-SoC 2005: 179-194 - 2003
- [c3]Fernando Gehm Moraes, Daniel Mesquita, José Carlos S. Palma, Leandro Möller, Ney Laert Vilar Calazans:
Development of a Tool-Set for Remote and Partial Reconfiguration of FPGAs. DATE 2003: 11122-11123 - [c2]Daniel Mesquita, Fernando Gehm Moraes, José Palma, Leandro Möller, Ney Laert Vilar Calazans:
Remote and Partial Reconfiguration of FPGAs: Tools and Trends. IPDPS 2003: 177 - 2002
- [c1]José Carlos S. Palma, Aline Vieira de Mello, Leandro Möller, Fernando Moraes, Ney Calazans:
Core Communication Interface for FPGAs. SBCCI 2002: 183-190
Coauthor Index
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