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ORCIDAlan P. Smith 0002
Person information
- affiliation: Oracle, Santa Clara, CA, USA
Other persons with the same name
- Alan P. Smith 0001 — BT Research, UK
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2010 – 2019
- 2016
[j4]Georgios K. Konstadinidis, Hongping Penny Li, Francis Schumacher, Venkatram Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert P. Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister, Jeffrey Brooks, Ha Pham, Sebastian Turullols, Yifan YangGong, Robert T. Golla, Alan P. Smith, Ali Vahidsafa:
SPARC M7: A 20 nm 32-Core 64 MB L3 Cache Processor. IEEE J. Solid State Circuits 51(1): 79-91 (2016)- 2013
- [j3]Jinuk Luke Shin, Robert T. Golla, Hongping Penny Li, Sudesna Dash, Youngmoon Choi, Alan P. Smith, Harikaran Sathianathan, Mayur Joshi, Heechoul Park, Mohamed Elgebaly, Sebastian Turullols, Song Kim, Robert P. Masleid, Georgios K. Konstadinidis, Mary Jo Doherty, Greg Grohoski, Curtis McAllister:
The Next Generation 64b SPARC Core in a T4 SoC Processor. IEEE J. Solid State Circuits 48(1): 82-90 (2013) - 2012
- [c2]Jinuk Luke Shin, Heechoul Park, Hongping Penny Li, Alan P. Smith, Youngmoon Choi, Harikaran Sathianathan, Sudesna Dash, Sebastian Turullols, Song Kim, Robert P. Masleid, Georgios K. Konstadinidis, Robert T. Golla, Mary Jo Doherty, Greg Grohoski, Curtis McAllister:
The next-generation 64b SPARC core in a T4 SoC processor. ISSCC 2012: 60-62 - 2011
- [j2]Jinuk Luke Shin, Dawei Huang, Bruce Petrick, Changku Hwang, Kenway W. Tam, Alan P. Smith, Ha Pham, Hongping Penny Li, Timothy Johnson, Francis Schumacher, Ana Sonia Leon, Allan Strong:
A 40 nm 16-Core 128-Thread SPARC SoC Processor. IEEE J. Solid State Circuits 46(1): 131-144 (2011) - 2010
- [c1]Jinuk Luke Shin, Kenway W. Tam, Dawei Huang, Bruce Petrick, Ha Pham, Changku Hwang, Hongping Penny Li, Alan P. Smith, Timothy Johnson, Francis Schumacher, David Greenhill, Ana Sonia Leon, Allan Strong:
A 40nm 16-core 128-thread CMT SPARC SoC processor. ISSCC 2010: 98-99
2000 – 2009
- 2002
- [j1]Georgios K. Konstadinidis, Kevin Normoyle, Samson Wong, Sutikshan Bhutani, Harry Stuimer, Timothy Johnson, Alan P. Smith, Daniel Y. Cheung, Fabrizio Romano, Shifeng Yu, Sung-Hun Oh, Victor Melamed, Sridhar Narayanan, David Bunsey, Cong Khieu, Kevin J. Wu, Ralf Schmitt, Andy Dumlao, Massimo Sutera, Jade Chau, K. James Lin, William S. Coates:
Implementation of a third-generation 1.1-GHz 64-bit microprocessor. IEEE J. Solid State Circuits 37(11): 1461-1469 (2002)
Coauthor Index
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last updated on 2023-09-27 22:50 CEST by the dblp team
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