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Charles H.-P. Wen
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Publications
- 2018
- [j14]Chia-Ling Lynn Chang, Charles H.-P. Wen:
Accurate performance evaluation of VLSI designs with selected CMOS process parameters. IET Circuits Devices Syst. 12(1): 116-123 (2018) - 2015
- [j9]Chia-Ling Lynn Chang, Charles H.-P. Wen:
Demystifying Iddq Data With Process Variation for Automatic Chip Classification. IEEE Trans. Very Large Scale Integr. Syst. 23(6): 1175-1179 (2015) - 2013
- [c22]Chia-Ling Chang, Charles H.-P. Wen, Jayanta Bhadra:
Process-variation-aware Iddq diagnosis for nano-scale CMOS designs - the first step. DATE 2013: 454-457 - 2012
- [c19]Chia-Ling Chang, Chia-Ching Chang, Hui-Ling Chan, Charles H.-P. Wen, Jayanta Bhadra:
An intelligent analysis of Iddq data for chip classification in very deep-submicron (VDSM) CMOS technology. ASP-DAC 2012: 163-168 - 2009
- [c13]Chia-Ling Chang, Charles H.-P. Wen, Jayanta Bhadra:
Speeding up bounded sequential equivalence checking with cross-timeframe state-pair constraints from data learning. ITC 2009: 1-8 - 2008
- [c10]Chia-Ling Lynn Chang, Charles H.-P. Wen:
Mining Unreachable Cross-Timeframe State-Pairs for Bounded Sequential Equivalence Checking. MTV 2008: 33-38
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