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Viktor Sverdlov

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Hiwa Mahmoudi

> Home > Persons > Viktor Sverdlov

Publications

2014
[c13]
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  - conf/mixdes/SverdlovMMS14
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  - https://dblp.org/rec/conf/mixdes/SverdlovMMS14
Viktor Sverdlov, Hiwa Mahmoudi, Alexander Makarov, Siegfried Selberherr:
Magnetic tunnel junctions for future memory and logic-in-memory applications. MIXDES 2014: 30-33
[c12]
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  - conf/mixdes/MahmoudiWSS14
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  - https://dblp.org/rec/conf/mixdes/MahmoudiWSS14
Hiwa Mahmoudi, Thomas Windbacher, Viktor Sverdlov, Siegfried Selberherr:
Compact modeling of memristive IMP gates for reliable stateful logic design. MIXDES 2014: 58-61
2013
[c10]
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  - conf/nanoarch/MahmoudiWSS13
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  - https://dblp.org/rec/conf/nanoarch/MahmoudiWSS13
Hiwa Mahmoudi, Thomas Windbacher, Viktor Sverdlov, Siegfried Selberherr:
MRAM-based logic array for large-scale non-volatile logic-in-memory applications. NANOARCH 2013: 26-27
[c9]
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  - conf/nanoarch/WindbacherMSS13
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  - https://dblp.org/rec/conf/nanoarch/WindbacherMSS13
Thomas Windbacher, Hiwa Mahmoudi, Viktor Sverdlov, Siegfried Selberherr:
Novel MTJ-based shift register for non-volatile logic applications. NANOARCH 2013: 36-37
2012
[c8]
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  - conf/essderc/MahmoudiSS12
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  - https://dblp.org/rec/conf/essderc/MahmoudiSS12
Hiwa Mahmoudi, Viktor Sverdlov, Siegfried Selberherr:
MTJ-based implication logic gates and circuit architecture for large-scale spintronic stateful logic systems. ESSDERC 2012: 254-257

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