Hyung-Rok Oh

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Kisung Kim

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Publications

2008
[j4]
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KwangJin Lee, Beak-Hyung Cho, Woo-Yeong Cho, Sangbeom Kang, Byung-Gil Choi, Hyung-Rok Oh, Changsoo Lee, Hye-Jin Kim, Joon-min Park, Qi Wang, Mu-Hui Park, Yu-Hwan Ro, Joon-Yong Choi, Ki-Sung Kim, Young-Ran Kim, In-Cheol Shin, Ki-won Lim, Ho-Keun Cho, ChangHan Choi, Won-ryul Chung, Du-Eung Kim, Yong-Jin Yoon, Kwang-Suk Yu, Gi-Tae Jeong, Hong-Sik Jeong, Choong-Keun Kwak, Chang-Hyun Kim, Kinam Kim:
A 90 nm 1.8 V 512 Mb Diode-Switch PRAM With 266 MB/s Read Throughput. IEEE J. Solid State Circuits 43(1): 150-162 (2008)
2007
[j3]
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Sangbeom Kang, Woo Yeong Cho, Beak-Hyung Cho, KwangJin Lee, Changsoo Lee, Hyung-Rok Oh, Byung-Gil Choi, Qi Wang, Hye-Jin Kim, Mu-Hui Park, Yu-Hwan Ro, Suyeon Kim, Choong-Duk Ha, Ki-Sung Kim, Young-Ran Kim, Du-Eung Kim, Choong-Keun Kwak, Hyun-Geun Byun, Gitae Jeong, Hong-Sik Jeong, Kinam Kim, YunSueng Shin:
A 0.1-µm 1.8-V 256-Mb Phase-Change Random Access Memory (PRAM) With 66-MHz Synchronous Burst-Read Operation. IEEE J. Solid State Circuits 42(1): 210-218 (2007)
[c2]
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  - conf/isscc/LeeCCKCOLKPWPRCKKSLCCCKYJJKKK07
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KwangJin Lee, Beak-Hyung Cho, Woo-Yeong Cho, Sangbeom Kang, Byung-Gil Choi, Hyung-Rok Oh, Changsoo Lee, Hye-Jin Kim, Joon-min Park, Qi Wang, Mu-Hui Park, Yu-Hwan Ro, Joon-Yong Choi, Ki-Sung Kim, Young-Ran Kim, In-Cheol Shin, Ki-won Lim, Ho-Keun Cho, ChangHan Choi, Won-ryul Chung, Du-Eung Kim, Kwang-Suk Yu, Gitae Jeong, Hongsik Jeong, Choong-Keun Kwak, Chang-Hyun Kim, Kinam Kim:
A 90nm 1.8V 512Mb Diode-Switch PRAM with 266MB/s Read Throughput. ISSCC 2007: 472-616
2006
[j2]
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Hyung-Rok Oh, Beak-Hyung Cho, Woo Yeong Cho, Sangbeom Kang, Byung-Gil Choi, Hye-Jin Kim, Ki-Sung Kim, Du-Eung Kim, Choong-Keun Kwak, Hyun-Geun Byun, Gitae Jeong, Hong-Sik Jeong, Kinam Kim:
Enhanced write performance of a 64-mb phase-change random access memory. IEEE J. Solid State Circuits 41(1): 122-126 (2006)
[c1]
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  - conf/isscc/KangCCLLOCWKPRK06
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Sangbeom Kang, WooYeong Cho, Beak-Hyung Cho, Kwangjin Lee, Changsoo Lee, Hyung-Rok Oh, Byung-Gil Choi, Qi Wang, Hye-Jin Kim, Mu-Hui Park, Yu-Hwan Ro, Suyeon Kim, Du-Eung Kim, Kang-Sik Cho, Choong-Duk Ha, Young-Ran Kim, Ki-Sung Kim, Choong-Ryeol Hwang, Choong-Keun Kwak, Hyun-Geun Byun, YunSueng Shin:
A 0.1µm 1.8V 256Mb 66MHz Synchronous Burst PRAM. ISSCC 2006: 487-496
2005
[j1]
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  - journals/jssc/ChoCCOKKKKKBHAK05
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Woo Yeong Cho, Beak-Hyung Cho, Byung-Gil Choi, Hyung-Rok Oh, Sangbeom Kang, Ki-Sung Kim, Kyung-Hee Kim, Du-Eung Kim, Choong-Keun Kwak, Hyun-Geun Byun, Youngnam Hwang, SuJin Ahn, Gwan-Hyeob Koh, Gitae Jeong, Hongsik Jeong, Kinam Kim:
A 0.18-μm 3.0-V 64-Mb nonvolatile phase-transition random access memory (PRAM). IEEE J. Solid State Circuits 40(1): 293-300 (2005)

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