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Kolin Paul
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Publications
- 2022
- [j29]Saurabh Tewari, Anshul Kumar, Kolin Paul:
Minimizing Off-Chip Memory Access for CNN Accelerators. IEEE Consumer Electron. Mag. 11(3): 95-104 (2022) - [c91]Saurabh Tewari, Anshul Kumar, Kolin Paul:
SACC: Split and Combine Approach to Reduce the Off-chip Memory Accesses of LSTM Accelerators. DATE 2022: 580-583 - 2020
- [c79]Saurabh Tewari, Anshul Kumar, Kolin Paul:
Bus Width Aware Off-Chip Memory Access Minimization for CNN Accelerators. ISVLSI 2020: 240-245 - 2013
- [c38]U. Nidhi, Kolin Paul, Ahmed Hemani, Anshul Kumar:
High performance 3D-FFT implementation. ISCAS 2013: 2227-2230 - 2010
- [c20]Nagaraju Pothineni, Philip Brisk, Paolo Ienne, Anshul Kumar, Kolin Paul:
A high-level synthesis flow for custom instruction set extensions for application-specific processors. ASP-DAC 2010: 707-712 - 2008
- [c17]Nagaraju Pothineni, Anshul Kumar, Kolin Paul:
Exhaustive Enumeration of Legal Custom Instructions for Extensible Processors. VLSI Design 2008: 261-266 - [c16]Nagaraju Pothineni, Anshul Kumar, Kolin Paul:
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions. VLSI Design 2008: 348-353 - 2007
- [c15]Nagaraju Pothineni, Anshul Kumar, Kolin Paul:
Recurring Pattern Identification and its Application to Instruction Set Extension. CDES 2007: 67-73 - [c13]Nagaraju Pothineni, Anshul Kumar, Kolin Paul:
Application Specific Datapath Extension with Distributed I/O Functional Units. VLSI Design 2007: 551-558
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