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ORCIDSyed Suhaib
Person information
- affiliation: Virginia Tech, Blacksburg, Virginia, USA
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2000 – 2009
- 2008
[j4]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla:
A Trace-Based Framework for Verifiable GALS Composition of IPs. IEEE Trans. Very Large Scale Integr. Syst. 16(9): 1176-1186 (2008)- [c9]Syed Suhaib, Bijoy Antony Jose, Sandeep K. Shukla
, Deepak Mathaikutty:
Formal Transformation of a KPN Specification to a GALS Implementation. FDL 2008: 84-89 - 2007
- [b1]Syed Suhaib:
Formal Methods for Intellectual Property Composition Across Synchronization Domains. Virginia Tech, Blacksburg, VA, USA, 2007 - [c8]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla:
Dataflow Architectures for GALS. FMGALS@MEMOCODE 2007: 33-50 - 2006
- [j3]Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep K. Shukla:
Validating Families of Latency Insensitive Protocols. IEEE Trans. Computers 55(11): 1391-1401 (2006) - [c7]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, Jean-Pierre Talpin:
Polychronous Methodology For System Design: A True Concurrency Approach. HLDVT 2006: 211-214 - [c6]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla:
A Trace Based Framework for Validation of SoC Designs with GALS Systems. SoCC 2006: 247-250 - 2005
- [j2]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner:
XFM: An incremental methodology for developing formal models. ACM Trans. Design Autom. Electr. Syst. 10(4): 589-609 (2005) - [c5]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner:
Validating families of latency insensitive protocols. HLDVT 2005: 127-134 - [c4]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla:
System Level Design Methodology for System On Chips using Multi-Threaded Graphs. SoCC 2005: 133-136 - [c3]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner, Jean-Pierre Talpin:
A Functional Programming Framework for Latency Insensitive Protocol Validation. FMGALS@MEMOCODE 2005: 169-188 - 2004
- [j1]Peng Li, Binoy Ravindran, Syed Suhaib, Shahrooz Feizabadi:
A Formally Verified Application-Level Framework for Real-Time Scheduling on POSIX Real-Time Operating Systems. IEEE Trans. Software Eng. 30(9): 613-629 (2004) - [c2]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla:
Effects of property ordering in an incremental formal modeling methodology. HLDVT 2004: 89-94 - [c1]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner:
Extreme Formal Modeling (XFM) for Hardware Models. MTV 2004: 30-35
Coauthor Index
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