BibTeX record conf/apccas/JiangWCSUM10

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@inproceedings{DBLP:conf/apccas/JiangWCSUM10,
  author       = {Yang Jiang and
                  Kim{-}Fai Wong and
                  Chen{-}Yan Cai and
                  Sai{-}Weng Sin and
                  Seng{-}Pan U and
                  Rui Paulo Martins},
  title        = {A reduced jitter-sensitivity clock generation technique for continuous-time
                  {\(\Sigma\)}{\(\Delta\)} modulators},
  booktitle    = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2010,
                  Kuala Lumpur, Malaysia, December 6-9, 2010},
  pages        = {1011--1014},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/APCCAS.2010.5774943},
  doi          = {10.1109/APCCAS.2010.5774943},
  timestamp    = {Tue, 29 Dec 2020 18:38:15 +0100},
  biburl       = {https://dblp.org/rec/conf/apccas/JiangWCSUM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}