BibTeX record conf/asicon/LiuXSGJYZ17

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@inproceedings{DBLP:conf/asicon/LiuXSGJYZ17,
  author       = {Xiaozhen Liu and
                  Hongxiang Xie and
                  Jin Sha and
                  Feifei Gao and
                  Shi Jin and
                  Xiaohu You and
                  Chuan Zhang},
  editor       = {Yajie Qin and
                  Zhiliang Hong and
                  Ting{-}Ao Tang},
  title        = {The {VLSI} architecture for channel estimation based on {ADMA}},
  booktitle    = {12th {IEEE} International Conference on ASIC, {ASICON} 2017, Guiyang,
                  China, October 25-28, 2017},
  pages        = {1073--1076},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ASICON.2017.8252665},
  doi          = {10.1109/ASICON.2017.8252665},
  timestamp    = {Tue, 04 Jul 2023 11:12:36 +0200},
  biburl       = {https://dblp.org/rec/conf/asicon/LiuXSGJYZ17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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