BibTeX record conf/aspdac/ChenSYL16

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@inproceedings{DBLP:conf/aspdac/ChenSYL16,
  author       = {Renhai Chen and
                  Zili Shao and
                  Chia{-}Lin Yang and
                  Tao Li},
  title        = {MCSSim: {A} memory channel storage simulator},
  booktitle    = {21st Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2016, Macao, Macao, January 25-28, 2016},
  pages        = {153--158},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ASPDAC.2016.7428004},
  doi          = {10.1109/ASPDAC.2016.7428004},
  timestamp    = {Wed, 15 Sep 2021 13:43:49 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/ChenSYL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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