BibTeX record conf/ats/EinspahrMS98

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@inproceedings{DBLP:conf/ats/EinspahrMS98,
  author       = {Kent L. Einspahr and
                  Shashank K. Mehta and
                  Sharad C. Seth},
  title        = {Synthesis of Sequential Circuits with Clock Control to Improve Testability},
  booktitle    = {7th Asian Test Symposium {(ATS} '98), 2-4 December 1998, Singapore},
  pages        = {472},
  publisher    = {{IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/ATS.1998.741659},
  doi          = {10.1109/ATS.1998.741659},
  timestamp    = {Fri, 24 Mar 2023 00:02:33 +0100},
  biburl       = {https://dblp.org/rec/conf/ats/EinspahrMS98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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