BibTeX record conf/hpca/ChaOSHPJCJSCAK17

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@inproceedings{DBLP:conf/hpca/ChaOSHPJCJSCAK17,
  author       = {Sang{-}uhn Cha and
                  Seongil O and
                  Hyunsung Shin and
                  Sangjoon Hwang and
                  Kwang{-}Il Park and
                  Seong{-}Jin Jang and
                  Joo{-}Sun Choi and
                  Gyo{-}Young Jin and
                  Young Hoon Son and
                  Hyunyoon Cho and
                  Jung Ho Ahn and
                  Nam Sung Kim},
  title        = {Defect Analysis and Cost-Effective Resilience Architecture for Future
                  {DRAM} Devices},
  booktitle    = {2017 {IEEE} International Symposium on High Performance Computer Architecture,
                  {HPCA} 2017, Austin, TX, USA, February 4-8, 2017},
  pages        = {61--72},
  publisher    = {{IEEE} Computer Society},
  year         = {2017},
  url          = {https://doi.org/10.1109/HPCA.2017.30},
  doi          = {10.1109/HPCA.2017.30},
  timestamp    = {Fri, 24 Mar 2023 00:02:08 +0100},
  biburl       = {https://dblp.org/rec/conf/hpca/ChaOSHPJCJSCAK17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}