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BibTeX record conf/isscc/ChunCHKKYKLKYSC18
@inproceedings{DBLP:conf/isscc/ChunCHKKYKLKYSC18, author = {Ki Chul Chun and Yong{-}Gyu Chu and Jin{-}Seok Heo and Tae{-}Sung Kim and Soohwan Kim and Hui{-}Kap Yang and Mi{-}Jo Kim and Chang{-}Kyo Lee and Ju{-}Hwan Kim and Hyunchul Yoon and Chang{-}Ho Shin and Sang{-}uhn Cha and Hyung{-}Jin Kim and Young{-}Sik Kim and Kyungryun Kim and Young{-}Ju Kim and Won{-}Jun Choi and Dae{-}Sik Yim and Inkyu Moon and Young{-}Ju Kim and Junha Lee and Young Choi and Yongmin Kwon and Sung{-}Won Choi and Jung{-}Wook Kim and Yoon{-}Suk Park and Woongdae Kang and Jinil Chung and Seunghyun Kim and Yesin Ryu and Seong{-}Jin Cho and Hoon Shin and Hangyun Jung and Sanghyuk Kwon and Kyuchang Kang and Jongmyung Lee and Yujung Song and Youngjae Kim and Eun{-}Ah Kim and Kyung{-}Soo Ha and Kyoung{-}Ho Kim and Seok{-}Hun Hyun and Seung{-}Bum Ko and Jung{-}Hwan Choi and Young{-}Soo Sohn and Kwang{-}Il Park and Seong{-}Jin Jang}, title = {A 16Gb {LPDDR4X} {SDRAM} with an NBTI-tolerant circuit solution, an {SWD} {PMOS} {GIDL} reduction technique, an adaptive gear-down scheme and a metastable-free {DQS} aligner in a 10nm class {DRAM} process}, booktitle = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2018, San Francisco, CA, USA, February 11-15, 2018}, pages = {206--208}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.1109/ISSCC.2018.8310256}, doi = {10.1109/ISSCC.2018.8310256}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isscc/ChunCHKKYKLKYSC18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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