BibTeX record conf/isscc/UeyoshiAHTKMHKM18

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@inproceedings{DBLP:conf/isscc/UeyoshiAHTKMHKM18,
  author    = {Kodai Ueyoshi and
               Kota Ando and
               Kazutoshi Hirose and
               Shinya Takamaeda{-}Yamazaki and
               Junichiro Kadomoto and
               Tomoki Miyata and
               Mototsugu Hamada and
               Tadahiro Kuroda and
               Masato Motomura},
  title     = {{QUEST:} {A} 7.49TOPS multi-purpose log-quantized {DNN} inference
               engine stacked on 96MB 3D {SRAM} using inductive-coupling technology
               in 40nm {CMOS}},
  booktitle = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
               2018, San Francisco, CA, USA, February 11-15, 2018},
  pages     = {216--218},
  year      = {2018},
  crossref  = {DBLP:conf/isscc/2018},
  url       = {https://doi.org/10.1109/ISSCC.2018.8310261},
  doi       = {10.1109/ISSCC.2018.8310261},
  timestamp = {Wed, 14 Mar 2018 15:15:05 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/isscc/UeyoshiAHTKMHKM18},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isscc/2018,
  title     = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
               2018, San Francisco, CA, USA, February 11-15, 2018},
  publisher = {{IEEE}},
  year      = {2018},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8304413},
  isbn      = {978-1-5090-4940-0},
  timestamp = {Wed, 14 Mar 2018 15:12:33 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/isscc/2018},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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