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BibTeX record conf/vdat/ReddyNSV15
@inproceedings{DBLP:conf/vdat/ReddyNSV15, author = {Karri Manikantta Reddy and Kumar Y. B. Nithin and Dheeraj Sharma and M. H. Vasantha}, title = {Low power, high speed error tolerant multiplier using approximate adders}, booktitle = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015, Ahmedabad, India, June 26-29, 2015}, pages = {1--6}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/ISVDAT.2015.7208150}, doi = {10.1109/ISVDAT.2015.7208150}, timestamp = {Fri, 24 Mar 2023 00:03:43 +0100}, biburl = {https://dblp.org/rec/conf/vdat/ReddyNSV15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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