BibTeX record conf/vlsid/MadathilRCMGBU00

• > Home > conf/vlsid/MadathilRCMGBU00

@inproceedings{DBLP:conf/vlsid/MadathilRCMGBU00,
  author       = {Karthikeyan Madathil and
                  Jagdish C. Rao and
                  Subash Chandar G. and
                  Amitabh Menon and
                  Avinash K. Gautam and
                  Amit M. Brahme and
                  H. Udayakumar},
  title        = {A Framework for Cost vs. Performance Tradeoffs in the Design of Digital
                  Signal Processor Cores},
  booktitle    = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
                  4-7 January 2000, Calcutta, India},
  pages        = {468},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ICVD.2000.812651},
  doi          = {10.1109/ICVD.2000.812651},
  timestamp    = {Fri, 24 Mar 2023 00:04:01 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/MadathilRCMGBU00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}