BibTeX record journals/tcas/ChangSHR18

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@article{DBLP:journals/tcas/ChangSHR18,
  author       = {Dong{-}Jin Chang and
                  Min{-}Jae Seo and
                  Hyeok{-}Ki Hong and
                  Seung{-}Tak Ryu},
  title        = {A 65 nm 0.08-to-680 MHz Low-Power Synthesizable {MDLL} With Nested-Delay
                  Cell and Background Static Phase Offset Calibration},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {65-II},
  number       = {3},
  pages        = {281--285},
  year         = {2018},
  url          = {https://doi.org/10.1109/TCSII.2017.2689029},
  doi          = {10.1109/TCSII.2017.2689029},
  timestamp    = {Wed, 27 May 2020 17:10:42 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/ChangSHR18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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