BibTeX record journals/tvlsi/ChenLKSLXR10

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@article{DBLP:journals/tvlsi/ChenLKSLXR10,
  author       = {Yiran Chen and
                  Hai Li and
                  Cheng{-}Kok Koh and
                  Guangyu Sun and
                  Jing Li and
                  Yuan Xie and
                  Kaushik Roy},
  title        = {Variable-Latency Adder (VL-Adder) Designs for Low Power and {NBTI}
                  Tolerance},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {18},
  number       = {11},
  pages        = {1621--1624},
  year         = {2010},
  url          = {https://doi.org/10.1109/TVLSI.2009.2026280},
  doi          = {10.1109/TVLSI.2009.2026280},
  timestamp    = {Mon, 04 Jul 2022 14:19:32 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/ChenLKSLXR10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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