BibTeX record journals/vlsisp/DrerupS94

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@article{DBLP:journals/vlsisp/DrerupS94,
  author       = {Ben C. Drerup and
                  Earl E. Swartzlander Jr.},
  title        = {Fast multiplier bit-product matrix reduction using bit-ordering and
                  parity generation},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {7},
  number       = {3},
  pages        = {249--257},
  year         = {1994},
  url          = {https://doi.org/10.1007/BF02409401},
  doi          = {10.1007/BF02409401},
  timestamp    = {Wed, 20 May 2020 21:26:20 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/DrerupS94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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