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@inproceedings{DBLP:conf/micro/BahrebarS18,
  author       = {Poona Bahrebar and
                  Dirk Stroobandt},
  title        = {3D {MAX:} {A} Maximally Adaptive Routing Method for VC-less 3D Mesh-based
                  Networks-on-Chip},
  booktitle    = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/NOCARC.2018.8541255},
  doi          = {10.1109/NOCARC.2018.8541255},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/BahrebarS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/ChenW18,
  author       = {Kun{-}Chih Jimmy Chen and
                  Ting{-}Yi Wang},
  title        = {NN-Noxim: High-Level Cycle-Accurate NoC-based Neural Networks Simulator},
  booktitle    = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  pages        = {1--5},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/NOCARC.2018.8541173},
  doi          = {10.1109/NOCARC.2018.8541173},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/ChenW18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/DeniziakT18,
  author       = {Stanislaw Deniziak and
                  Robert Tomaszewski},
  title        = {Codesign of energy and resource efficient contention-free Network-on
                  Chip for real-time embedded systems},
  booktitle    = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/NOCARC.2018.8541199},
  doi          = {10.1109/NOCARC.2018.8541199},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/DeniziakT18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/Huang18,
  author       = {Shih{-}Hsu Huang},
  title        = {Keynote Talk: 3D Core-based SoC Testing for Low Power and {TSV} Count
                  Minimization},
  booktitle    = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/NOCARC.2018.8541169},
  doi          = {10.1109/NOCARC.2018.8541169},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/Huang18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/HuangCH18,
  author       = {Chun{-}Hsian Huang and
                  Ching{-}Yen Chen and
                  Hung{-}Yu Huang},
  title        = {Hierarchical and Dependency-Aware Task Mapping for NoC-based Systems},
  booktitle    = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/NOCARC.2018.8541206},
  doi          = {10.1109/NOCARC.2018.8541206},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/HuangCH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/KhamisESAE18,
  author       = {Mostafa Khamis and
                  Sameh El{-}Ashry and
                  Ahmed Shalaby and
                  Mohamed Abdelsalam and
                  M. Watheq El{-}Kharashi},
  title        = {A Configurable {RISC-V} for NoC-Based MPSoCs: {A} Framework for Hardware
                  Emulation},
  booktitle    = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/NOCARC.2018.8541158},
  doi          = {10.1109/NOCARC.2018.8541158},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/KhamisESAE18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/Moshovos18,
  author       = {Andreas Moshovos},
  title        = {Value-Based Deep Learning Hardware Acceleration},
  booktitle    = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/NOCARC.2018.8541207},
  doi          = {10.1109/NOCARC.2018.8541207},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/Moshovos18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/NamaziASMD18,
  author       = {Alireza Namazi and
                  Meisam Abdollahi and
                  Saeed Safari and
                  Siamak Mohammadi and
                  Masoud Daneshtalab},
  title        = {{LRTM:} Life-time and Reliability-aware Task Mapping Approach for
                  Heterogeneous Multi-core Systems},
  booktitle    = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/NOCARC.2018.8541223},
  doi          = {10.1109/NOCARC.2018.8541223},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/NamaziASMD18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/PerezVB18,
  author       = {Ivan Perez and
                  Enrique Vallejo and
                  Ram{\'{o}}n Beivide},
  title        = {Efficient Router Bypass via Hybrid Flow Control},
  booktitle    = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/NOCARC.2018.8541147},
  doi          = {10.1109/NOCARC.2018.8541147},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/PerezVB18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/SaeedSKLSPALPGP18,
  author       = {Taqwa Saeed and
                  Constantinos Skitsas and
                  Dimitrios Kouzapas and
                  Marios Lestas and
                  Vassos Soteriou and
                  Anna Philippou and
                  Sergi Abadal and
                  Christos Liaskos and
                  Loukas Petrou and
                  Julius Georgiou and
                  Andreas Pitsillides},
  title        = {Fault Adaptive Routing in Metasurface Controller Networks},
  booktitle    = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/NOCARC.2018.8541148},
  doi          = {10.1109/NOCARC.2018.8541148},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/SaeedSKLSPALPGP18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/StroobantATACP18,
  author       = {Pieter Stroobant and
                  Sergi Abadal and
                  Wouter Tavernier and
                  Eduard Alarc{\'{o}}n and
                  Didier Colle and
                  Mario Pickavet},
  title        = {A General, Fault tolerant, Adaptive, Deadlock-free Routing Protocol
                  for Network-on-chip},
  booktitle    = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://doi.org/10.1109/NOCARC.2018.8541212},
  doi          = {10.1109/NOCARC.2018.8541212},
  timestamp    = {Tue, 31 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/StroobantATACP18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/micro/2018nocarc,
  title        = {11th International Workshop on Network on Chip Architectures, NoCArc@MICRO
                  2018, Fukuoka, Japan, October 20, 2018},
  publisher    = {{IEEE} Computer Society},
  year         = {2018},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/8515126/proceeding},
  isbn         = {978-1-5386-8552-5},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/2018nocarc.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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