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@inproceedings{DBLP:conf/reconfig/AvakianO05,
  author       = {Annie Avakian and
                  Iyad Ouaiss},
  title        = {Optimizing register binding in FPGAs using simulated annealing},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.27},
  doi          = {10.1109/RECONFIG.2005.27},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/AvakianO05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/Avila-OrtegaSMD05,
  author       = {Alfonso {\'{A}}vila and
                  Rolando Santoyo{-}Rinc{\'{o}}n and
                  Sergio Omar Martinez{-}Chapa and
                  Graciano Dieck{-}Assad},
  title        = {Hardware/software implementation of a discrete cosine transform algorithm
                  using SystemC},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.22},
  doi          = {10.1109/RECONFIG.2005.22},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/Avila-OrtegaSMD05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/BragaLAJ05,
  author       = {Andr{\'{e}} L. S. Braga and
                  Carlos H. Llanos and
                  Mauricio Ayala{-}Rinc{\'{o}}n and
                  Ricardo P. Jacobi},
  title        = {VANNGen: a flexible {CAD} tool for hardware implementation of artificial
                  neural networks},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.35},
  doi          = {10.1109/RECONFIG.2005.35},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/BragaLAJ05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/CarrilloPE05,
  author       = {Snaider L. Carrillo and
                  Agenor Z. Polo and
                  Mario P. Esmeral},
  title        = {Design and implementation of an embedded microprocessor compatible
                  with {IL} language in accordance to the norm {IEC} 61131-3},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.14},
  doi          = {10.1109/RECONFIG.2005.14},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/CarrilloPE05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/CastilloHLM05,
  author       = {Javier Castillo and
                  Pablo Huerta and
                  V{\'{\i}}ctor L{\'{o}}pez and
                  Jos{\'{e}} Ignacio Mart{\'{\i}}nez},
  title        = {A secure self-reconfiguring architecture based on open-source hardware},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.7},
  doi          = {10.1109/RECONFIG.2005.7},
  timestamp    = {Wed, 05 Apr 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/reconfig/CastilloHLM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/GarciaC05,
  author       = {Joaqu{\'{\i}}n Garc{\'{\i}}a and
                  Ren{\'{e}} Cumplido{-}Parra},
  title        = {On the design of an FPGA-based {OFDM} modulator for {IEEE} 802.16-2004},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.25},
  doi          = {10.1109/RECONFIG.2005.25},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/GarciaC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/LaakkonenSRP05,
  author       = {Ossi Laakkonen and
                  Hannu Sar{\'{e}}n and
                  Kimmo Rauma and
                  Olli Pyrh{\"{o}}nen},
  title        = {{FPGA} implementation of {DSVPWM} modulator},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.19},
  doi          = {10.1109/RECONFIG.2005.19},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/LaakkonenSRP05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/LangeM05,
  author       = {Sebastian Lange and
                  Martin Middendorf},
  title        = {On the design of two-level reconfigurable architectures},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.26},
  doi          = {10.1109/RECONFIG.2005.26},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/LangeM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/MarcusN05,
  author       = {Guillermo Marcus and
                  Juan Arturo Nolazco{-}Flores},
  title        = {An FPGA-based coprocessor for the {SPHINX} speech recognition system:
                  early experiences},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.10},
  doi          = {10.1109/RECONFIG.2005.10},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/MarcusN05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/MarrakchiMM05,
  author       = {Zied Marrakchi and
                  Hayder Mrabet and
                  Habib Mehrez},
  title        = {Hierarchical {FPGA} clustering based on multilevel partitioning approach
                  to improve routability and reduce power dissipation},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.23},
  doi          = {10.1109/RECONFIG.2005.23},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/MarrakchiMM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/MartinezP05,
  author       = {Miguel Angel S{\'{a}}nchez Mart{\'{\i}}nez and
                  Adriano De Luca Pennacchia},
  title        = {An image comparison circuit design},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.11},
  doi          = {10.1109/RECONFIG.2005.11},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/MartinezP05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/MartinezPMR05,
  author       = {Mario Alberto Garcia Martinez and
                  Rub{\'{e}}n Posada{-}G{\'{o}}mez and
                  Guillermo Morales{-}Luna and
                  Francisco Rodr{\'{\i}}guez{-}Henr{\'{\i}}quez},
  title        = {{FPGA} implementation of an efficient multiplier over finite fields
                  GF(2\({}^{\mbox{m}}\))},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.18},
  doi          = {10.1109/RECONFIG.2005.18},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/MartinezPMR05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/MilliordSD05,
  author       = {Corey J. Milliord and
                  Carthik A. Sharma and
                  Ronald F. DeMara},
  title        = {Dynamic voting schemes to enhance evolutionary repair in reconfigurable
                  logic devices},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.16},
  doi          = {10.1109/RECONFIG.2005.16},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/MilliordSD05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/MorganRO05,
  author       = {Fearghal Morgan and
                  Patrick Rocke and
                  Martin O'Halloran},
  title        = {Applied {VHDL} training methodology, {EDA} framework and hardware
                  implementation platform},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.12},
  doi          = {10.1109/RECONFIG.2005.12},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/MorganRO05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/Nuno-MagandaA05,
  author       = {Marco Aurelio Nu{\~{n}}o{-}Maganda and
                  Miguel O. Arias{-}Estrada},
  title        = {Real-time FPGA-based architecture for bicubic interpolation: an application
                  for digital image scaling},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.34},
  doi          = {10.1109/RECONFIG.2005.34},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/reconfig/Nuno-MagandaA05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/Ordaz-MorenoRV05,
  author       = {Alejandro Ordaz{-}Moreno and
                  Ren{\'{e}} de Jes{\'{u}}s Romero{-}Troncoso and
                  Jose Alberto Vite{-}Frias},
  title        = {Hardware signal processing unit for one-dimensional variable-length
                  discrete wavelet transform},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.21},
  doi          = {10.1109/RECONFIG.2005.21},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/Ordaz-MorenoRV05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/Ortega-CisnerosRMB05,
  author       = {Susana Ortega{-}Cisneros and
                  Juan Jos{\'{e}} Raygoza{-}Panduro and
                  Juan Suard{\'{\i}}az Muro and
                  Eduardo I. Boemo},
  title        = {Rapid prototyping of a self-timed {ALU} with FPGAs},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.33},
  doi          = {10.1109/RECONFIG.2005.33},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/reconfig/Ortega-CisnerosRMB05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/PandyaAM05,
  author       = {Vijay Pandya and
                  Shawki Areibi and
                  Medhat Moussa},
  title        = {A Handel-C implementation of the back-propagation algorithm on field
                  programmable gate arrays},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.5},
  doi          = {10.1109/RECONFIG.2005.5},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/PandyaAM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/PellL05,
  author       = {Oliver Pell and
                  Wayne Luk},
  title        = {Quartz: a framework for correct and efficient reconfigurable design},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.32},
  doi          = {10.1109/RECONFIG.2005.32},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/PellL05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/RaumaLHPP05,
  author       = {Kimmo Rauma and
                  Julius Luukko and
                  Torsti H{\"{a}}rk{\"{o}}nen and
                  Ilkka Pajari and
                  Olli Pyrh{\"{o}}nen},
  title        = {A novel {FPGA} implementation of a welding control using a new bus
                  architecture},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.6},
  doi          = {10.1109/RECONFIG.2005.6},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/RaumaLHPP05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/Raygoza-PanduroOB05,
  author       = {Juan Jos{\'{e}} Raygoza{-}Panduro and
                  Susana Ortega{-}Cisneros and
                  Eduardo I. Boemo},
  title        = {{FPGA} implementation of a synchronous and self-timed neuroprocessor},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.17},
  doi          = {10.1109/RECONFIG.2005.17},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/Raygoza-PanduroOB05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/RockeMM05,
  author       = {Patrick Rocke and
                  John Maher and
                  Fearghal Morgan},
  title        = {Platform for intrinsic evolution of analogue neural networks},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.29},
  doi          = {10.1109/RECONFIG.2005.29},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/RockeMM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/RodriguezR05,
  author       = {Sabel Mercurio Hern{\'{a}}ndez Rodr{\'{\i}}guez and
                  Francisco Rodr{\'{\i}}guez{-}Henr{\'{\i}}quez},
  title        = {An {FPGA} arithmetic logic unit for computing scalar multiplication
                  using the half-and-add method},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.8},
  doi          = {10.1109/RECONFIG.2005.8},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/RodriguezR05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/SaldanaA05,
  author       = {Griselda Salda{\~{n}}a and
                  Miguel Arias{-}Estrada},
  title        = {FPGA-based customizable systolic architecture for image processing
                  applications},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.20},
  doi          = {10.1109/RECONFIG.2005.20},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/SaldanaA05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/ThomasL05,
  author       = {David B. Thomas and
                  Wayne Luk},
  title        = {High quality uniform random number generation for massively parallel
                  simulations in {FPGA}},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.24},
  doi          = {10.1109/RECONFIG.2005.24},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/ThomasL05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/TrinidadCU05,
  author       = {Jos{\'{e}} Francisco Mart{\'{\i}}nez Trinidad and
                  Ren{\'{e}} Cumplido{-}Parra and
                  Claudia Feregrino Uribe},
  title        = {An FPGA-based parallel sorting architecture for the Burrows Wheeler
                  transform},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.9},
  doi          = {10.1109/RECONFIG.2005.9},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/TrinidadCU05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/Vite-FriasRO05,
  author       = {Jose Alberto Vite{-}Frias and
                  Ren{\'{e}} de Jes{\'{u}}s Romero{-}Troncoso and
                  Alejandro Ordaz{-}Moreno},
  title        = {{VHDL} core for 1024-point radix-4 {FFT} computation},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.36},
  doi          = {10.1109/RECONFIG.2005.36},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/Vite-FriasRO05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/reconfig/ZabelKZPS05,
  author       = {Martin Zabel and
                  Steffen K{\"{o}}hler and
                  Martin Zimmerling and
                  Thomas B. Preu{\ss}er and
                  Rainer G. Spallek},
  title        = {Design space exploration of coarse-grain reconfigurable DSPs},
  booktitle    = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RECONFIG.2005.15},
  doi          = {10.1109/RECONFIG.2005.15},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/reconfig/ZabelKZPS05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/reconfig/2005,
  title        = {2005 International Conference on Reconfigurable Computing and FPGAs,
                  ReConFig 2005, Puebla City, Mexico, September 28-30, 2005},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/10611/proceeding},
  isbn         = {0-7695-2456-7},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/reconfig/2005.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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