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@inproceedings{DBLP:conf/vlsid/Agrawal00,
author = {Vishwani D. Agrawal},
title = {Choice of Tests for Logic Verification and Equivalence Checking},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {306--311},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812626},
doi = {10.1109/ICVD.2000.812626},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Agrawal00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhattacharyaDG00,
author = {Bhargab B. Bhattacharya and
Alexej Dmitriev and
Michael G{\"{o}}ssel},
title = {Zero-Aliasing Space Compression using a Single Periodic Output and
its Application to Testing of Embedded Cores},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {382--391},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812637},
doi = {10.1109/ICVD.2000.812637},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhattacharyaDG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhattacharyaM00,
author = {Mayukh Bhattacharya and
Pinaki Mazumder},
title = {Convergence Issues in Resonant Tunneling Diode Circuit Simulation},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {499},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812657},
doi = {10.1109/ICVD.2000.812657},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhattacharyaM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhuniaMSSB00,
author = {Swarup Bhunia and
Subhashis Majumder and
Ayan Sircar and
Susmita Sur{-}Kolay and
Bhargab B. Bhattacharya},
title = {Topological Routing Amidst Polygonal Obstacles},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {274--279},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812621},
doi = {10.1109/ICVD.2000.812621},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhuniaMSSB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BommuCD00,
author = {Surendra Bommu and
Srimat T. Chakradhar and
Kiran B. Doreswamy},
title = {Resource-Constrained Compaction of Sequential Circuit Test Sets},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {398--405},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812640},
doi = {10.1109/ICVD.2000.812640},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BommuCD00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BoppanaGMJF00,
author = {Vamsi Boppana and
Indradeep Ghosh and
Rajarshi Mukherjee and
Jawahar Jain and
Masahiro Fujita},
title = {Hierarchical Error Diagnosis Targeting {RTL} Circuits},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {436--441},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812646},
doi = {10.1109/ICVD.2000.812646},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BoppanaGMJF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Bose00,
author = {Ajoy K. Bose},
title = {EDA-The Next Generation},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {19},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2000.10014},
doi = {10.1109/VLSID.2000.10014},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Bose00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BoseA00,
author = {Pradip Bose and
Jacob A. Abraham},
title = {Performance and Functional Verification of Microprocessors},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {58--63},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812585},
doi = {10.1109/ICVD.2000.812585},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BoseA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BreuerG00,
author = {Melvin A. Breuer and
Sandeep K. Gupta},
title = {New Validation and Test Problems for High Performance Deep Submicron
{VLSI} Circuits},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {8},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812575},
doi = {10.1109/ICVD.2000.812575},
timestamp = {Thu, 21 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/BreuerG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/CamposanoSC00,
author = {Raul Camposano and
Warren Savage and
John Chilton},
title = {{IP} Reuse in System on a Chip Design},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {20},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2000.10016},
doi = {10.1109/VLSID.2000.10016},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/CamposanoSC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChandraM00,
author = {Subhash Chandra and
Rajat Moona},
title = {Retargetable Functional Simulator Using High Level Processor Models},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {424--429},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812644},
doi = {10.1109/ICVD.2000.812644},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChandraM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChaudhryPEB00,
author = {Rajat Chaudhry and
Rajendran Panda and
Tim Edwards and
David T. Blaauw},
title = {Design and Analysis of Power Distribution Networks with Accurate {RLC}
Models},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {151--155},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812601},
doi = {10.1109/ICVD.2000.812601},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChaudhryPEB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChaudhuriCPS00,
author = {Parimal Pal Chaudhuri and
Dipanwita Roy Chowdhury and
Kolin Paul and
Biplab K. Sikdar},
title = {Theory and Applications of Cellular Automata for {VLSI} Design and
Testing},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {4},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812571},
doi = {10.1109/ICVD.2000.812571},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChaudhuriCPS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChengW00,
author = {Fu{-}Chiung Cheng and
Chuin{-}Ren Wang},
title = {Specification and Design of a Quasi-Delay-Insensitive Java Card},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {356--361},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812632},
doi = {10.1109/ICVD.2000.812632},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChengW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/CherubalC00,
author = {Sasikumar Cherubal and
Abhijit Chatterjee},
title = {An Efficient Hierarchical Fault Isolation Technique for Mixed-Signal
Boards},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {550--555},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812665},
doi = {10.1109/ICVD.2000.812665},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/CherubalC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChoiCNSS00,
author = {Jinseong Choi and
Sungjun Chun and
Nanju Na and
Madhavan Swaminathan and
Larry D. Smith},
title = {A Methodology for the Placement and Optimization of Decoupling Capacitors
for Gigahertz Systems},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {156--161},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812602},
doi = {10.1109/ICVD.2000.812602},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChoiCNSS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Das00,
author = {Abhijit Das},
title = {On the Transistor Sizing Problem},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {258--261},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812618},
doi = {10.1109/ICVD.2000.812618},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Das00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Das00a,
author = {Santanu Das},
title = {Trends in Communication Technology and its Impact on Semiconductor},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {362},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812633},
doi = {10.1109/ICVD.2000.812633},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Das00a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DasguptaCS00,
author = {Prabir Dasgupta and
Santanu Chattopadhyay and
Indranil Sengupta},
title = {An {ASIC} for Cellular Automata Based Message Authentication},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {538},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812663},
doi = {10.1109/ICVD.2000.812663},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DasguptaCS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DasguptaCS00a,
author = {Prabir Dasgupta and
Santanu Chattopadhyay and
Indranil Sengupta},
title = {Cellular Automata Based Deterministic Test Sequence Generator for
Sequential Circuits},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {544--549},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812664},
doi = {10.1109/ICVD.2000.812664},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DasguptaCS00a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DashPVR00,
author = {Ranjit K. Dash and
T. Pramod and
Vinita Vasudevan and
M. Ramakrishna},
title = {A Transistor Level Placement Tool for Custom Cell Generation},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {254--257},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812617},
doi = {10.1109/ICVD.2000.812617},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DashPVR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DeyBKA00,
author = {Sabyasachi Dey and
Bhargab B. Bhattacharya and
Malay Kumar Kundu and
Tinku Acharya},
title = {A Fast Algorithm for Computing the Euler Number of an Image and its
{VLSI} Implementation},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {330--335},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812628},
doi = {10.1109/ICVD.2000.812628},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DeyBKA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DickJ00,
author = {Robert P. Dick and
Niraj K. Jha},
title = {{COWLS:} Hardware-Software Co-Synthesis of Distributed Wireless Low-Power
Embedded Client-Server Systems},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {114},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812594},
doi = {10.1109/ICVD.2000.812594},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DickJ00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Doganis00,
author = {Akis Doganis},
title = {Interconnect Statistical Modeling: Structures and Measurement Methodologies},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {150},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812600},
doi = {10.1109/ICVD.2000.812600},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Doganis00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DuttaSAM00,
author = {Santanu Dutta and
Deepak Singh and
Essam Abu{-}Ghoush and
Vijay Mehra},
title = {Architecture and Implementation of a High-Definition Video Co-Processor
for Digital Television Applications},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {350--359},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812631},
doi = {10.1109/ICVD.2000.812631},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DuttaSAM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/EjniouiR00,
author = {Abdel Ejnioui and
N. Ranganathan},
title = {Design Partitioning on Single-Chip Emulation Systems},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {234--239},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812614},
doi = {10.1109/ICVD.2000.812614},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/EjniouiR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/EjniouiR00a,
author = {Abdel Ejnioui and
N. Ranganathan},
title = {Routing on Switch Matrix Multi-FPGA Systems},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {248--253},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812616},
doi = {10.1109/ICVD.2000.812616},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/EjniouiR00a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/FalkowskiK00,
author = {Bogdan J. Falkowski and
Sudha Kannurao},
title = {Spectral Theory of Disjunctive Decomposition for Balanced Boolean
Functions},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {506--511},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812658},
doi = {10.1109/ICVD.2000.812658},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/FalkowskiK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Fujiwara00,
author = {Hideo Fujiwara},
title = {A New Definition and a New Class of Sequential Circuits with Combinational
Test Generation Complexity},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {288--293},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812623},
doi = {10.1109/ICVD.2000.812623},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Fujiwara00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GhoshV00,
author = {Abhijit Ghosh and
Ranga Vemuri},
title = {Formal Verification of Synthesized Mixed Signal Designs Using *BMDs},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {84},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812589},
doi = {10.1109/ICVD.2000.812589},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GhoshV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GoldbergS00,
author = {Eugene Goldberg and
Alexander Saldanha},
title = {Timing Analysis with Implicitly Specified False Paths},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {518--522},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812660},
doi = {10.1109/ICVD.2000.812660},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GoldbergS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GovindarajanSLV00,
author = {Sriram Govindarajan and
Vinoo Srinivasan and
Preetham Lakshmikanthan and
Ranga Vemuri},
title = {A Technique for Dynamic High-Level Exploration During Behavioral-Partitioning
for Multi-Device Architectures},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {212--219},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812611},
doi = {10.1109/ICVD.2000.812611},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GovindarajanSLV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuptaA00,
author = {Aarti Gupta and
Pranav Ashar},
title = {Fast Error Diagnosis for Combinational Verification},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {442--448},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812647},
doi = {10.1109/ICVD.2000.812647},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/GuptaA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuptaSBM00,
author = {T. Vinod Kumar Gupta and
Purvesh Sharma and
M. Balakrishnan and
Sharad Malik},
title = {Processor Evaluation in an Embedded Systems Design Environment},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {98--103},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812591},
doi = {10.1109/ICVD.2000.812591},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/GuptaSBM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Harjani00,
author = {Ramesh Harjani},
title = {Analog Circuits for Wireless Communications},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {7},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812574},
doi = {10.1109/ICVD.2000.812574},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Harjani00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HenningC00,
author = {Russell E. Henning and
Chaitali Chakrabarti},
title = {Relating Data Characteristics to Transition Activity in High-Level
Static {CMOS} Design},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {38--43},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812582},
doi = {10.1109/ICVD.2000.812582},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HenningC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HigginsB00,
author = {Frank P. Higgins and
Sudipta Bhawmik},
title = {Core Based {ASIC} Design},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {10},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812576},
doi = {10.1109/ICVD.2000.812576},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HigginsB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HuertasVRH00,
author = {Gloria Huertas and
Diego V{\'{a}}zquez and
Adoraci{\'{o}}n Rueda and
Jos{\'{e}} L. Huertas},
title = {Built-In Self-Test in Mixed-Signal ICs: {A} {DTMF} Macrocell},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {568--571},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812668},
doi = {10.1109/ICVD.2000.812668},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HuertasVRH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/IchiharaKPR00,
author = {Hideyuki Ichihara and
Kozo Kinoshita and
Irith Pomeranz and
Sudhakar M. Reddy},
title = {Test Transformation to Improve Compaction by Statistical Encoding},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {294--299},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812624},
doi = {10.1109/ICVD.2000.812624},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/IchiharaKPR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainKK00,
author = {Sushil Chandra Jain and
Shashi Kumar and
Anshul Kumar},
title = {Evaluation of Various Routing Architectures for Multi-FPGA Boards},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {262--267},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812619},
doi = {10.1109/ICVD.2000.812619},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainKK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JoshiHWSC00,
author = {Rajiv V. Joshi and
Wei Hwang and
S. C. Wilson and
Ghavam V. Shahidi and
Ching{-}Te Chuang},
title = {A Low Power 900 MHz Register File {(8} Ports, 32 Words x 64 Bits)
in 1.8V, 0.25{\(\mathrm{\mu}\)}m {SOI} Technology},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {44--49},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812583},
doi = {10.1109/ICVD.2000.812583},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JoshiHWSC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KajitaniTAN00,
author = {Yoji Kajitani and
Atsushi Takahashi and
Kengo R. Azegami and
Shigetoshi Nakatake},
title = {Partition, Packing and Clock Distribution-A New Paradigm of Physical
Design},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {11},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812577},
doi = {10.1109/ICVD.2000.812577},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/KajitaniTAN00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KhareHd00,
author = {Jitendra Khare and
Hans T. Heineken and
Manuel d'Abreu},
title = {Cost Trade-Offs in System On Chip Designs},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {178--184},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812606},
doi = {10.1109/ICVD.2000.812606},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KhareHd00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KhouriJ00,
author = {Kamal S. Khouri and
Niraj K. Jha},
title = {Clock Selection for Performance Optimization of Control-Flow Intensive
Behaviors},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {523--529},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812661},
doi = {10.1109/ICVD.2000.812661},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KhouriJ00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LahiriDR00,
author = {Kanishka Lahiri and
Sujit Dey and
Anand Raghunathan},
title = {Performance Analysis of Systems with Multi-Channel Communication Architectures},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {530--537},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812662},
doi = {10.1109/ICVD.2000.812662},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LahiriDR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MadathilRCMGBU00,
author = {Karthikeyan Madathil and
Jagdish C. Rao and
Subash Chandar G. and
Amitabh Menon and
Avinash K. Gautam and
Amit M. Brahme and
H. Udayakumar},
title = {A Framework for Cost vs. Performance Tradeoffs in the Design of Digital
Signal Processor Cores},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {468},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812651},
doi = {10.1109/ICVD.2000.812651},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MadathilRCMGBU00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MaheshM00,
author = {M. N. Mahesh and
Mahesh Mehendale},
title = {Low Power Realization of Residue Number System Based {FIR} Filters},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {30--33},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812580},
doi = {10.1109/ICVD.2000.812580},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MaheshM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MaheshwariKV00,
author = {Sanjeev Kumar Maheshwari and
R. S. Krishanan and
G. S. Visweswaran},
title = {Jitter Estimation Methodology for Clock Chips},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {480--482},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812653},
doi = {10.1109/ICVD.2000.812653},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MaheshwariKV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MaheshwariV00,
author = {Sanjeev Kumar Maheshwari and
G. S. Visweswaran},
title = {A 3.3V Compatible 2.5V TTL-to-CMOS Bidirectional {I/O} Buffer},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {484--487},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812654},
doi = {10.1109/ICVD.2000.812654},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MaheshwariV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MajumdarP00,
author = {Arun K. Majumdar and
Nirav Patel},
title = {Design of an {ASIC} for Straight Line Detection in an Image},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {128--133},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812596},
doi = {10.1109/ICVD.2000.812596},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MajumdarP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MandalZ00,
author = {Chittaranjan A. Mandal and
R. M. Zimmer},
title = {A Genetic Algorithm for the Synthesis of Structured Data Paths},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {206--211},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812610},
doi = {10.1109/ICVD.2000.812610},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MandalZ00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Martin00,
author = {Grant Martin},
title = {Surviving the {SOC} Revolution: The Platform Approach to {SOC} Design},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {325},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2000.10015},
doi = {10.1109/VLSID.2000.10015},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Martin00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MaurerS00,
author = {Peter M. Maurer and
William J. Schilp},
title = {State-Machine Based Logic Simulation Using Three Logic Values},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {430--435},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812645},
doi = {10.1109/ICVD.2000.812645},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MaurerS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MayerS00,
author = {Frank Mayer and
Albrecht P. Stroele},
title = {A Versatile {BIST} Technique Combining Test Registers and Accumulators},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {412},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812642},
doi = {10.1109/ICVD.2000.812642},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MayerS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MehendaleS00,
author = {Mahesh Mehendale and
Sunil D. Sherlekar},
title = {Power Reduction Techniques for Portable {DSP} Applications},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {3},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812570},
doi = {10.1109/ICVD.2000.812570},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MehendaleS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MetzA00,
author = {Werner Metz and
Tinku Acharya},
title = {Challenges of Merging Digital Imaging and Wireless Communication},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {122--127},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812595},
doi = {10.1109/ICVD.2000.812595},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MetzA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MohammadSY00,
author = {Mohammad Gh. Mohammad and
Kewal K. Saluja and
Alex S. Yap},
title = {Testing Flash Memories},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {406--411},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812641},
doi = {10.1109/ICVD.2000.812641},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MohammadSY00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Murgai00,
author = {Rajeev Murgai},
title = {Delay-Constrained Area Recovery Via Layout-Driven Buffer Optimization},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {240},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812615},
doi = {10.1109/ICVD.2000.812615},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Murgai00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NagarajCYVD00,
author = {N. S. Nagaraj and
Frank Cano and
Duane Young and
Deepak Vohra and
Manoj Das},
title = {A Practical Approach to Crosstalk Noise Verification of Static {CMOS}
Designs},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {370--375},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812635},
doi = {10.1109/ICVD.2000.812635},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NagarajCYVD00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NagelR00,
author = {Laurence Nagel and
Jaijeet S. Roychowdhury},
title = {Computer-aided Design of {RF} Communication Systems: Techniques and
Challenges},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {6},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812573},
doi = {10.1109/ICVD.2000.812573},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NagelR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/OuyangHKSd00,
author = {Charles H. Ouyang and
Hans T. Heineken and
Jitendra Khare and
Saghir A. Shaikh and
Manuel d'Abreu},
title = {Maximizing Wafer Productivity Through Layout Optimization},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {192--197},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812608},
doi = {10.1109/ICVD.2000.812608},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/OuyangHKSd00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PainYOMHHCWH00,
author = {Bedabrata Pain and
Guang Yang and
Monico Ortiz and
Kenneth McCarty and
Julie Heynssens and
Bruce Hancock and
Thomas Cunningham and
Chris Wrigley and
Charlie Ho},
title = {A Single-Chip Programmable Digital {CMOS} Imager with Enhanced Low-Light
Detection Capability},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {342--349},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812630},
doi = {10.1109/ICVD.2000.812630},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PainYOMHHCWH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PantPWT00,
author = {Mondira Deb Pant and
Pankaj Pant and
D. Scott Wills and
Vivek Tiwari},
title = {Inductive Noise Reduction at the Architectural Level},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {162--167},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812603},
doi = {10.1109/ICVD.2000.812603},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PantPWT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Parekhji00,
author = {Rubin A. Parekhji},
title = {Test Techniques and Trade-offs for Embedded Cores and Systems},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {5},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812572},
doi = {10.1109/ICVD.2000.812572},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Parekhji00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PaulC00,
author = {Kolin Paul and
Dipanwita Roy Chowdhury},
title = {Application of GF(2p) {CA} in Burst Error Correcting Codes},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {562--567},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812667},
doi = {10.1109/ICVD.2000.812667},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PaulC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PaulCC00,
author = {Kolin Paul and
Parimal Pal Chaudhuri and
Dipanwita Roy Chowdhury},
title = {Scalable Pipelined Micro-Architecture for Wavelet Transform},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {144},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812599},
doi = {10.1109/ICVD.2000.812599},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PaulCC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PaulGSCC00,
author = {Kolin Paul and
Ranadeep Ghosal and
Biplab K. Sikdar and
Santashil Pal Chaudhuri and
Dipanwita Roy Chowdhury},
title = {GF(2p) {CA} Based Vector Quantization for Fast Encoding of Still Images},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {140--143},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812598},
doi = {10.1109/ICVD.2000.812598},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PaulGSCC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PeixotoJR00,
author = {Helvio P. Peixoto and
Margarida F. Jacome and
Ander Royo},
title = {A Tight Area Upper Bound for Slicing Floorplans},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {280},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812622},
doi = {10.1109/ICVD.2000.812622},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PeixotoJR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PlosilaS99a,
author = {Juha Plosila and
Tiberiu Seceleanu},
title = {Design of Synchronous Action Systems},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {578--583},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812670},
doi = {10.1109/ICVD.2000.812670},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PlosilaS99a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PomeranzR00,
author = {Irith Pomeranz and
Sudhakar M. Reddy},
title = {On Synchronizing Sequences and Unspecified Values in Output Responses
of Synchronous Sequential Circuits},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {392--397},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812639},
doi = {10.1109/ICVD.2000.812639},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PomeranzR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PuriC00,
author = {Ruchir Puri and
Ching{-}Te Chuang},
title = {{SOI} Digital Circuits: Design Issues},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {474--479},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812652},
doi = {10.1109/ICVD.2000.812652},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PuriC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RaghunathanRL00,
author = {Vijay Raghunathan and
Srivaths Ravi and
Ganesh Lakshminarayana},
title = {High-Level Synthesis with Variable-Latency Components},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {220--227},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812612},
doi = {10.1109/ICVD.2000.812612},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RaghunathanRL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RajanS00,
author = {Basant Rajan and
R. K. Shyamasundar},
title = {Modeling {VHDL} in Multiclock {ESTEREL}},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {76--83},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812588},
doi = {10.1109/ICVD.2000.812588},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RajanS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RajaramV00,
author = {Rajesh T. N. Rajaram and
Vinita Vasudevan},
title = {Optimization of the One-Dimensional Full Search Algorithm and Implementation
Using an {EPLD}},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {336--341},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812629},
doi = {10.1109/ICVD.2000.812629},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RajaramV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RajawatBK00,
author = {Arvind Rajawat and
M. Balakrishnan and
Anshul Kumar},
title = {nterface Synthesis: Issues and Approaches},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {92},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812590},
doi = {10.1109/ICVD.2000.812590},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RajawatBK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RavikumarCV00,
author = {C. P. Ravikumar and
Gaurav Chandra and
Ashutosh Verma},
title = {Simultaneous Module Selection and Scheduling for Power-Constrained
Testing of Core Based Systems},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {462--467},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812650},
doi = {10.1109/ICVD.2000.812650},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RavikumarCV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RayCN00,
author = {Baidya Nath Ray and
Parimal Pal Chaudhuri and
Prasanta Kumar Nandi},
title = {Design of {OTA} Based Field Programmable Analog Array},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {492--497},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812656},
doi = {10.1109/ICVD.2000.812656},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RayCN00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RohA00,
author = {Jeongjin Roh and
Jacob A. Abraham},
title = {A Mixed-Signal {BIST} Scheme with Time-Division Multiplexing {(TDM)}
Comparator and Counters},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {572},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812669},
doi = {10.1109/ICVD.2000.812669},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RohA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RoopSR00,
author = {Partha S. Roop and
Arcot Sowmya and
S. Ramesh},
title = {Automatic Component Matching Using Forced Simulation},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {64--69},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812586},
doi = {10.1109/ICVD.2000.812586},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RoopSR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RoyIN00,
author = {Subir K. Roy and
Hiroaki Iwashita and
Tsuneo Nakata},
title = {Dataflow Analysis for Resource Contention and Register Leakage Properties},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {418--423},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812643},
doi = {10.1109/ICVD.2000.812643},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RoyIN00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RoyM00,
author = {Kaushik Roy and
Khurram Muhammad},
title = {Low Power {VLSI} Signal Processing},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {12},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812578},
doi = {10.1109/ICVD.2000.812578},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RoyM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Saini00,
author = {Avtar Saini},
title = {Computing and Communication in the New Millennium},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {15},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2000.10012},
doi = {10.1109/VLSID.2000.10012},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Saini00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Sapatnekar00,
author = {Sachin S. Sapatnekar},
title = {Capturing the Effect of Crosstalk on Delay},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {364--369},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812634},
doi = {10.1109/ICVD.2000.812634},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Sapatnekar00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Sarkar00,
author = {Dipankar Sarkar},
title = {Status Condition Analysis during Data Path Verification of Sequential
Circuits},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {70--75},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812587},
doi = {10.1109/ICVD.2000.812587},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Sarkar00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Sarkar00a,
author = {Sandip Sarkar},
title = {Digital Imaging with Wireless Data Services},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {134--139},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812597},
doi = {10.1109/ICVD.2000.812597},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Sarkar00a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SavithriVB00,
author = {Savithri Sundareswaran and
R. Venkatesan and
S. Bhaskar},
title = {An Assertion Based Technique for Transistor Level Dynamic Power Estimation},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {34--37},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812581},
doi = {10.1109/ICVD.2000.812581},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SavithriVB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Scarisbric00,
author = {John Scarisbric},
title = {DSP-The Real Time Technology for the New Millennium},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {321},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2000.10013},
doi = {10.1109/VLSID.2000.10013},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Scarisbric00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SchafferMC00,
author = {Rainer Schaffer and
Renate Merker and
Francky Catthoor},
title = {Combining Background Memory Management and Regular Array Co-Partitioning,
Illustrated on a Full Motion Estimation Kernel},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {104--109},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812592},
doi = {10.1109/ICVD.2000.812592},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SchafferMC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SenapatiMC00,
author = {B. Senapati and
Chinmay K. Maiti and
Nirmal B. Chakrabarti},
title = {Silicon Heterostructure Devices for {RF} Wireless Communication},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {488--491},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812655},
doi = {10.1109/ICVD.2000.812655},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SenapatiMC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShahDS00,
author = {Jeegar Tilak Shah and
Madhav P. Desai and
Sugata Sanyal},
title = {Inductance Characterization of Small Interconnects Using Test-Signal
Method},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {376},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812636},
doi = {10.1109/ICVD.2000.812636},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShahDS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShaikhKH00,
author = {Saghir A. Shaikh and
Jitendra Khare and
Hans T. Heineken},
title = {Manufacturability and Testability Oriented Synthesis},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {185--191},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812607},
doi = {10.1109/ICVD.2000.812607},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShaikhKH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SharmaR00,
author = {Anil Sharma and
C. P. Ravikumar},
title = {Efficient Implementation of {ADPCM} Codec},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {456--461},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812649},
doi = {10.1109/ICVD.2000.812649},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SharmaR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShrivastavaKKKB00,
author = {Aviral Shrivastava and
Mohit Kumar and
Sanjiv Kapoor and
Shashi Kumar and
M. Balakrishnan},
title = {Optimal Hardware/Software Partitioning for Concurrent Specification
Using Dynamic Programming},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {110--113},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812593},
doi = {10.1109/ICVD.2000.812593},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShrivastavaKKKB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SikdarPBCBYM00,
author = {Biplab K. Sikdar and
Kolin Paul and
Gosta Pada Biswas and
Parimal Pal Chaudhuri and
Vamsi Boppana and
Cliff Yang and
Sobhan Mukherjee},
title = {Theory and Application of GF(2p) Cellular Automata as On-chip Test
Pattern Generator},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {556--561},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812666},
doi = {10.1109/ICVD.2000.812666},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SikdarPBCBYM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SinhaC00,
author = {Amit Sinha and
Anantha P. Chandrakasan},
title = {Energy Aware Software},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {50},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812584},
doi = {10.1109/ICVD.2000.812584},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SinhaC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SrikantamRS00,
author = {Vamsi K. Srikantam and
N. Ranganathan and
Srikanth Srinivasan},
title = {{CREAM:} Combined Register and Module Assignment with Floorplanning
for Low Power Datapath Synthesis},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {228--233},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812613},
doi = {10.1109/ICVD.2000.812613},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SrikantamRS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SumnersBA00,
author = {Robert W. Sumners and
Jayanta Bhadra and
Jacob A. Abraham},
title = {Automatic Validation Test Generation Using Extracted Control Models},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {312},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812627},
doi = {10.1109/ICVD.2000.812627},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SumnersBA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SureshCH00,
author = {B. Suresh and
Biswadeep Chaterjee and
R. Harinath},
title = {Synthesizable RAM-Alternative to Low Configuration Compiler Memory
for Die Area Reduction},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {512--517},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812659},
doi = {10.1109/ICVD.2000.812659},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SureshCH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TupuriAS00,
author = {Raghuram S. Tupuri and
Jacob A. Abraham and
Daniel G. Saab},
title = {Hierarchical Test Generation for Systems On a Chip},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {198},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812609},
doi = {10.1109/ICVD.2000.812609},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TupuriAS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WadaMSF00,
author = {Hiroki Wada and
Toshimitsu Masuzawa and
Kewal K. Saluja and
Hideo Fujiwara},
title = {Design for Strong Testability of {RTL} Data Paths to Provide Complete
Fault Efficiency},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {300--305},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812625},
doi = {10.1109/ICVD.2000.812625},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WadaMSF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WeiRD00,
author = {Liqiong Wei and
Kaushik Roy and
Vivek De},
title = {Low Voltage Low Power {CMOS} Design Techniques for Deep Submicron
ICs},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {24--29},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812579},
doi = {10.1109/ICVD.2000.812579},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WeiRD00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WuLF00,
author = {Yu{-}Liang Wu and
Wangning Long and
Hongbing Fan},
title = {A Fast Graph-Based Alternative Wiring Scheme for Boolean Networks},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {268--273},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812620},
doi = {10.1109/ICVD.2000.812620},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WuLF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/XiaA00,
author = {Yang Xia and
Pranav Ashar},
title = {Verification of a Combinational Loop Based Arbitration Scheme in a
System-On-Chip Integration Architecture},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {449},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812648},
doi = {10.1109/ICVD.2000.812648},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/XiaA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ZhaoR00,
author = {Shiyou Zhao and
Kaushik Roy},
title = {Estimation of Switching Noise on Power Supply Lines in Deep Sub-micron
{CMOS} Circuits},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {168},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812604},
doi = {10.1109/ICVD.2000.812604},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ZhaoR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/dAbreu00,
author = {Manuel A. d'Abreu},
title = {Manufacturing and Test Considerations in System-On-Chip Designs},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {176--177},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812605},
doi = {10.1109/ICVD.2000.812605},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/dAbreu00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsid/2000,
title = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://ieeexplore.ieee.org/xpl/conhome/6598/proceeding},
isbn = {0-7695-0487-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/2000.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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