Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDSearch dblp for Publications
export results for "toc:db/conf/vlsid/vlsid2018.bht:"
download as .bib file
@inproceedings{DBLP:conf/vlsid/AdimulamKVS18,
author = {Mahesh Kumar Adimulam and
Amit Kapoor and
Sreehari Veeramachaneni and
M. B. Srinivas},
title = {An Ultra Low Power, 10-Bit Two-Step Flash {ADC} for Signal Processing
Applications},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {19--24},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.31},
doi = {10.1109/VLSID.2018.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AdimulamKVS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AketiMS18,
author = {Sai Aparna Aketi and
Joycee Mekie and
Hemal Shah},
title = {Single-Error Hardened and Multiple-Error Tolerant Guarded Dual Modular
Redundancy Technique},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {250--255},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.71},
doi = {10.1109/VLSID.2018.71},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AketiMS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AlfailakawiAE18,
author = {Mohammad Gh. Alfailakawi and
Imtiaz Ahmad and
Sarah Elghandour},
title = {Energy-Efficient Dynamic Data Encoding for Multi-level {STT-MRAM}},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {428--433},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.102},
doi = {10.1109/VLSID.2018.102},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AlfailakawiAE18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AnsariNLK18,
author = {Md. Hasan Raza Ansari and
Nupur Navlakha and
Jyi{-}Tsong Lin and
Abhinav Kranti},
title = {Emerging FETs for Low Power and High Speed Embedded Dynamic Random
Access Memory},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {422--427},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.101},
doi = {10.1109/VLSID.2018.101},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AnsariNLK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BanerjeeMB18,
author = {Sabyasachee Banerjee and
Subhashis Majumder and
Bhargab B. Bhattacharya},
title = {Test-Time Reduction for Power-Aware 3D-SoC},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {103--108},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.45},
doi = {10.1109/VLSID.2018.45},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BanerjeeMB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BansalG18,
author = {Nitin Bansal and
Rahul Gupta},
title = {An {NMOS} Low Drop-out Voltage Regulator with -17dB Wide-Band Power
Supply Rejection for SerDes in 22FDX},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {341--346},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.87},
doi = {10.1109/VLSID.2018.87},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BansalG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BansalSSS18,
author = {Nitin Bansal and
Saurabh Kumar Singh and
Hemant Shukla and
Madhvi Sharma},
title = {A 0.29ps {FOM} Fast Transient any Cap Stable {LVR} in 28FDSOI},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {353--357},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.89},
doi = {10.1109/VLSID.2018.89},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BansalSSS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BasiriM18,
author = {M. Mohamed Asan Basiri and
Sk. Noor Mahammad},
title = {An Efficient {VLSI} Architecture for Convolution Based {DWT} Using
{MAC}},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {271--276},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.75},
doi = {10.1109/VLSID.2018.75},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BasiriM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhattacharyaBM18,
author = {Sarani Bhattacharya and
Shivam Bhasin and
Debdeep Mukhopadhyay},
title = {Online Detection and Reactive Countermeasure for Leakage from {BPU}
Using {TVLA}},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {155--160},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.54},
doi = {10.1109/VLSID.2018.54},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhattacharyaBM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Cenkeramaddi18,
author = {Linga Reddy Cenkeramaddi},
title = {Feedback Biasing Based Adjustable Gain Ultrasound Preamplifier for
CMUTs in 45nm {CMOS}},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {204--207},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.63},
doi = {10.1109/VLSID.2018.63},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Cenkeramaddi18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChakrabortyDC18,
author = {Sarit Chakraborty and
Chandan Das and
Susanta Chakraborty},
title = {Securing Module-Less Synthesis on Cyberphysical Digital Microfluidic
Biochips from Malicious Intrusions},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {467--468},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.116},
doi = {10.1109/VLSID.2018.116},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChakrabortyDC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChakrabortyDP18,
author = {Arpan Chakraborty and
Piyali Datta and
Rajat Kumar Pal},
title = {Design Optimization at the Fluid-Level Synthesis for Safe and Low-Cost
Droplet-Based Microfluidic Biochips},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {127--132},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.49},
doi = {10.1109/VLSID.2018.49},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChakrabortyDP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChakravartySM18,
author = {Richa Chakravarty and
Dipankar Saha and
Santanu Mahapatra},
title = {New Asymmetric Atomistic Model for the Analysis of Phase-Engineered
MoS2-Gold Top Contact},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {139--142},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.51},
doi = {10.1109/VLSID.2018.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChakravartySM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChangMCS18,
author = {Gregory Chang and
Shovan Maity and
Baibhab Chatterjee and
Shreyas Sen},
title = {Design Considerations of a Sub-50 Mu-W Receiver Front-end for Implantable
Devices in MedRadio Band},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {329--334},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.85},
doi = {10.1109/VLSID.2018.85},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChangMCS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChapagaiBN18,
author = {Kamal Chapagai and
Pydi Bahubalindruni and
Nishtha},
title = {2nd Order Sallen Key Switched Capacitor {LPF} with N-type Transistors},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {319--324},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.83},
doi = {10.1109/VLSID.2018.83},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChapagaiBN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChattopadhyayBN18,
author = {Biman Chattopadhyay and
Sharath N. Bhat and
Gopalkrishna Nayak and
Ravi Mehta},
title = {A 12.5Gbps Transmitter for Multi-standard {SERDES} in 40nm Low Leakage
{CMOS} Process},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {13--18},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.30},
doi = {10.1109/VLSID.2018.30},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChattopadhyayBN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChoudhuryS18,
author = {Avishek Choudhury and
Biplab K. Sikdar},
title = {Modeling {\&} Analysis of Redundancy Based Fault Tolerance for
Permanent Faults in Chip Multiprocessor Cache},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {115--120},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.47},
doi = {10.1109/VLSID.2018.47},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChoudhuryS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChowdhuryR18,
author = {Amrita Roy Chowdhury and
Parameswaran Ramanathan},
title = {{PPU:} Privacy-Aware Purchasing Unit for Residential Customers in
Smart Electric Grids},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {386--391},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.95},
doi = {10.1109/VLSID.2018.95},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChowdhuryR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/CostaDMD18,
author = {Antonio Anastasio Bruto da Costa and
Shriya Dharade and
Sudipa Mandal and
Pallab Dasgupta},
title = {AMS-Miner: Mining {AMS} Assertions Using Interval Arithmetic},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {404--409},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.98},
doi = {10.1109/VLSID.2018.98},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/CostaDMD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/CruzFAM18,
author = {Jonathan Cruz and
Farimah Farahmandi and
Alif Ahmed and
Prabhat Mishra},
title = {Hardware Trojan Detection Using {ATPG} and Model Checking},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {91--96},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.43},
doi = {10.1109/VLSID.2018.43},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/CruzFAM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DalmiaVPTP18,
author = {Preyesh Dalmia and
Vikas and
Abhinav Parashar and
Akshi Tomar and
Neeta Pandey},
title = {Novel High Speed Vedic Multiplier Proposal Incorporating Adder Based
on Quaternary Signed Digit Number System},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {289--294},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.78},
doi = {10.1109/VLSID.2018.78},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DalmiaVPTP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DasLSK18,
author = {Palash Das and
Shivam Lakhotia and
Prabodh Shetty and
Hemangee K. Kapoor},
title = {Towards Near Data Processing of Convolutional Neural Networks},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {380--385},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.94},
doi = {10.1109/VLSID.2018.94},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DasLSK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DeyPCE18,
author = {Vishal Dey and
Vikramkumar Pudi and
Anupam Chattopadhyay and
Yuval Elovici},
title = {Security Vulnerabilities of Unmanned Aerial Vehicles and Countermeasures:
An Experimental Study},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {398--403},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.97},
doi = {10.1109/VLSID.2018.97},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DeyPCE18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GhoshLGD18,
author = {Narendra Nath Ghosh and
Prakash Kumar Lenka and
SriHarsa Vardan G and
Ashudeb Dutta},
title = {A 0.6 mW 1.6 dB Noise Figure Inductorless Shunt Feedback Wideband
{LNA} With Gm Enhancement and Current Reuse in 65 nm {CMOS}},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {335--340},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.86},
doi = {10.1109/VLSID.2018.86},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GhoshLGD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GhoshRG18,
author = {Sourav Ghosh and
Hafizur Rahaman and
Chandan Giri},
title = {Optimized Concurrent Testing of Digital Microfluidic Biochips},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {453--454},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.109},
doi = {10.1109/VLSID.2018.109},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GhoshRG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GopinathARS18,
author = {Anjali Gopinath and
Ravi Kumar Adusumalli and
Rohit Ranganathan and
Arya S.},
title = {Pseudo-Continuous Output Switched-Capacitor Amplifier for Rail-to-Rail
Current Sensing Application},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {325--328},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.84},
doi = {10.1109/VLSID.2018.84},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GopinathARS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuhaSC18,
author = {Krishnendu Guha and
Sangeet Saha and
Amlan Chakrabarti},
title = {{SHIRT} (Self Healing Intelligent Real Time) Scheduling for Secure
Embedded Task Processing},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {463--464},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.114},
doi = {10.1109/VLSID.2018.114},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuhaSC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuinSACS18,
author = {Ujjwal Guin and
Adit D. Singh and
Mahabubul Alam and
Janice Canedo and
Anthony Skjellum},
title = {A Secure Low-Cost Edge Device Authentication Scheme for the Internet
of Things},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {85--90},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.42},
doi = {10.1109/VLSID.2018.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuinSACS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuptaDBKS18,
author = {Hari Shanker Gupta and
Pranoy Datta and
Maryam Shojaei Baghini and
A. S. Kiran Kumar and
Dinesh Kumar Sharma},
title = {Low Power Configurable Readout Integrated Circuit for Infrared Detector},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {198--203},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.62},
doi = {10.1109/VLSID.2018.62},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuptaDBKS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuptaK18,
author = {Manish Gupta and
Abhinav Kranti},
title = {Hysteresis Free sub-60 mV/dec Subthreshold Swing in Junctionless MOSFETs},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {133--138},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.50},
doi = {10.1109/VLSID.2018.50},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuptaK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainSM18,
author = {Nupur Jain and
Mansi Singh and
Biswajit Mishra},
title = {Image Compression Using 2D-Discrete Wavelet Transform on a Light Weight
Reconfigurable Hardware},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {61--66},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.38},
doi = {10.1109/VLSID.2018.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainSM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JamesKPS18,
author = {Diego James and
Abishek T. Kunnath and
A. Purushothaman and
Bibhudatta Sahoo},
title = {Mitigating Aperture Error in Pipelined ADCs Without a Front-end Sample-and-Hold
Amplfier},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {7--12},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.29},
doi = {10.1109/VLSID.2018.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JamesKPS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JinC18,
author = {Shi Jin and
Krishnendu Chakrabarty},
title = {Data-Driven Resiliency Solutions for Boards and Systems},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {244--249},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.70},
doi = {10.1109/VLSID.2018.70},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JinC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Jindal0BF18,
author = {Ankit Jindal and
Binod Kumar and
Kanad Basu and
Masahiro Fujita},
title = {{ELURA:} {A} Methodology for Post-Silicon Gate-Level Error Localization
Using Regression Analysis},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {410--415},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.99},
doi = {10.1109/VLSID.2018.99},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Jindal0BF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JohnsonLMKTHTMH18,
author = {Anju P. Johnson and
Junxiu Liu and
Alan G. Millard and
Shvan Karim and
Andy M. Tyrrell and
Jim Harkin and
Jon Timmis and
Liam McDaid and
David M. Halliday},
title = {Fault-Tolerant Learning in Spiking Astrocyte-Neural Networks on FPGAs},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {49--54},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.36},
doi = {10.1109/VLSID.2018.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JohnsonLMKTHTMH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Jose018,
author = {John Jose and
Abhijit Das},
title = {An Adaptive Deflection Router with Dual Injection and Ejection Units
for Mesh NoCs},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {374--379},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.93},
doi = {10.1109/VLSID.2018.93},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Jose018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KawoosaMJP18,
author = {Mudasir S. Kawoosa and
Rajesh K. Mittal and
Maheedhar Jalasuthram and
Rubin A. Parekhji},
title = {Towards Single Pin Scan for Extremely Low Pin Count Test},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {97--102},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.44},
doi = {10.1109/VLSID.2018.44},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KawoosaMJP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KeszoczeIWCD18,
author = {Oliver Kesz{\"{o}}cze and
Mohamed Ibrahim and
Robert Wille and
Krishnendu Chakrabarty and
Rolf Drechsler},
title = {Exact Synthesis of Biomolecular Protocols for Multiple Sample Pathways
on Digital Microfluidic Biochips},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {121--126},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.48},
doi = {10.1109/VLSID.2018.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KeszoczeIWCD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KhanA18,
author = {Mohd. Tasleem Khan and
Shaik Rafi Ahamed},
title = {Area and Power Efficient {VLSI} Architecture of Distributed Arithmetic
Based {LMS} Adaptive Filter},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {283--288},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.77},
doi = {10.1109/VLSID.2018.77},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KhanA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KhanKH18,
author = {Qadeer Ahmad Khan and
Seong Joong Kim and
Pavan Kumar Hanumolu},
title = {Time-Based {PWM} Controller for Fully Integrated High Speed Switching
{DC-DC} Converters - An Alternative to Conventional Analog and Digital
Controllers},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {226--231},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.67},
doi = {10.1109/VLSID.2018.67},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KhanKH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KjellbyJLCHB18,
author = {Rolf Arne Kjellby and
Thor Eirik Johnsrud and
Svein Erik L{\o}tveit and
Linga Reddy Cenkeramaddi and
Mohamed Hamid and
Baltasar Beferull{-}Lozano},
title = {Self-Powered IoT Device for Indoor Applications},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {455--456},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.110},
doi = {10.1109/VLSID.2018.110},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KjellbyJLCHB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KranthiMMS18,
author = {Nagothu Karmel Kranthi and
Abhishek Mishra and
Adil Meersha and
Mayank Shrivastava},
title = {On the {ESD} Reliability Issues in Carbon Electronics: Graphene and
Carbon Nano Tubes},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {469--470},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.117},
doi = {10.1109/VLSID.2018.117},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KranthiMMS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KulkarniPS18,
author = {Uma Mukund Kulkarni and
Chetan D. Parikh and
Subhajit Sen},
title = {A Systematic Approach to Determining the Weights of the Capacitors
in the {DAC} of a Non-binary Redundant {SAR} ADCs},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.28},
doi = {10.1109/VLSID.2018.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KulkarniPS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarP18,
author = {Vulisi Narendra Kumar and
Gayadhar Panda},
title = {{FPGA} Implementation of Power Management Algorithm for Wind Energy
Storage System with Kalman Filter {MPPT} Technique},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {449--450},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.107},
doi = {10.1109/VLSID.2018.107},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarSDP18,
author = {Vinay B. Y. Kumar and
Deval Shah and
Mandar Datar and
Sachin B. Patkar},
title = {Lightweight Forth Programmable NoCs},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {368--373},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.92},
doi = {10.1109/VLSID.2018.92},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarSDP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarSP18,
author = {Vinay Kumar and
Ravindra kumar Shrivatava and
Madhav Mansukh Padaliya},
title = {A Temperature Compensated Read Assist for Low Vmin and High Performance
High Density 6T {SRAM} in FinFET Technology},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {447--448},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.106},
doi = {10.1109/VLSID.2018.106},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarSP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarSS18,
author = {Ashwani Kumar and
Shubham Sahay and
Manan Suri},
title = {Switching-Time Dependent {PUF} Using {STT-MRAM}},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {434--438},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.103},
doi = {10.1109/VLSID.2018.103},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/KumarSS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarV18,
author = {Ashish Kumar and
G. S. Visweswaran},
title = {A 0.6V Retention {VMIN} Ultra-Low Leakage High Density 6T {SRAM} in
40nm {CMOS} Technology Using Adaptive Source Bias},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {261--265},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.73},
doi = {10.1109/VLSID.2018.73},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarV18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KunchamGKLL18,
author = {Sucheth S. Kuncham and
Manasa Gadiyar and
Sushmitha Din K. and
Kiran Kumar Lad and
Tonse Laxminidhi},
title = {A Novel Zero Blind Zone Phase Frequency Detector for Fast Acquisition
in Phase Locked Loops},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {167--170},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.56},
doi = {10.1109/VLSID.2018.56},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KunchamGKLL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LiuV18,
author = {Xiaobang Liu and
Ranga Vemuri},
title = {Combined Inference and Satisfiability Based Methods for Complete Signal
Restoration in Post-Silicon Validation},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {416--421},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.100},
doi = {10.1109/VLSID.2018.100},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LiuV18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MahapatraAAN18,
author = {Ipsita Biswas Mahapatra and
Utkarsh Agarwal and
Chandrashekhar Azad and
S. K. Nandy},
title = {Design Space Exploration of an Execution-Driven Functional Simulation
Methodology},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {295--300},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.79},
doi = {10.1109/VLSID.2018.79},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MahapatraAAN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MaheshwariKDNG18,
author = {Pragya Maheshwari and
Sadhu Pavan Kumar and
Mukesh Deharia and
Nandakumar Nambath and
Shalabh Gupta},
title = {A Quadrature-Phase Voltage Controlled Oscillator for Offset Phase
and Frequency Compensation},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {177--180},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.58},
doi = {10.1109/VLSID.2018.58},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MaheshwariKDNG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MaityRG18,
author = {Dilip Kumar Maity and
Surajit Kumar Roy and
Chandan Giri},
title = {Identification of Faulty TSVs in 3D {IC} During Pre-Bond Testing},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {109--114},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.46},
doi = {10.1109/VLSID.2018.46},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MaityRG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MandalHDM18,
author = {Sudipa Mandal and
Aritra Hazra and
Pallab Dasgupta and
Chunduri Rama Mohan},
title = {Formal Methods for Coverage Analysis of Power Management Logic with
Mixed-Signal Components},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {37--42},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.34},
doi = {10.1109/VLSID.2018.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MandalHDM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MekieMK18,
author = {Joycee Mekie and
Prashansa Mukim and
Kimaya Kale},
title = {Impact of Variations on Synchronizer Performance: An Experimental
Study},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {459--460},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.112},
doi = {10.1109/VLSID.2018.112},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MekieMK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MendesCODF18,
author = {Felipe Mendes and
Tiago S. Curtinhas and
Duarte Lopes de Oliveira and
Higor A. Delsoto and
Lester de Abreu Faria},
title = {A Novel Tool for Synthesis by Direct Mapping of Asynchronous Circuits
from Extended {STG} Specifications},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {451--452},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.108},
doi = {10.1109/VLSID.2018.108},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MendesCODF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MoulikSK18,
author = {Sanjay Moulik and
Arnab Sarkar and
Hemangee K. Kapoor},
title = {DPFair Scheduling with Slowdown and Suspension},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {43--48},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.35},
doi = {10.1109/VLSID.2018.35},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MoulikSK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MurtyS18,
author = {Mahesh S. Murty and
Rahul Shrestha},
title = {Hardware-Efficient and Wide-Band Frequency-Domain Energy Detector
for Cognitive-Radio Wireless Network},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {277--282},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.76},
doi = {10.1109/VLSID.2018.76},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MurtyS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PB18,
author = {Bhuvana B. P. and
V. S. Kanchana Bhaaskaran},
title = {Positive Feedback Symmetric Adiabatic Logic Against Differential Power
Attack},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {149--154},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.53},
doi = {10.1109/VLSID.2018.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PalchaudhuriD18,
author = {Ayan Palchaudhuri and
Anindya Sundar Dhar},
title = {High Speed {FPGA} Fabric Aware {CSD} Recoding with Run-Time Support
for Fault Localization},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {186--191},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.60},
doi = {10.1109/VLSID.2018.60},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PalchaudhuriD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Panda0KBS18,
author = {Preeti Ranjan Panda and
Namita Sharma and
Srikanth Kurra and
Khushboo Anil Bhartia and
Neeraj Kumar Singh},
title = {Exploration of Loop Unroll Factors in High Level Synthesis},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {465--466},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.115},
doi = {10.1109/VLSID.2018.115},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Panda0KBS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PandeyGK18,
author = {Jai Gopal Pandey and
Tarun Goel and
Abhijit Karmakar},
title = {A High-Performance and Area-Efficient {VLSI} Architecture for the
{PRESENT} Lightweight Cipher},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {392--397},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.96},
doi = {10.1109/VLSID.2018.96},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PandeyGK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ParaneTM18,
author = {Khyamling Parane and
Basavaraj Talawar and
Prabhu B. M. Prasad},
title = {YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine
Using FPGAs},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {67--72},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.39},
doi = {10.1109/VLSID.2018.39},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ParaneTM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Pasricha18,
author = {Sudeep Pasricha},
title = {Overcoming Energy and Reliability Challenges for IoT and Mobile Devices
with Data Analytics},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {238--243},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.69},
doi = {10.1109/VLSID.2018.69},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Pasricha18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PatelT18,
author = {Subhash J. Patel and
Rajesh Amratlal Thakker},
title = {Parasitic Aware Automatic Analog {CMOS} Circuit Design Environment
Using {ABC} Algorithm},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {445--446},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.105},
doi = {10.1109/VLSID.2018.105},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PatelT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PriyaAK18,
author = {Sharma Priya and
Sukarn Agarwal and
Hemangee K. Kapoor},
title = {Fault Tolerance in Network on Chip Using Bypass Path Establishing
Packets},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {457--458},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.111},
doi = {10.1109/VLSID.2018.111},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PriyaAK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Pyne18,
author = {Sumanta Pyne},
title = {Rescheduling of Power Gating Instructions for Reduction of In-rush
Current},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {25--30},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.32},
doi = {10.1109/VLSID.2018.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Pyne18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RSCMM18,
author = {R. R. Manikandan and
Vipul Kumar Singhal and
Rajat Chauhan and
Vinod Menezes and
Mahesh Mehendale},
title = {A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled Systems},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {171--176},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.57},
doi = {10.1109/VLSID.2018.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RSCMM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Rana18,
author = {Vikas Rana},
title = {{CMOS} Oscillator Having Stable Frequency with Process, Temperature
and Voltage Variation},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {181--185},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.59},
doi = {10.1109/VLSID.2018.59},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Rana18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RathorGS18,
author = {Vijaypal Singh Rathor and
Bharat Garg and
G. K. Sharma},
title = {An Energy-Efficient Trusted {FSM} Design Technique to Thwart Fault
Injection and Trojan Attacks},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {73--78},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.40},
doi = {10.1109/VLSID.2018.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RathorGS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SR18,
author = {Dharshak B. S. and
Rahul M. Rao},
title = {A High Performance Gated Voltage Level Translator with Integrated
Multiplexer},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {358--361},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.90},
doi = {10.1109/VLSID.2018.90},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SahooV018,
author = {Siva Satyendra Sahoo and
Bharadwaj Veeravalli and
Akash Kumar},
title = {CLRFrame: An Analysis Framework for Designing Cross-Layer Reliability
in Embedded Systems},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {307--312},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.81},
doi = {10.1109/VLSID.2018.81},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/SahooV018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Sankaranarayanan18,
author = {Sowmya Sankaranarayanan and
Kulkarni Chaitali Vinod and
Aswanth Sreekumar and
Tonse Laxminidhi and
Vipul Singhal and
Rajat Chauhan},
title = {Single Inductor Dual Output Buck Converter for Low Power Applications
and Its Stability Analysis},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {347--352},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.88},
doi = {10.1109/VLSID.2018.88},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Sankaranarayanan18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SasikanthB18,
author = {Mannem Naga Sasikanth and
Tarun Kanti Bhattacharyya},
title = {A High Efficiency Body Injected Differential Power Amplifier at 2.4GHz
for Low Power Applications},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {208--213},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.64},
doi = {10.1109/VLSID.2018.64},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SasikanthB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SaurabhM18,
author = {Sneh Saurabh and
Priyanka Mittal},
title = {A Practical Methodology to Compress Technology Libraries Using Recursive
Polynomial Representation},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {301--306},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.80},
doi = {10.1109/VLSID.2018.80},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SaurabhM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SelvamT18,
author = {Ravikumar Selvam and
Akhilesh Tyagi},
title = {Power Side Channel Resistance of {RNS} Secure Logic},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {143--148},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.52},
doi = {10.1109/VLSID.2018.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SelvamT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShuklaRW18,
author = {Ankur Shukla and
Rahul M. Rao and
James D. Warnock},
title = {Impact of Device Aging on Early Mode Failures in Pulsed Latches},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {256--260},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.72},
doi = {10.1109/VLSID.2018.72},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShuklaRW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SiddiquiSWSK18,
author = {M. Sultan M. Siddiqui and
Sumit Srivastav and
Dattatray Ramrao Wanjul and
Manankumar Suthar and
Sudhir Kumar},
title = {A 7-Nm Dual Port 8T {SRAM} with Duplicated Inter-Port Write Data to
Mitigate Write Disturbance},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {266--270},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.74},
doi = {10.1109/VLSID.2018.74},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SiddiquiSWSK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SinharayRR18,
author = {Arindam Sinharay and
Pranab Roy and
Hafizur Rahaman},
title = {Computing Fr{\'{e}}chet Distance Metric Based L-Shape Tile Decomposition
for E-Beam Lithography},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {313--318},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.82},
doi = {10.1109/VLSID.2018.82},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SinharayRR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SivanesanCB18,
author = {Mayuran Sivanesan and
Anupam Chattopadhyay and
Bajaj Ronak},
title = {Accelerating Hash Computations Through Efficient Instruction-Set Customisation},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {362--367},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.91},
doi = {10.1109/VLSID.2018.91},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SivanesanCB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SrivastavaB18,
author = {Abhishek Srivastava and
Maryam Shojaei Baghini},
title = {0.36 nJ/bit MedRadio Band {OOK} Transmitter for Wearable Healthcare
Applications},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {220--225},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.66},
doi = {10.1109/VLSID.2018.66},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SrivastavaB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SurkantiGF18,
author = {Punith R. Surkanti and
Annajirao Garimella and
Paul M. Furth},
title = {Flipped Voltage Follower Based Low Dropout {(LDO)} Voltage Regulators:
{A} Tutorial Overview},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {232--237},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.68},
doi = {10.1109/VLSID.2018.68},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SurkantiGF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ThesingK18,
author = {James Thesing and
Dhireesha Kudithipudi},
title = {Secure Neural Circuits to Mitigate Correlation Power Analysis on {SHA-3}
Hash Function},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {161--166},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.55},
doi = {10.1109/VLSID.2018.55},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ThesingK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/UmdekarNDK18,
author = {Alankar V. Umdekar and
Arijit Nath and
Shirshendu Das and
Hemangee K. Kapoor},
title = {Dynamic Thermal Management by Using Task Migration in Conjunction
with Frequency Scaling for Chip Multiprocessors},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {31--36},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.33},
doi = {10.1109/VLSID.2018.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/UmdekarNDK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/UnniPD18,
author = {Ravi Krishnan Unni and
Vijayanand P. and
Y. Dilip},
title = {{FPGA} Implementation of an Improved Watchdog Timer for Safety-Critical
Applications},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {55--60},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.37},
doi = {10.1109/VLSID.2018.37},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/UnniPD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VaikuntapuBS18,
author = {Ramakrishna Vaikuntapu and
Lava Bhargava and
Vineet Sahula},
title = {Novel Variability Aware Path Selection for Self-Referencing Based
Hardware Trojan Detection},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {79--84},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.41},
doi = {10.1109/VLSID.2018.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VaikuntapuBS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VatwaniDBC18,
author = {Tarun Vatwani and
Arko Dutt and
Debjyoti Bhattacharjee and
Anupam Chattopadhyay},
title = {Floating Point Multiplication Mapping on ReRAM Based In-memory Computing
Architecture},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {439--444},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.104},
doi = {10.1109/VLSID.2018.104},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VatwaniDBC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VeerendranathVK18,
author = {P. S. Veerendranath and
M. H. Vasantha and
Kumar Y. B. Nithin and
Edoardo Bonizzoni},
title = {A Novel Low Power {G} m-C Continuous-Time Analog Filter with Wide
Tuning Range},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {214--219},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.65},
doi = {10.1109/VLSID.2018.65},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VeerendranathVK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VikramPMP18,
author = {Sahu Sai Vikram and
Vibha Panty and
Mihir Mody and
Madhura Purnaprajna},
title = {TileNET: Scalable Architecture for High-Throughput Ternary Convolution
Neural Networks Using FPGAs},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {461--462},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.113},
doi = {10.1109/VLSID.2018.113},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VikramPMP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ZhengM18,
author = {Nan Zheng and
Pinaki Mazumder},
title = {A Low-Power Circuit for Adaptive Dynamic Programming},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {192--197},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.61},
doi = {10.1109/VLSID.2018.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ZhengM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsid/2018,
title = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://ieeexplore.ieee.org/xpl/conhome/8326586/proceeding},
isbn = {978-1-5386-3692-3},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/2018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
retrieved on 2024-05-12 09:40 CEST from data curated by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
