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ORCIDPACT 2003: New Orleans, LA, USA
- 12th International Conference on Parallel Architectures and Compilation Techniques (PACT 2003), 27 September - 1 October 2003, New Orleans, LA, USA. IEEE Computer Society 2003, ISBN 0-7695-2021-9
Multithreading
- Harold W. Cain, Mikko H. Lipasti, Ravi Nair:
Constraint Graph Analysis of Multithreaded Programs. 4-14 - Steven E. Raasch, Steven K. Reinhardt:
The Impact of Resource Partitioning on SMT Processors. 15-26 - Nathan Tuck, Dean M. Tullsen
:
Initial Observations of the Simultaneous Multithreading Pentium 4 Processor. 26-34
Instruction-Level Parallelism
- Dong-yuan Chen, Lixia Liu, Chen Fu, Shuxin Yang, Chengyong Wu, Roy Dz-Ching Ju:
Efficient Resource Management during Instruction Scheduling for the EPIC Architecture. 36-45 - Aneesh Aggarwal, Manoj Franklin:
Instruction Replication: Reducing Delays Due to Inter-PE Communication Latency. 46-55 - Nicholas J. Wang, Michael Fertig, Sanjay J. Patel:
Y-Branches: When You Come to a Fork in the Road, Take It. 56-66
Cache Optimizations
- Xavier Vera, Jaume Abella, Antonio González, Josep Llosa:
Optimizing Program Locality Through CMEs and GAs. 68-78 - Yutao Zhong, Steve Dropsho, Chen Ding:
Miss Rate Prediction across All Program Inputs. 79-90 - Hassan Al-Sukhni, Ian Bratt, Daniel A. Connors:
Compiler-Directed Content-Aware Prefetching for Dynamic Data Structures. 91-100
Keynote 2
- Monica S. Lam:
Challenges and New Approaches to Program Analysis. 102-
Compiler Techniques and Domain-Specific Optimizations
- Björn Franke, Michael F. P. O'Boyle:
Combining Program Recovery, Auto-Parallelisation and Locality Analysis for C Programs on Multi-Processor Embedded Systems. 104-113 - John Ng, Dattatraya Kulkarni, Wei Li, Robert Cox, Scott Bobholz:
Inter-Procedural Loop Fusion, Array Contraction and Rotation. 114-124 - Akira Koseki, Hideaki Komatsu, Toshio Nakatani:
Spill Code Minimization by Spill Code Motion. 125-134 - Maurício Breternitz Jr., Herbert H. J. Hum, Sanjeev Kumar:
Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU. 135-145
Logging, Tracing, Profiling
- Toshiaki Yasue, Toshio Suganuma, Hideaki Komatsu, Toshio Nakatani:
An Efficient Online Path Profiling Framework for Java Just-In-Time Compilers. 148-158 - Martin Burtscher, Metha Jeeradit:
Compressing Extended Program Traces Using Value Predictors. 159-168 - María Jesús Garzarán, Milos Prvulovic, Víctor Viñals, José María Llabería, Lawrence Rauchwerger, Josep Torrellas:
Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation. 170-181
Multiprocessors
- Phuong Hoai Ha, Philippas Tsigas:
Reactive Multi-Word Synchronization for Multiprocessors. 184-193 - Anthony-Trung Nguyen, Josep Torrellas:
Design Trade-Offs in High-Throughput Coherence Controllers. 194-205 - Jean-Loup Baer, Douglas Low, Patrick Crowley, Neal Sidhwaney:
Memory Hierarchy Design for a Multiprocessor Look-up Engine. 206-216
Keynote 3
- Chris R. Johnson:
Biomedical Computing and Visualization. 218-
Application Characterization
- Evelyn Duesterwald, Calin Cascaval, Sandhya Dwarkadas:
Characterizing and Predicting Program Behavior and its Variability. 220-231 - Kevin M. Lepak, Harold W. Cain, Mikko H. Lipasti:
Redeeming IPC as a Performance Metric for Multithreaded Programs. 232-243 - Erez Perelman, Greg Hamerly, Brad Calder:
Picking Statistically Valid and Early Simulation Points. 244-255
Register Design Issues
- Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose:
Reducing Datapath Energy through the Isolation of Short-Lived Operands. 258-268 - Xiaotong Zhuang, Santosh Pande:
Resolving Register Bank Conflicts for a Network Processor. 269-278
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