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ORCIDAPCCAS 2014: Ishigaki, Japan
- 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki, Japan, November 17-20, 2014. IEEE 2014, ISBN 978-1-4799-5230-4
Lecture Session (A1L-A): System-on-Chip
- Shih-Chieh Lin, En-Jui Chang
, Yu-Yin Chen, Hsien-Kai Hsin, An-Yeu Andy Wu:
High performance adaptive routing for Network-on-Chip systems with express highway mechanism. 1-4 - Weng-Geng Ho, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang:
Low delay-variation sub-/near-threshold asynchronous-to-synchronous interface controller for GALS Network-on-Chips. 5-8 - Chenyang Li, Xin Jin, Qionghai Dai:
An efficient distortion model configuration for depth coding in 3D-HEVC. 9-12 - Wen Shi, Xiantao Jiang, Tian Song, Takashi Shimamoto:
Edge information based fast selection algorithm for intra prediction of HEVC. 17-20
Lecture Session (A1L-B): Image Processing and Coding
- Jie Yan, Wu-Sheng Lu:
Compressive imaging by generalized total variation minimization. 21-24 - Katsuma Takimoto, Toshiyuki Dobashi, Hiroshi Ishikawa, Hitoshi Kiya:
An image estimation method by header information in JPEG 2000 codestreams and its application to image identification. 25-28 - Katsuya Kondo, Hideaki Fujiwara:
Edge preserving super-resolution with details based on similar texture synthesis. 29-32 - Kozue Kawasaki, Akira Taguchi:
A multiscale retinex based on wavelet transformation. 33-36 - Akira Taguchi, Naoki Nakajima, Yoshikatsu Hoshi:
Improved HSI color space without gamut problem. 37-40
Lecture Session (A1L-C): Analog Signal Processing
- Hiroki Sato, Shigetaka Takagi:
Frequency-to-voltage converter for temperature compensation of CMOS RC relaxation oscillator. 41-44 - Hiroki Matsumoto:
A simple switched-capacitor algorithmic digital-to-analog converter using sample/hold and divider. 45-48 - Jiaxin Liu, Yu Han, Liangbo Xie, Yao Wang, Guangjun Wen:
A 1-V DTMOS-Based fully differential telescopic OTA. 49-52 - Hiroo Wakaumi:
A folded-cascode OP Amp with a dynamic switching bias circuit. 53-56 - Shiheng Yang, Pui-In Mak, Rui Paulo Martins:
A 104μW EMI-resisting bandgap voltage reference achieving -20dB PSRR, and 5% DC shift under a 4dBm EMI level. 57-60
Lecture Session (A2L-A): VLSI Systems & Applications I (Systems for Image and Signal Processing)
- Jianfeng Wang, Chiu-sing Choy, Tak Lon Chao, Ko-Chun Kit, Kong-Pang Pun, Wanli Ouyang, Xiao-Gang Wang:
Simplifying HOG arithmetic for speedy hardware realization. 61-64 - Ngoc-Sinh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran:
Reducing temporal redundancy in MJPEG using Zipfian estimation techniques. 65-68 - Soumya Ganguly, Abhishek Mittal, Syed Ershad Ahmed, M. B. Srinivas:
A unified flagged prefix constant addition-subtraction scheme for design of area and power efficient binary floating-point and constant integer arithmetic circuits. 69-72 - Shen-Fu Hsiao, Jun-Ming Huang, Po-Sheng Wu:
VLSI implementation of belief-propagation-based stereo matching with linear-model message update. 73-76 - Ngoc-Mai Nguyen, Edith Beigné, Suzanne Lesecq, Duy-Hieu Bui, Nam-Khanh Dang, Xuan-Tu Tran:
H.264/AVC hardware encoders and low-power features. 77-80
Lecture Session (A2L-B): Speech/Sound Signal Processing
- Yu Iwai, Tetsuya Shimamura:
Formant frequency estimation with windowless autocorrelation in the presence of noise. 81-84 - Norihiro Mamizu, Naoto Sasaoka, Yoshio Itoh:
Noise activity detection based on 4th order cumulant for impact noise. 85-88 - Masahiro Toyoshima, Tetsuya Shimamura:
Packet loss concealment for VoIP based on Pitch Waveform Replication and Linear Predictive Coding. 89-92 - Shota Tanaka, Akitoshi Itai, Hiroshi Yasukawa:
A study on footstep detection in outdoor environment using Itakura-Saito distance. 93-96 - Twe Ta Oo, Takao Onoye:
Progressive audio scrambling via wavelet transform. 97-100
Lecture Session (A2L-C): Voltage and Current Regulator
- Shi Bu, Marco Ho, Ka Nang Leung, Jianping Guo:
Load regulation cancellation based on adaptive body bias for STC-LDOs. 101-104 - Yan Lu, Ruo He Yao, Da Qiang Huang, Julien Su, Junmin Jiang, Wing-Hung Ki:
A low-dropout regulator with power supply rejection improvement by bandwidth-zero tracking. 105-108 - Marco Ho, Ka Nang Leung, Pui Ying Or, Jianping Guo:
Analysis of CMOS low-dropout regulator - Power-supply rejection ratio. 109-112
Poster Session (A3P-D): Embedded Systems, Circuits and Systems for Communications
- Manas Kumar Hati, Tarun Kanti Bhattacharyya:
A 10-b, 500 MSPS current steering CMOS DAC with a switching current cell and high SFDR value. 113-116 - Qing Lu, Jianfeng Fan, Chiu-Wing Sham, Francis Chung-Ming Lau:
A high throughput Gaussian noise generator. 117-120 - Câncio Monteiro, Yasuhiro Takahashi, Toshikazu Sekine:
Effectiveness of dual-rail CSSAL against power analysis attack under CMOS process variation. 121-124 - Dang Khoa Nguyen, Hiroshi Ochi:
On the impact of transceiver impairments to cognitive DF relay networks. 125-128 - Kazuki Kamegai, Takashi Kakue, Tomoyoshi Shimobaba, Tomoyoshi Ito, Nobuyuki Masuda:
Development of special-purpose computer based on Virtex-7 FPGA for high-speed digital holography. 129-132 - Shigenori Kinjo:
A low complexity soft demapping method for expanded M-QAM constellations. 137-140 - Kazuhito Murakami:
Transient responses of voltage and current on dual-mode ring resonator bandpass filters. 141-144 - Shinichiro Miyazaki, Shoichiro Yamasaki, Ryuji Kohno:
Performance evaluation of single carrier transmission using frequency domain equalization. 145-148 - Takahide Sato, Takeshi Nagata, Daisuke Kanemoto:
High frequency ring oscillator using capacitor based level shift circuits. 149-152 - Sabooh Ajaz, Hanho Lee:
Multi-Gb/s multi-mode LDPC decoder architecture for IEEE 802.11ad standard. 153-156
Live Demonstration Session (A3P-E): Live Demonstration
- Hua-Hsin Yeh, Chun-Hua Cheng, Shih-Hsu Huang:
Live demonstration: A low-power high-level synthesis system. 165-166 - Toshiyuki Moriyama, Shinobu Izumi, Katsunon Morishita, Koji Nishiyama:
Live Demo: Sensor network system for rainwater grid: APCCAS track selection: System and networks for safe and secure life. 167-168 - Haoming Zhang, Dajiang Zhou, Satoshi Goto:
Live demonstration: FPGA based 3840×2160 video decoding and displaying system. 169-170 - Nana Sutisna, Leonardo Lanante, Yuhei Nagao, Masayuki Kurosaki, Hiroshi Ochi:
Live demonstration: Hardware-software co-verification for very large scale SoC using synopsys HAPS platform. 171-172 - Lei Lin, N. Kawarabayashi, Masahiro Fukui, Isao Shirakawa:
Live demonstration: A battery smart sensor for smart grid. 173-174 - Tatsumi Uwai, Leonardo Lanante, Baiko Sai, Hiroshi Ochi, Yuhei Nagao, Nico Surantha:
Live demonstration: IEEE802.11 wireless LAN system verification platform. 175-176 - Chacko John Deepu, X. Zhang, Wen-Sin Liew, David Liang Tai Wong, Yong Lian:
Live demonstration: An ECG-on-Chip for wearable wireless sensors. 177-178 - Chih-Chyau Yang, Yi-Jun Liu, Chien-Ming Wu, Chun-Ming Huang:
Live demonstration: A 3D die-level integration platform. 179-180
Poster Session (A4P-D): Analog Signal Processing, RF building blocks, Nonlinear, Biomedical Circuits and Systems
- Marco Ho, Shi Bu, Yanqi Zheng, Ka Nang Leung, Jianping Guo:
A 124-dB double-gain-boosted cascode amplifier with 92% rail-to-rail output swing. 181-184 - Mi-rim Kim, Young-Ouk Kim, Yong-Sik Kwak, Gil-Cho Ahn:
A 12-bit 200-kS/s SAR ADC with hybrid RC DAC. 185-188 - Artemij Iberzanov, Andrew P. Nicholson, Julian Jenkins, Torsten Lehmann, Tara Julia Hamilton:
Calibration of the Nauta structure differential OTA. 189-192 - Josef Bajer, Jiri Vavra, Dalibor Biolek:
Voltage-mode quadrature oscillator using VD-DIBA active elements. 197-200 - Chaoxun Wang, Ke Lin, Bo Wang, Jiali Hou, Mo Wang, Kai Xu, Xin'an Wang:
Analysis of a compact BCC transceiver based on PLL FSK modulator/demodulator. 201-204 - Robert Rieger, John Taylor:
Delay-line-based signal processing ASIC for velocity selective nerve recording. 205-208 - Salih Ergün:
A high-speed truly random number generator based on an autonomous chaotic oscillator. 217-220 - Daichi Yamashita, Katsutoshi Saeki, Yoshifumi Sekine:
IC implementation of spike-timing-dependent synaptic plasticity model using low capacitance value. 221-224 - Sana Arshad, Rashad Ramzan, Faiza Zafar, Qamar-ul-Wahab:
Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique. 225-228 - Hideaki Okazaki, Hideo Nakano:
On a piecewise linear enclosure method of continuous functions of many variables. 229-232 - Yoko Uwate, Yoshifumi Nishio:
Oscillation death and amplitude change in coupled van der pol oscillators with strong frustrations. 233-236 - Naoki Fujiwara, Ryota Inoue, Satoru Kidhida:
Effect of tiredness on voice signals using neural network systems. 237-239 - Fang-Ting Chou, Chia-Min Chen, Zong-Yi Chen, Chung-Chih Hung:
A novel glitch reduction circuitry for binary-weighted DAC. 240-243
Lecture Session (B1L-A): VLSI Systems & Applications II (High-Performance and Security)
- Koichi Fujiwara, Shin-ya Abe, Kazushi Kawamura, Masao Yanagisawa, Nozomu Togawa:
A floorplan-aware high-level synthesis algorithm for multiplexer reduction targeting FPGA designs. 244-247 - Kotaro Terada, Masao Yanagisawa, Nozomu Togawa:
A floorplan-driven high-level synthesis algorithm with operation chainings using chaining enumeration. 248-251 - Huiqian Hang, Mika Fujishiro, Hirokazu Kodera, Masao Yanagisawa, Nozomu Togawa:
Scan-based side-channel attack on Camellia cipher using scan signatures. 252-255 - Li Zhang, Chip-Hong Chang:
Hardware Trojan detection with linear regression based gate-level characterization. 256-259 - Zhenqi Wei, Peilin Liu, Rongdi Sun, Rendong Ying:
High-efficient queue-based spin locks for Network-on-Chip processors. 260-263
Lecture Session (B1L-B): Multimedia Systems and Applications
- Xi Zhang, Takuya Suzuki:
Scalable video coding using allpass-based wavelet filters. 264-267 - Chun-Yu Lung, Chung-An Shen:
A high-throughput interpolator for fractional motion estimation in high efficient video coding (HEVC) systems. 268-271 - Yang-Ting Chou, Jar-Ferr Kevin Yang:
Object recognition based on generalized linear regression classification in use of color information. 272-275 - Jian-Jiun Ding, Wei-Sheng Lai, Hao-Hsuan Chang, Chir-Weei Chang, Chuan-Chung Chang:
Edge adaptive hybrid norm prior method for blurred image reconstruction. 276-279 - Ahmed Medhat, Ahmed Shalaby, Mohammed Sharaf Sayed, Maha Elsabrouty, Farhad Mehdipour:
A highly parallel SAD architecture for motion estimation in HEVC encoder. 280-283
Lecture Session (B1L-C): Switching Converters and Applications
- Kerui Li, Adrian Ioinovici:
Large DC gain nonisolated converter based on a new L-C-D step-up switching cell. 284-287 - Tomoharu Nagashima, Xiuqin Wei, Hiroo Sekiya:
Analytical design procedure for resonant inductively coupled wireless power transfer system with class-DE inverter and class-E rectifier. 288-291 - Jefferson William Zanotti, Denizar Cruz Martins:
Input characteristic impedance technique of power converters circuits applied to the maximum power point tracker of photovoltaic panels. 292-295
Lecture Session (B2L-A): VLSI Systems & Applications III (Timing and Variation Aware Systems)
- Shinnosuke Yoshida, Youhua Shi, Masao Yanagisawa, Nozomu Togawa:
An area-overhead-oriented monitoring-path selection algorithm for suspicious timing error prediction. 300-303 - Tatsuro Kojo, Masashi Tawada, Masao Yanagisawa, Nozomu Togawa:
A write-reducing and error-correcting code generation method for non-volatile memories. 304-307 - Tsung-Tang Lin, Wen-Pin Tu, Shih-Hsu Huang:
Self-adjusting mechanism to dynamically suppress the effect of PVT variations on clock skew. 308-311 - Anne Lorraine S. Luna, John Richard E. Hizon, Louis P. Alarcón:
Timing analysis and optimization of voltage scaled CMOS digital circuits with dual-Vth devices. 312-315 - Divya Duvvuri, Vijaya Sankara Rao Pasupureddi, J. Chattopadhyay:
100-Mbps transceiver for enhanced MIL-STD-1553. 316-319
Special Session (B2L-B): Image Sensor Based Visible Light Communication
- Katsunori Ebihara, Koji Kamakura, Takaya Yamazato:
Spatially-modulated space-time coding in visible light communications using 2×2 LED array. 320-323 - Tadahiro Wada, Haruki Furukawa, Kaiji Mukumoto:
A study on parallel transmission wireless visible light communications using color shift keying. 324-327 - Yuki Goto, Isamu Takai, Takaya Yamazato, Hiraku Okada, Akitoshi Fujii, Shoji Kawahito, Shintaro Arai, Tomohiro Yendo, Koji Kamakura:
BER characteristic of optical-OFDM using OCI. 328-331 - Masayuki Kinoshita, Takaya Yamazato, Hiraku Okada, Toshiaki Fujii, Shintaro Arai, Tomohiro Yendo, Koji Kamakura:
Channel fluctuation measurement for image sensor based I2V-VLC, V2I-VLC, and V2V-VLC. 332-335 - Daigo Iwase, Makoto Kasai, Tomohiro Yendo, Shintaro Arai, Takaya Yamazato, Hiraku Okada, Toshiaki Fujii:
Improving communication rate of visible light communication system using high-speed camera. 336-339
Lecture Session (B2L-C): RF building blocks
- Taisuke Hamada, Hao Jiang, Yiming Fang, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu:
A 0.5-V 2.5-GHz high-gain low-power regenerative amplifier based on Colpitts oscillator topology in 65-nm CMOS. 340-343 - Gim Heng Tan, Roslina Mohd Sidek, Maryam bt. Mohd Isa:
Design of ultra-low voltage and low-power CMOS current bleeding mixer. 344-347 - Nandini Vitee, Harikrishnan Ramiah, Wei-Keat Chong:
A wideband CMOS LNA-mixer for cognitive radio receiver. 348-351 - Ibrahim L. Abdalla, Ahmed Allam, Ramesh K. Pokharel, Hongting Jia:
A DC-2.5GHz voltage variable attenuator in 0.18-μm CMOS technology. 352-355 - Ren-Yuan Huang, Ro-Min Weng, Huo-Ying Chang:
A low-voltage high-linearity low noise amplifier for wireless body area networks. 356-358
Lecture Session (B3L-A): Embedded Systems
- Takeshi Kumaki, Takeshi Fujino, Tetsushi Koide:
Interleaved-bitslice AES encryption and decryption with massive-parallel mobile embedded processor. 359-362 - Anh-Tuan Hoang, Tetsushi Koide, Masaharu Yamamoto:
Low cost hardware implementation for traffic sign detection system. 363-366 - Amr Fathy, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Custom instruction search for application specific instruction-set processor using guided simulated annealing. 367-370 - Yang Liu, Lin Meng, Ittetsu Taniguchi, Hiroyuki Tomiyama:
A dual-mode scheduling algorithm for task graphs with data parallelism. 371-374 - Surachai Thongkaew, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda:
Dalvik bytecode acceleration using Fetch/Decode Hardware Extension with hybrid Execution. 375-378
Special Session (B3L-B): Systems and Networks for Safe and Secure Life
- Hiroshi Tamura, Kaoru Watanabe, Shoji Shinoda:
Relations on the bounds of the number of channels on multi-hop wireless networks. 379-382 - Dongwook Lee, Sangjun Park, Minsoo Hahn:
A study on bicycle crash risk based on GPS trajectories collected from bidirectional traffic. 383-386 - Takuya Nishimaki, Koichi Gyoda:
Improvement and evaluation of the wireless ad hoc network protocol FORP for inter-vehicle communications. 387-390 - Yongnu Jin, Kyung Sup Kwak, Masakazu Sengoku, Shoji Shinoda:
Wide area sensor network for disaster prevention and monitoring: Concept and service coverage. 391-394 - Munenari Inoguchi, Keiko Tamura, Kei Horie, Haruo Hayashi:
Implementation of web-based system for building damage assessment on online network: Case studies of Typhoon MAN-YI (1318) and Typhoon WIPHA (1326) in Japan. 395-398
Lecture Session (B3L-C): Biomedical Circuits and Systems
- Deyasini Majumdar, Mithun Ceekala, Kamal El-Sankary, Christian Schlegel:
An energy-efficient baseband transmitter design for implantable biotelemetry applications. 399-402 - Diyang Zhao, Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
Design considerations of a low-noise receiver front-end and its spiral coil for portable NMR screening. 403-406 - Yongfu Li, Wei Mao, Zhe Zhang, Yong Lian:
An ultra-low voltage comparator with improved comparison time and reduced offset voltage. 407-410 - Motoki Hayakawa, Shoya Ueda, Akitoshi Itai, Arao Funase:
Study on analysis of movement-related cortical potentials included in saccade-related EEG. 411-414 - Ammar Y. K. Timimi, Mohd. Alauddin Mohd. Ali:
Sensor factors influencing photoplethysmography. 415-418
Lecture Session (B4L-A): Circuits and Systems for Communications 1
- Zong-Yi Chen, Chung-Chih Hung:
Jitter compensation technique for continuous-time sigma-delta modulator. 423-426 - Chang-Hsi Wu, Yu-Po Lin, Hong-Cheng You, Shun-Zhao Huang:
A 1.04 mm2, low-power front-end circuit of receiver in 0.18μm CMOS for IEEE 802.11a application. 427-430 - Chuan Zhang, Shenghui Weng, Xiaohu You, Zhongfeng Wang:
Area-efficient check node unit architecture for single block-row quasi-cyclic LDPC codes. 431-434 - Tomitaka Hotta, Munetoshi Iwakiri:
Statistical analysis of inner products from normal-vectors to 3D point cloud clustering. 435-438
Special Session (B4L-B): Recent Advance on Signal Processing for Audio and Acoustic System
- Kensaku Fujii, Mitsuji Muneyasu, Takuya Sawada, Takuto Yoshioka, Masakazu Morimoto:
An insertion loss control method for supplementing cancellation effect deteriorated by echo path change in hands free telecommunication system. 439-442 - Kuo-Kai Shyu, Chung-Ying Ho, Cheng-Yuan Chang:
A study on using microcontroller to design active noise control systems. 443-446 - Masato Nakayama, Takanobu Nishiura, Ryota Okuno, Noboru Nakasako:
A study on acoustic beam steering with parametric loudspeaker based on individual delay-filtering for carrier and sideband waves. 447-450 - Yoshinobu Kajikawa:
Integration of active noise control and other acoustic signal processing techniques. 451-454 - Yun-Hui Liu, Hung-En Hsieh, Wei-Hao Wu:
Phase shift compensation on active vibration isolation system using adaptive signal processing. 455-458
Lecture Session (B4L-C): Sensor Systems and Emerging Memory Technology
- Katutoshi Sugiyama, Katsutoshi Saeki, Minoru Saito Nihon, Yoshifumi Sekine:
A study on gas sensors using a SAW device. 459-462 - Jun Tan, Alexander Rolapp, Eckhard Hennig:
A low-voltage low-power CMOS time-domain temperature sensor accurate to within [-0.1, +0.5] °C From -40 °C To 125 °C. 463-466 - Xinyuan Qian, Menghan Guo, Hang Yu, Shoushun Chen, Kay Soon Low:
A dual-exposure in-pixel charge subtraction CTIA CMOS image sensor for centroid measurement in star trackers. 467-470 - Infall Syafalni, Tsutomu Sasao, Xiaoqing Wen, Stefan Holst, Kohei Miyase:
Soft-error tolerant TCAMs for high-reliability packet classifications. 471-474 - Nemat H. El-Hassan, T. Nandha Kumar, Haider Abbas F. Almurib:
Multilevel phase change memory cell model. 475-478
Poster Session (B5P-D): Digital Signal Processing, Multimedia Systems and its Applications
- Chien-Cheng Tseng, Su-Ling Lee:
Closed-form design of fixed fractional hubert transformer using discrete sine transform. 479-482 - Chien-Cheng Tseng, Su-Ling Lee:
Digital image sharpening using Riesz fractional order derivative and discrete hartley transform. 483-486 - Patteti Krishna, Tipparti Anil Kumar, Kalitkar Kishan Rao:
Pilot based LMMSE channel estimation for Multi-User MIMO- OFDM systems with power delay profile. 487-490 - Kanjana Pattanaworapan, Kosin Chamnongthai:
Patch-based finger encoding for hand posture recogntion. 491-494 - Kazunari Kato, Yasuhiro Takahashi, Toshikazu Sekine:
Skew tolerance analysis and layout design of 4×4 multiplier using two phase clocking subthreshold adiabatic logic. 495-498 - Nai-Shan Huang, Yu-Min Lin, Yi Chen, An-Yeu Andy Wu:
Adaptive filter-based reconstruction engine design for compressive sensing. 499-502 - Yue-Dar Jou, Fu-Kun Chen:
Least-squares design of IIR all-pass filters using closed-form Toeplitz-plus-Hankel matrix. 503-506 - Chia-Wei Chang, Hao-Fan Hsu, Chih-Peng Fan:
High-efficiency multiple 4×4 and 8×8 inverse transform design with a cost-effective unified architecture for multistandard video decoders. 507-510 - Xiantao Jiang, Tian Song, Takashi Shimamoto, Lisheng Wang:
AMVP prediction algorithm for adaptive parallel improvement of HEVC. 511-514 - Xiantao Jiang, Tian Song, Takashi Shimamoto, Wen Shi, Lisheng Wang:
Temporal prediction improvement for parallel processing of HEVC. 515-518 - Thian Fatt Tay, Chip-Hong Chang:
New algorithm for signed integer comparison in four-moduli superset {2n, 2n -1, 2n +1, 2n+1-1}. 519-522 - Takashi Nishitsuji, Takashi Kakue, Tomoyoshi Shimobaba, Tomoyoshi Ito:
Conflict-free FFT circuit using loop architecture by 5-bank memory system. 523-526 - Naoki Nakajima, Akira Taguchi:
Intensity/saturation enhancement based on differential gray-levels histogram equalization. 527-530 - Yu Iwabuchi, Koichi Ichige:
Accurate and low-cost DOA estimation method using array covariance matrix elements. 531-534 - Keita Yamada, Koichi Ichige:
DOA estimation for low-cost array antenna system based on GROUSE and EM algorithms. 535-538 - Tsubasa Nobeoka, Leonardo Lanante, Masayuki Kurosaki, Hiroshi Ochi:
Lossless data hiding method using error correction code. 539-542 - Shunsuke Matoba, Takashi Kakue, Tomoyoshi Shimobaba, Tomoyoshi Ito, Nobuyuki Masuda:
Design of computational circuit for calculation of parallel phase-shifting digital holography. 543-546 - Ryuji Hirayama, Hirotaka Nakayama, Takashi Kakue, Tomoyoshi Shimobaba, Tomoyoshi Ito, Atsushi Shiraki:
Development of volumetric display based on multi-bit color LED. 547-550
Poster Session (B6P-D): Sensor Systems, Emerging Memory Technology, Power Converters, Emerging Circuits & Systems
- Chua-Chin Wang, Deng-Shian Wang, Shiou-Ya Chen, Chia-Ming Chang:
A 20 GHz power detector with 176 mV/dB conversion gain. 551-554 - Masaru Oya, Yuta Atobe, Youhua Shi, Masao Yanagisawa, Nozomu Togawa:
Secure scan design using improved random order and its evaluations. 555-558 - Wazir Zada Khan, Mohamad Naufal bin Mohamad Saad, Mohammed Y. Aalsalem, Yang Xiang:
Detecting clones in wireless sensor networks using Single Stage Memory Random Walk with Network Division. 559-562 - Chua-Chin Wang, Wen-Je Lu, Min-Yu Tseng:
An all-digital battery capacity monitor using calibrated current estimation approach. 563-566 - Keiju Matsui, Eiji Oishi, Mikio Yasubayashi, Yasutaka Kawata, Masayoshi Umeno, Hideo Uchida, Masaru Hasegawa:
Simple and concise photovoltaic power generation system installed in veranda. 567-570 - Krishna Kanth Gowri Avalur, Syed Azeemuddin:
Automotive hybrid voltage regulator design with adaptive LDO dropout using load-sense technique. 571-574 - Junmin Jiang, Yan Lu, Wing-Hung Ki:
Analysis of two-phase on-chip step-down switched capacitor power converters. 575-578 - Kei Watanabe, Mikio Abe, Toru Sai, Yasuhiro Sugimoto:
A fast and precise circuit simulation method for switching power converters using a mixture of circuits and behavioral models. 579-582 - Yusuke Morimoto, Mitsuru Matsushita, Michiaki Muraoka, Masahiko Toyonaga:
A critical net reshape-router for high-performance VLSI layout design. 587-590
Poster Session (B7P-D): VLSI Systems & Applications and System-on-Chip
- Asish Zac Alex, Torsten Lehmann:
High-voltage tolerant switch configuration using standard 3.3-V 0.5-μm silicon-on-sapphire CMOS transistors. 591-594 - Ying-Jou Chen, Jian-Jiun Ding, Ching-Wen Hsiao, Hao-Hsuan Chang:
A region adaptive encoding algorithm for simple image compression. 595-598 - Kuan-Hung Chen, Hong-Son Vu, Kuo-Yuan Weng, Jin-Huang Huang, Yu-Ting Tsai, Yu-Cheng Liu, Wen-Hung Wang:
Design of an efficient active noise cancellation circuit for in-ear headphones. 599-602 - Genya Ishigaki, Masao Yoshida, Norihiko Shinomiya:
On maximizing tree reliability based on minimum diameter spanning tree. 603-606 - Nanako Niioka, Masayuki Watanabe, Rosely Karel, Tetsuya Kobayashi, Masashi Imai, Masa-Aki Fukase, Atsushi Kurokawa:
Impact of on-chip interconnects on vertical signal propagation in 3D ICs. 607-610 - Hua-Hsin Yeh, Wen-Pin Tu, Jian-Zhi Shen, Tung-Hua Yen, Shih-Hsu Huang:
Abstract bus interface unit for ESL design from TLM 2.0 communications to the real bus protocol. 611-614 - Li-Hung Wang, Chao-Kai Cheng, Chung-Bin Wu:
A real-time architecture of multiple features extraction for vehicle verification. 615-618 - Kenichiro Murotatsu, Kunihiro Fujiyoshi:
Adjacent common centroid placement for analog IC layout design. 619-622 - Fengwei An, Toshinobu Akazawa, Shogo Yamazaki, Lei Chen, Hans Jürgen Mattausch:
LVQ neural network SoC adaptable to different on-chip learning and recognition applications. 623-626 - Haruki Ogata, Yasuhiro Takahashi, Toshikazu Sekine:
Power dissipation analysis of memristor for low power integrated circuit applications. 627-630 - Iffa Sharuddin, L. Lee:
Design of low power and improved tlatch comparator for SAR ADC. 631-634 - Ajinkya Kale, Vijaya Sankara Rao Pasupureddi, J. Chattopadhyay:
Design and simulation of a wideband channelized transceiver for DRFM applications. 635-638 - Hasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama, Michitaka Kameyama:
Efficient data transfer scheme using word-pair-encoding-based compression for large-scale text-data processing. 639-642 - Ovgu Ozturk Ergun:
Privacy preserving face recognition in encrypted domain. 643-646 - Satoshi Tayu, Shuichi Ueno:
A note on the energy-aware mapping for NoCs. 647-650 - Tetsushi Koide, Anh-Tuan Hoang, Takumi Okamoto, Satoshi Shigemi, Tsubasa Mishima, Toru Tamaki, Bisser Raytchev, Kazufumi Kaneda, Yoko Kominami, Rie Miyaki, Taiji Matsuo, Shigeto Yoshida, Shinji Tanaka:
FPGA implementation of type identifier for colorectal endoscopie images with NBI magnification. 651-654
Lecture Session (C1L-A): Circuits and Systems for Communications 2
- Yujing Wu, Zhe-Yan Piao, Jun-Ho Kim, Jin-Gyun Chung:
CAN compression using signal rearrangement. 655-658 - Wei-Zen Chen, Yi-Hung Yang:
An 8 Gbps, 4: 1 transition-aware self-toggling multiplexer. 659-662 - Byung Jun Choi, Myung Hoon Sunwoo:
Simplified forced convergence decoding algorithm for low power LDPC decoders. 663-666 - Moon Gi Kim, Sung Kyung Shin, Myung Hoon Sunwoo:
New parallel MDC FFT processor with efiicient scheduling scheme. 667-670 - Yoshihiro Kaneko, Yuhei Ishii:
The next hop selection of distance vector by local centrality measure. 671-674
Special Session (C1L-B): Technologies for Innovative Multi-Core NoC
- Zhe Wang, Weichen Liu, Jiang Xu, Xiaowen Wu, Zhehui Wang, Bin Li, Ravi R. Iyer, Ramesh Illikkal:
A systematic network-on-chip traffic modeling and generation methodology. 675-678 - Tomohiro Yoneda, Masashi Imai, Hiroshi Saito, Takahiro Hanyu, Kenji Kise, Yuichi Nakamura:
An NoC-based evaluation platform for safety-critical automotive applications. 679-682 - Akira Mochizuki, Hirokatsu Shirahama, Naoya Onizawa, Takahiro Hanyu:
Highly reliable single-ended current-mode circuit for an inter-chip asynchronous communication link. 683-686 - Masashi Imai, Tomohiro Yoneda:
Energy-and-performance efficient differential domino logic cell libraries for QDI-model-based asynchronous circuits. 687-690 - Vineeth Mohan, Wenjing Hsu, Wei Zhang, Xiaowen Wu:
An extended framework for worst-case throughput analysis with router constraint. 691-694
Lecture Session (C1L-C): Emerging Circuits and Systems Technologies and Techniques
- Meng-Fan Chang, Che-Wei Wu, Jui-Yu Hung, Ya-Chin King, Chomg-Jung Lin, Mon-Shu Ho, Chia-Cheng Kuo, Shyh-Shyuan Sheu:
A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips. 695-698 - Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara:
Comparative study of power-gating architectures for nonvolatile SRAM cells based on spintronics technology. 699-702 - T. Nandha Kumar, Haider A. F. Almurib, Fabrizio Lombardi:
A novel design of a memristor-based look-up table (LUT) for FPGA. 703-706 - Matthias Korb, Andreas Kleine:
Numerical free-disposal-hull data-envelopment analysis of potential CMOS-successor technologies. 707-710 - Tieyuan Pan, Ran Zhang, Yasuhiro Takashima, Takahiro Watanabe:
A randomized algorithm for the fixed-length routing problem. 711-714
Lecture Session (C2L-A): Circuits and Systems for Communications 3
- Mai Nozaki, Shingo Yoshizawa, Hiroshi Tanimoto:
VLSI design of an interference canceller for QPSK OFDM-IDMA systems. 715-718 - Yves Germain, Julien Lintignat, Bernard Jarry, Bruno Barelaud, Vincent Armengaud, Luc Lapierre:
Broadband fully silicon integrated differential balun and LNA for space applications. 723-726 - Reina Hongyo, Thi Hong Tran, Leonardo Lanante, Hiroshi Ochi, Yuhei Nagao:
A design of low complex log likelihood ratio for MIMO decoder using the bit shift. 727-730 - Shoichiro Yamasaki, Tomoko K. Matsushima, Shinichiro Miyazaki:
Secure wireless communications using secret sharing and vector coding. 731-734
Special Session (C2L-B): Post-Silicon Adaptation for Performance, Reliability and Yield
- Youhua Shi, Nozomu Togawa:
In-situ timing monitoring methods for variation-resilient designs. 735-738 - Weiwei Shan, Zhipeng Xu:
Timing error prediction based adaptive voltage scaling for dynamic variation tolerance. 739-742 - Jian Ma, Hai Wang, Sheldon X.-D. Tan, Chi Zhang, He Tang:
Hybrid dynamic thermal management method with model predictive control. 743-746 - Masatsugu Hosoki, Seiya Nagatsuka, Yasuhiro Takashima:
Delay estimation method for correlated net delay variations. 747-750 - Masanori Hashimoto:
Stochastic verification of run-time performance adaptation with field delay testing. 751-754
Lecture Session (C2L-C): Nonlinear Circuits and Neural Systems
- Kiyotaka Yamamura, Hiroshi Taki:
Characteristic analysis and tolerance analysis of nonlinear resistive circuits using integer programming. 755-758 - Masayuki Watanabe, Rosely Karel, Nanako Niioka, Tetsuya Kobayashi, Masa-Aki Fukase, Masashi Imai, Atsushi Kurokawa:
Effect of substrate contacts on reducing crosstalk noise between TSVs. 763-766 - Motoaki Mouri, Ichi Takumi, Hiroshi Yasukawa, Andrzej Cichocki:
Revising algorithm for nonnegative matrix factorization based on minimizing quasi-L1 norm. 767-770 - Hironori Kumeno:
Hopfield neural networks with problem perturbing noise. 771-774
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