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ORCID3. Conference On Computing Frontiers 2006: Ischia, Italy
- Proceedings of the Third Conference on Computing Frontiers, 2006, Ischia, Italy, May 3-5, 2006. ACM 2006, ISBN 1-59593-302-6
- Michael Gschwind:
Chip multiprocessing and the cell broadband engine. 1-8
Multithreaded, multicore, and SoC systems
- Samuel Williams
, John Shalf, Leonid Oliker, Shoaib Kamil, Parry Husbands, Katherine A. Yelick:
The potential of the cell processor for scientific computing. 9-20 - Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson:
MPSoC ECG biochip: a multiprocessor system-on-chip for real-time human heart monitoring and analysis. 21-28 - Michela Becchi, Patrick Crowley:
Dynamic thread assignment on heterogeneous multiprocessor architectures. 29-40 - Juan del Cuvillo, Weirong Zhu, Guang R. Gao:
Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chip. 41-50 - Panagiotis Tsarchopoulos:
Current and future research directions in embedded systems: a european perspective. 51-52
Novel computing paradigms
- Arnab Bhattacharyya:
Morphogenesis as an amorphous computation. 53-64 - Mary Mehrnoosh Eshaghian-Wilner, Alexander Khitun, Shiva Navab, Kang L. Wang:
A nano-scale reconfigurable mesh with spin waves. 65-70 - Mihai Udrescu, Lucian Prodan, Mircea Vladutiu:
Implementing quantum genetic algorithms: a solution based on Grover's algorithm. 71-82
Resource-aware computing
- John Y. Oliver, Ravishankar Rao, Michael Brown, Jennifer Mankin, Diana Franklin, Frederic T. Chong, Venkatesh Akella:
Tile size selection for low-power tile-based architectures. 83-94 - Israel Waldman, Shlomit S. Pinter:
Profile-driven compression scheme for embedded systems. 95-104 - Seung Woo Son, Mahmut T. Kandemir:
Energy-aware data prefetching for multi-speed disks. 105-114 - Jonathan W. Mills, Matt Parker, Bryce Himebaugh, Craig A. Shue, Brian Kopecky, Chris Weilemann:
"Empty space" computes: the evolution of an unconventional supercomputer. 115-126
Compilation and dynamic optimization
- Efe Yardimci, Michael Franz:
Dynamic parallelization and mapping of binary executables on hierarchical platforms. 127-138 - Hitoshi Oi:
Instruction folding in a hardware-translation based java virtual machine. 139-146 - Sid Ahmed Ali Touati, Denis Barthou:
On the decidability of phase ordering problem in optimizing compilation. 147-156 - Ozcan Ozturk, Guangyu Chen, Mahmut T. Kandemir:
Multi-compilation: capturing interactions among concurrently-executing applications. 157-170
Reconfigurable and autonomic computing
- Igino Folcarelli, Alex E. Susu, Ties Kluter, Giovanni De Micheli, Andrea Acquaviva:
An opportunistic reconfiguration strategy for environmentally powered devices. 171-176 - Emil A. Stoyanov, Markus Alexander Wischy, Dieter Roller:
Using managed communication channels in software components. 177-186 - Heiko Kalte, Mario Porrmann:
REPLICA2Pro: task relocation by bitstream manipulation in virtex-II/Pro FPGAs. 403-412
Special session on reliable computing
- Lucian Prodan, Mihai Udrescu, Mircea Vladutiu:
A dependability perspective on emerging technologies. 187-198 - Gianluca Tempesti, Daniel Mange, Pierre-André Mudry, Joël Rossier, André Stauffer:
Self-replication for reliability: bio-inspired hardware and the embryonics project. 199-206 - Andrew M. Tyrrell:
Dependability in an evolving world. 207-220 - Lukás Sekanina:
On dependability of FPGA-based evolvable hardware systems that utilize virtual reconfigurable circuits. 221-228
Applications I
- Manojkumar Krishnan, Jarek Nieplocha:
Memory efficient parallel matrix multiplication operation for irregular problems. 229-240 - Philip Garcia, Henry F. Korth:
Database hash-join algorithms on multithreaded computer architectures. 241-252 - Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis:
Improving the memory behavior of vertical filtering in the discrete wavelet transform. 253-260 - Luigi Bitonti, Tamás Kiss, Gábor Terstyánszky, Thierry Delaitre, Stephen C. Winter, Péter Kacsuk:
Dynamic testing of legacy code resources on the grid. 261-268
High performance architectures
- Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero:
Kilo-instruction processors, runahead and prefetching. 269-278 - Sailesh Kumar, John Maschmeyer, Patrick Crowley:
Exploiting locality to ameliorate packet queue contention and serialization. 279-290 - Jesús Alastruey, Teresa Monreal, Víctor Viñals, Mateo Valero:
Speculative early register release. 291-302 - Jeff H. Derby, Robert K. Montoye, José E. Moreira:
VICTORIA: VMX indirect compute technology oriented towards in-line acceleration. 303-312
Cache architectures
- Allan Hartstein, Viji Srinivasan, Thomas R. Puzak, Philip G. Emma:
Cache miss behavior: is it sqrt(2)? 313-320 - Alberto Ros, Manuel E. Acacio, José M. García:
An efficient cache design for scalable glueless shared-memory multiprocessors. 321-330 - Farshad Khunjush, Nikitas J. Dimopoulos:
Lazy direct-to-cache transfer during receive operations in a message passing environment. 331-340
Special session on cache optimization
- Jaeheon Jeong, Per Stenström, Michel Dubois:
Simple penalty-sensitive replacement policies for caches. 341-352 - Anca Mariana Molnos, Sorin Dan Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven:
Static cache partitioning robustness analysis for embedded on-chip multi-processors. 353-360 - Domingo Benitez, Juan C. Moure, Dolores Rexachs, Emilio Luque:
Evaluation of the field-programmable cache: performance and energy consumption. 361-372 - Kristof Beyls, Erik H. D'Hollander:
Intermediately executed code is the key to find refactorings that improve temporal data locality. 373-382
Applications II
- Daniel G. Chavarría-Miranda, Jarek Nieplocha, Vinod Tipparaju:
Topology-aware tile mapping for clusters of SMPs. 383-392 - Michael L. Welcome, Charles A. Rendleman, Leonid Oliker, Rupak Biswas:
Performance characteristics of an adaptive mesh refinement calculation on scalar and vector platforms. 393-402
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