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ORCIDCODES+ISSS 2014: Uttar Pradesh, India
- Radu Marculescu, Gabriela Nicolescu:
2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014, Uttar Pradesh, India, October 12-17, 2014. ACM 2014 - Chih-Ming Hsieh, Farzad Samie, M. Sammer Srouji, Manyi Wang, Zhonglei Wang, Jörg Henkel:
Hardware/software co-design for a wireless sensor network platform. 1:1-1:10 - Sebastian Graf, Felix Reimann, Michael Glaß
, Jürgen Teich:
Towards scalable symbolic routing for multi-objective networked embedded system design and optimization. 2:1-2:10 - Hananeh Aliee, Michael Glaß, Faramarz Khosravi, Jürgen Teich:
An efficient technique for computing importance measures in automatic design of dependable embedded systems. 3:1-3:10 - Yong Zou, Sudeep Pasricha:
HEFT: A hybrid system-level framework for enabling energy-efficient fault-tolerance in NoC based MPSoCs. 4:1-4:10 - Chen Liu, Chengmo Yang, Yuanqi Shen:
Leveraging microarchitectural side channel information to efficiently enhance program control flow integrity. 5:1-5:9 - Bing-Jing Chang, Yuan-Hao Chang, Hung-Sheng Chang, Tei-Wei Kuo, Hsiang-Pang Li:
A PCM translation layer for integrated memory and storage management. 6:1-6:10 - Omid Assare, Rajesh Gupta:
Timing analysis of erroneous systems. 7:1-7:10 - Arian Maghazeh, Unmesh D. Bordoloi, Adrian Horga, Petru Eles, Zebo Peng:
Saving energy without defying deadlines on mobile GPU-based heterogeneous systems. 8:1-8:10 - Jongeun Lee, Seongseok Seo, Hongsik Lee, Hyeon Uk Sim:
Flattening-based mapping of imperfect loop nests for CGRAs? 9:1-9:10 - Santiago Pagani, Heba Khdr, Waqaas Munawar, Jian-Jia Chen, Muhammad Shafique, Minming Li, Jörg Henkel:
TSP: Thermal Safe Power - Efficient power budgeting for many-core systems in dark silicon. 10:1-10:10 - Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan:
Hypnos: An ultra-low power sleep mode with SRAM data retention for embedded microcontrollers! 11:1-11:10 - Mahboobeh Ghorbani, Yanzhi Wang, Yuankun Xue, Massoud Pedram, Paul Bogdan:
Prediction and control of bursty cloud workloads: A fractal framework. 12:1-12:9 - Muhammad Shafique, Siddharth Garg, Tulika Mitra, Sri Parameswaran, Jörg Henkel:
Dark silicon as a challenge for hardware/software co-design. 13:1-13:10 - Bharathwaj Raghunathan, Siddharth Garg:
Job arrival rate aware scheduling for asymmetric multi-core servers in the dark silicon era. 14:1-14:9 - Daniel Thiele, Philip Axer, Rolf Ernst, Jan R. Seyler:
Improving formal timing analysis of switched ethernet by exploiting traffic stream correlations. 15:1-15:10 - Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy, Jason M. Allred:
Tackling QoS-induced aging in exascale systems through agile path selection. 16:1-16:10 - Oliver Reiche, Moritz Schmid, Frank Hannig, Richard Membarth, Jürgen Teich:
Code generation from a domain-specific language for C-based HLS of hardware accelerators. 17:1-17:10 - Christian Pilato, Paolo Mantovani, Giuseppe Di Guglielmo, Luca P. Carloni:
System-level memory optimization for high-level synthesis of component-based SoCs. 18:1-18:10 - Philipp Mundhenk, Florian Sagstetter, Sebastian Steinhorst, Martin Lukasiewycz, Samarjit Chakraborty:
Policy-based message scheduling using FlexRay. 19:1-19:10 - Axel Jantsch, Kalle Tammemäe:
A framework of awareness for artificial subjects. 20:1-20:3 - Jürgo-Sören Preden:
Generating situation awareness in cyber-physical systems: Creation and exchange of situational information. 21:1-21:3 - Santanu Sarma, Nikil D. Dutt, Puneet Gupta, Alexandru Nicolau, Nalini Venkatasubramanian:
On-chip self-awareness using Cyberphysical-Systems-on-Chip (CPSoC). 22:1-22:3 - Liang Guang, Juha Plosila, Hannu Tenhunen:
From self-aware building blocks to self-organizing systems with hierarchical agent-based adaptation. 23:1-23:3 - Liangpeng Guo, Qi Zhu, Pierluigi Nuzzo, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli, Edward A. Lee:
Metronomy: A function-architecture co-simulation framework for timing verification of cyber-physical systems. 24:1-24:10 - Sunha Ahn, Sharad Malik:
Automated firmware testing using firmware-hardware interaction patterns. 25:1-25:10 - Jiun-Hung Ding, Wei-Chung Hsu, BaiCheng Jeng, Shih-Hao Hung, Yeh-Ching Chung:
HSAemu - A full system emulator for HSA platforms. 26:1-26:10 - S. T. Choden Konigsmark, Leslie K. Hwang, Deming Chen, Martin D. F. Wong:
System-of-PUFs: Multilevel security for embedded systems. 27:1-27:10 - Bin Zhou, Wei Zhang, Thambipillai Srikanthan, J. K. J. Teo:
A low cost acceleration method for hardware trojan detection based on fan-out cone analysis. 28:1-28:10 - Milos Panic, Sebastian Kehr, Eduardo Quiñones, Bert Böddeker, Jaume Abella, Francisco J. Cazorla:
RunPar: An allocation algorithm for automotive applications exploiting runnable parallelism in multicores. 29:1-29:10 - Martin Lukasiewycz, Sebastian Steinhorst, Swaminathan Narayanaswamy:
Verification of balancing architectures for modular batteries. 30:1-30:10 - Di Zhu, Siyu Yue, Sangyoung Park, Yanzhi Wang, Naehyuck Chang, Massoud Pedram:
Cost-effective design of a hybrid electrical energy storage system for electric vehicles. 31:1-31:8 - Yi Xiang, Sudeep Pasricha:
Fault-aware application scheduling in low-power embedded systems with energy harvesting. 32:1-32:10 - Chen Pan, Mimi Xie, Jingtong Hu, Yiran Chen, Chengmo Yang:
3M-PCM: Exploiting multiple write modes MLC phase change main memory in embedded systems. 33:1-33:10 - Andreas Weichslgartner, Deepak Gangadharan, Stefan Wildermann, Michael Glaß, Jürgen Teich:
DAARM: Design-time application analysis and run-time mapping for predictable execution in many-core systems. 34:1-34:10 - Sebastian Tobuschat, Moritz Neukirchner, Leonardo Ecco, Rolf Ernst:
Workload-aware shaping of shared resource accesses in mixed-criticality systems. 35:1-35:10
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