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16th FMCAD 2016: Mountain View, CA, USA
- Ruzica Piskac, Muralidhar Talupur:

2016 Formal Methods in Computer-Aided Design, FMCAD 2016, Mountain View, CA, USA, October 3-6, 2016. IEEE 2016, ISBN 978-0-9835678-6-8 - Dawn Song:

Formal verification for computer security: Lessons learned and future directions. 1 - Christos H. Papadimitriou:

Understanding evolution through algorithms. 2 - George Varghese:

Network verification - When Clarke meets Cerf. 3 - Manish Pandey:

Machine learning and systems for the next frontier in formal verification. 4 - Bernd Finkbeiner, Markus N. Rabe:

Verifying hyperproperties of hardware systems. 5 - Pranav Ashar:

A paradigm shift in verification methodology. 6 - Pavol Cerný:

Program synthesis for networks. 7 - Hossein Hojjat:

The FMCAD 2016 graduate student forum. 8 - Guillaume Baudart, Timothy Bourke, Marc Pouzet:

Soundness of the quasi-synchronous abstraction. 9-16 - Roderick Bloem

, Robert Könighofer, Ingo Pill, Franz Röck:
Synthesizing adaptive test strategies from temporal logic specifications. 17-24 - Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto

:
Reducing interpolant circuit size by ad-hoc logic synthesis and SAT-based weakening. 25-32 - Brian Campbell

, Ian Stark:
Extracting behaviour from an executable instruction set model. 33-40 - Dan R. Ghica, Achim Jung:

Categorical semantics of digital circuits. 41-48 - Eugene Goldberg:

Equivalence checking by logic relaxation. 49-56 - Ofer Guthmann, Ofer Strichman

, Anna Trostanetski:
Minimal unsatisfiable core extraction for SMT. 57-64 - Yen-Sheng Ho, Pankaj Chauhan, Pritam Roy, Alan Mishchenko, Robert K. Brayton:

Efficient uninterpreted function abstraction and refinement for word-level model checking. 65-72 - Hossein Hojjat, Philipp Rümmer, Jedidiah McClurg, Pavol Cerný, Nate Foster:

Optimizing horn solvers for network repair. 73-80 - Susmit Jha, Vasumathi Raman, Sanjit A. Seshia:

On ∃ ∀ ∃! solving: A case study on automated synthesis of magic card tricks. 81-84 - Dejan Jovanovic, Bruno Dutertre:

Property-directed k-induction. 85-92 - Guy Katz, Clark W. Barrett

, Cesare Tinelli
, Andrew Reynolds, Liana Hadarean:
Lazy proofs for DPLL(T)-based SMT solvers. 93-100 - Opeoluwa Matthews, Jesse D. Bingham, Daniel J. Sorin:

Verifiable hierarchical protocols with network invariants on parametric systems. 101-108 - Kenneth L. McMillan:

Modular specification and verification of a cache-coherent interface. 109-116 - Alain Mebsout, Cesare Tinelli

:
Proof certificates for SMT-based model checkers for infinite-state systems. 117-124 - Alexander Nadel

:
Routing under constraints. 125-132 - Matthew Naylor, Simon W. Moore, Alan Mujumdar:

A consistency checker for memory subsystem traces. 133-140 - Pavel Parízek

:
Hybrid partial order reduction with under-approximate dynamic points-to and determinacy information. 141-148 - David L. Rager, Jo C. Ebergen, Dmitry Nadezhin, Austin Lee, Cuong Kim Chau, Ben Selfridge:

Formal verification of division and square root implementations, an Oracle report. 149-152 - Jaideep Ramachandran, Thomas Wahl:

Integrating proxy theories and numeric model lifting for floating-point arithmetic. 153-160 - Alastair Reid

:
Trustworthy specifications of ARM® v8-A and v8-M system level architecture. 161-168 - Amr A. R. Sayed-Ahmed, Daniel Große

, Mathias Soeken, Rolf Drechsler
:
Equivalence checking using Gröbner bases. 169-176 - Karsten Scheibler

, Felix Neubauer, Ahmed Mahdi, Martin Fränzle, Tino Teige, Tom Bienmüller, Detlef Fehrer, Bernd Becker
:
Accurate ICP-based floating-point reasoning. 177-184 - Rohit Singh, Armando Solar-Lezama

:
SWAPPER: A framework for automatic generation of formula simplifiers based on conditional rewrite rules. 185-192 - Ermenegildo Tomasco, Truc L. Nguyen, Omar Inverso

, Bernd Fischer
, Salvatore La Torre, Gennaro Parlato
:
Lazy sequentialization for TSO and PSO via shared memory abstractions. 193-200 - Tomoya Yamaguchi, Tomoyuki Kaga, Alexandre Donzé, Sanjit A. Seshia:

Combining requirement mining, software model checking and simulation-based verification for industrial automotive systems. 201-204

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