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ORCID5th ICECS 1998: Lisbon, Portugal
- 5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998. IEEE 1998, ISBN 0-7803-5008-1
Volume 1
- John Malcolm Wilkinson:
Worldwide trends in the microsystems industry, technology and markets. 3-7 - Refet Ramiz, Filiz Günes:
General design method for the filters based on the requirements and a filter design chart. 11-14 - Takehisa Ueda, Naoyuki Aikawa, Masamitsu Sato:
Design method of analog lowpass filters with monotonic response and arbitrary flatness. 15-18 - Karel Hájek, Jirí Sedlácek:
Design of optimum high order crossover coefficients. 19-22 - I-Hung Khoo, Hari C. Reddy, George S. Moschytz:
Study of low sensitivity property of delta operator based sampled-data filters. 23-26 - Qiuting Huang:
The design of a direct-conversion paging receiver quadrature converter for wrist watch applications. 29-32 - Henrique José da Silva, Maria João Rosário:
Monolithic feedback LNA for active antenna simultaneously input port signal and noise matched. 33-36 - Martin T. Hill, Antonio Cantoni:
An integrated narrow band, high resolution synthesizer. 37-40 - Fernando Fortes
, Maria João Rosário:
Design of low voltage BiCMOS power amplifiers for wireless communications. 41-44 - Anders Berkeman, Viktor Öwall, Mats Torkelson:
A complex multiplier with low logic depth. 47-50 - Angus Wu, K. C. Tang, C. K. Ng:
Pipelined modified Booth multiplication. 51-54 - Antonio García, Antonio Lloris-Ruíz:
Pipelined RNS multipliers: an application to scaling. 55-58 - Vassilis Paliouras, J. Karagiannis, G. Aggouras, Thanos Stouraitis:
A very-long instruction word digital signal processor based on the logarithmic number system. 59-62 - António Navarro, P. Silva, P. Ribau, R. Silva, J. Figueiredo, J. Matos, Atílio Gameiro:
Base station transceiver design in a digital wireless local loop system. 65-68 - Ewa Sokolowska, Guillaume Fortin, Nacer Belabbes, Mathieu Gagnon, Bozena Kaminska:
Scalable pseudo-optical switching system for multi-protocol environment. 69-72 - Yichuang Sun, Wai Kit Lau:
Evolutionary tuning method for automatic impedance matching in communication systems. 73-77 - Oscar Guerra, Juan D. Rodríguez-García, Elisenda Roca, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
A simplification before and during generation methodology for symbolic large-circuit analysis. 81-84 - Agnieszka Konczykowska, Wlodek M. Zuberek:
Methods and tools for characterisation of semiconductor device models. 85-88 - Wim Verhaegen, Georges G. E. Gielen:
Efficient symbolic analysis of analog integrated circuits using determinant decision diagrams. 89-92 - Luís Guerra e Silva, João P. Marques Silva, Luís Miguel Silveira, Karem A. Sakallah:
Timing analysis using propositional satisfiability. 95-98 - Hoan H. Pham, Arokia Nathan:
A new formulation for accurate numerical extraction of interconnect capacitance in ULSI. 99-102 - Takayuki Watanabe, Hideki Asai:
Transient analysis for high-speed interconnect networks based on AWE and delay evaluation technique. 103-106 - Peter Wellig, George S. Moschytz:
Analysis of wavelet features for myoelectric signal classification. 109-112 - C. Guetbi, Denis Kouamé, Abdeldjalil Ouahabi, J.-P. Chemla:
Methods based on wavelets for time delay estimation of ultrasound signals. 113-116 - Raquel Gómez-Sánchez, Diego Andina, Joaquin Torres:
Speech compression with wavelet packets. 117-120 - Datian Ye, Yu Cao, Qin Gong:
Wavelet analysis method for processing and recognition of abdominal fetal ECG waveform. 121-124 - Serdar Özoguz, Cevdet Acar:
On the current-mode current conveyor-based high-order filter realisations. 127-130 - Serdar Özoguz, Ece Olcay Günes, Hassan O. Elwan, Tuna B. Tarim:
CCII-based balanced fully integrated continuous-time filter synthesis: signal-flow graph approach. 131-133 - Yichuang Sun, Barry Jefferies:
Current-mode biquadratic filters using dual output current conveyors. 135-138 - Pedro A. Martínez, Concepción Aldea, Justo Sabadell, Santiago Celma:
Approach to the realization of state variable based oscillators. 139-142 - Takashi Kurashina, Satomi Ogawa, Kenzo Watanabe:
A high performance class AB current conveyor. 143-146 - Ellie Cijvat, Patrik Eriksson, N. Tan, Hannu Tenhunen:
A 1.8 GHz subsampling CMOS downconversion circuit for integrated radio applications. 149-152 - Chung-Yu Wu, Jeng Gong, Yu Cheng:
The design of 2 V 1 GHz CMOS low-noise bandpass amplifier with good temperature stability and low power dissipation. 153-156 - R. Akbari-Dilmaghani, Alison J. Payne, Christofer Toumazou:
A high Q RF CMOS differential active inductor. 157-160 - Kari Stadius, Risto Kaunisto, Veikko Porra:
A high frequency harmonic VCO with an artificial varactor. 161-164 - Kong-Pang Pun, José E. Franca, Carlos Azeredo Leme:
Basic principles and new solutions for analog sampled-data image rejection mixers. 165-168 - J. H. Lou, James B. Kuo:
1.5 V CMOS bootstrapped dynamic logic circuit techniques (BDLCT) suitable for low-voltage deep-submicron CMOS VLSI for implementing 482 MHz digital quadrature modulator and adder. 171-174 - Juraj Povazanec, Chiu-Sing Choy, Cheong-Fat Chan:
Asynchronous logic in bit-serial arithmetic. 175-178 - Raúl Jiménez, Antonio J. Acosta, Angel Barriga, Manuel J. Bellido, Manuel Valencia:
Efficient self-timed circuits based on weak NMOS-trees. 179-182 - R. T. Lara Sáez, Maher Kayal, Michel J. Declercq, M. C. Schneider:
An overview of the current steering logic (CSL): from the gate to the applications. 183-186 - Agnieszka Konczykowska, Mounir Meghelli:
Very high speed integrated circuits for optical communication. 189-192 - Paulo P. Monteiro, Mário J. N. Lima, José Ferreira da Rocha, António L. J. Teixeira, B. Franz, Berthold Wedding:
An electrically adjustable equalizer for very high bit rate transmission systems based on dispersion supported transmission. 193-196 - Risto Kaunisto, Kari Stadius, Veikko Porra:
A 3 GHz silicon-BJT active resonator and filter. 197-200 - José Carlos Pedro, Luís Ramos Gomes, Nuno Borges Carvalho:
Design techniques for highly efficient class-F amplifiers driven by low voltage supplies. 201-204 - Mário J. N. Lima, Paulo P. Monteiro, José Ferreira da Rocha, António L. J. Teixeira, J. Nuno Matos:
Design of clock-recovery GaAs ICs for high-speed communication systems. 205-208 - M. Helena Fino, L. J. Mourão:
SymbSI-a program for the symbolic signal flow graph generation of switched current circuits. 211-214 - Weibiao Zhang, Huimin Xia, Raed Al-Omari, Marwan M. Hassoun:
Symbolic synthesis of analog-to-digital conversion architectures using direct-mapping techniques. 215-218 - Jorge Guilherme, Nuno C. G. Horta, José E. Franca:
Symbolic synthesis of non-linear data converters. 219-222 - Idoia Aguirre, Alfonso Carlosena:
A symbolic expressions approximation method based on fully symbolic conditions. 223-226 - Ricardo Jorge Machado, João Miguel Fernandes, Alberto José Proença:
Hierarchical mechanisms for high-level modeling and simulation of digital systems. 229-232 - K. Kapp, Markus Bühler, D. Dallmann, Utz G. Baitinger:
TESA: Timeparallel Estimation of Switching Activity under a real delay model. 233-236 - Jose Miguel Vieira dos Santos, José Manuel Martins Ferreira:
Fault-tolerance: new trends for digital circuits. 237-240 - Mustapha Slamani, Maddi Zineb, Mounir Boukadoum:
A DSP testing approach by modeling the circuit response as a Markov chain. 241-247 - Jongdae Park, Jinwoo Son, Heedon Seo, M. Ishida:
4-subject 4-channel optical telemetry system for use in electrocardiograms. 251-254 - Nuno J. Oliveira, Paulo P. Freitas:
Spin-valve tape heads. 255-258 - Stephan Fahlbusch, Sergej Fatikow:
Force sensing in microrobotic systems - an overview. 259-262 - Arlindo Rodrigues Filho, Alexandre da Cunha Dias:
Surveying the pipeline temperature and pressure profile using an in-line acquisition tool. 263-266 - Paulo P. Freitas, Fernando B. Silva, Luis V. Melo, Jose L. Costa, Nuno Almeida, J. Bernardo:
Giant magnetoresistive sensors for rotational speed control and current monitoring applications. 267-269 - Luís F. F. Brito Palma, Adelino R. Ferreira da Silva:
A virtual instrumentation support system. 273-276 - Chung-Yu Wu, Wen-Cheng Yen:
The neuron-bipolar junction transistor (v-BJT)-a new device structure for VLSI neural network implementation. 277-280 - Young-Chul Kim, Deung-Ku Kang, Tae-Won Lee:
RISC-based coprocessor with a dedicated VLSI neural network. 281-283 - Víctor M. Brea, David López Vilariño, Diego Cabello:
An analog CMOS realisation of a reconfigurable discrete-time cellular neural network. 285-288 - Sigbjørn Næss, Tor Sverre Lande:
Low-power macro-cells for pulse code arithmetic. 289-292 - Nicolás J. Medrano-Marqués, Bonifacio Martín-del-Brío:
General purpose neuroemulator architecture: design and VHDL simulation. 293-296 - Bonifacio Martín-del-Brío, Nicolás J. Medrano-Marqués, Sergio Hernández-Sánchez:
A low-cost neuroprocessor board for emulating the SOFM neural model. 297-300 - Yoshihiko Horio, Hidekazu Yasuda, Mitsuru Hanagata, Kazuyuki Aihara:
An asynchronous pulse neural network model and its analog IC implementation. 301-304 - Tomasz Kacprzak:
Multiple-input transconductance CMOS amplifier for implementation in continuously programmable cellular neural networks. 305-308 - Loreto Rodríguez-Pardo, María José Moure, María Dolores Valdés, Enrique Mandado:
A computer assisted learning tool for electronic design training. 309-312 - Luís F. F. Brito Palma, Adelino R. Ferreira da Silva:
Remote control of a DC motor using infra-red radiation. 313-316 - M. J. Sharifi, Akbar Adibi:
Software lab for semiconductor device characterization. 317-320 - Eduard Bertran, Francesc Tarres, Gabriel Montoro:
An experimental course on digital communications. 321-324 - Tania Vassileva, Vassilliy Tchoumatchenko, Ilario Astinov, Ivan Furnadjiev:
Virtual VHDL laboratory. 325-328 - José Alberto Fonseca, Alexandre Mota, Fernando Santos, Pedro Fonseca, José Luís Azevedo, José Luis Cura:
Affordable tools for teaching embedded systems. 329-332 - Alan John Crispin, L. Ibrani, G. E. Taylor, G. Waterworth:
High performance trajectory control using a neural network cross-coupling gain scheduler. 333-336 - Justo Sabadell, Concepción Aldea, Santiago Celma, Pedro A. Martínez:
A low-voltage high-frequency integrator for CMOS continuous-time current-mode filters. 339-342 - Louis Luh, John Choma Jr., Jeffrey Draper:
A high-speed fully differential current switch. 343-346 - Louis Luh, John Choma Jr., Jeffrey Draper:
A continuous-time common-mode feedback circuit (CMFB) for high-impedance current mode application. 347-350 - Markus Helfenstein, José E. Franca, George S. Moschytz:
Exact design of multirate switched-current FIR filters with improved phase linearity. 351-354 - Andrew E. J. Ng, John I. Sewell:
Switched-current elliptic decimators based on bilinear-transformed ladder structures. 355-358 - Khayrollah Hadidi, K. Eguchi, Takashi Matsumoto, Haruo Kobayashi:
A highly linear second-order stage for 500-MHz third-order and fifth-order filters. 361-364 - M. Morimoto, Khayrollah Hadidi, K. Futami, T. Matsumoto:
A novel design technique for input differential pairs in single-ended operational amplifiers. 365-368 - Khayrollah Hadidi, Jafar Sobhi-Gheshlaghi, A. Hasankhaan, Daigo Muramatsu, Takashi Matsumoto:
A novel highly linear CMOS buffer. 369-371 - Khayrollah Hadidi, Mahta Jenabi, Jafar Sobhi-Gheshlaghi, A. Hasankhaan:
A 300 MHz 18 dB variable gain amplifier. 373-375 - Kamran Eshraghian:
Design methodology and performance estimation for complementary gallium arsenide. 379-383 - Juan A. Montiel-Nelson, Valentin de Armas, Roberto Sarmiento, Antonio Núñez:
OLYMPO: a GaAs compiler for VLSI design. 385-388 - Jean Hourany, Joseph Bellaiche, Jean-Pierre André, Etienne Delhaye:
Recent advances in 40 Gb/s digital functions for high bit rate telecommunication applications. 389-392 - Andreas Brennemann, E. Bushehri, W. Daumann, M. Agethen, R. M. Bertenburg, Wolfgang Brockerhoff, V. Staroselsky, Vladimir Bratov, Thomas Schlichter, Franz-Josef Tegude:
InP-based logic gates for low power monolithic optoelectronic circuits [InGaAs/InAlAs/InP]. 393-396 - Derek Abbott, Said F. Al-Sarawi, B. Gonzalez, José Francisco López, J. Austin-Crowe, Kamran Eshraghian:
Neu-MOS (νMOS) for smart sensors and extension to a novel neu-GaAs (νGaAs) paradigm. 397-404 - Markus Brandstetter, Torsten Harms, Helmut Reinig, Michael Vanrompay:
Codevelopment of long haul ISDN transceiver and design methodology improves time to market. 407-410 - Eduardo de Vasconcelos, Rui L. Aguiar, Dinis M. Santos:
A 0.7 μm CMOS clock recovery circuit for 622 Mb/s SDH systems. 411-414 - R. Furness, Mohammed Benaissa, Sebastian T. J. Fenn:
Circuit architectures for semi-bit-serial & programmable arithmetic in finite fields. 415-418 - Jorge A. Polar Seminario, Carlos A. dos Reis Filho:
FPGA prototype of a serial interface circuit. 419-422 - Les T. Walczowski, Keith R. Dimond, W. A. J. Waller:
A digital engineering curriculum with integrated, Windows-based EDA tools. 425-428 - Bonifacio Martín-del-Brío, Carlos Bernal Ruiz:
Visual 11: a software tool for learning microcontroller fundamentals. 429-432 - Alexandre Mota, José Alberto Fonseca, Fernando Santos:
Low cost data acquisition systems based on standard interfaces. 433-437 - Francesc Tarres, Eduard Bertran, Gabriel Montoro, Ana B. de Souza:
An application oriented short-course in image recognition. 439-442 - Raul Carneiro Martins, Helena Maria Geirinhas Ramos, Pedro Silva Girão, António Cruz Serra:
Taxonomic problems on ADC characterisation. 445-448 - Diego Bellan, Arnaldo Brandolini, Alessandro Gandelli:
Effects of ADC nonlinearities in sine-wave amplitude measurement. 449-452 - Giovanni Chiorboli, Barbara De Salvo, Giovanni Franco, Carlo Morandi:
Some thoughts on the word error rate measurement of A/D converters. 453-456 - Raul Carneiro Martins, António Manuel da Cruz Serra:
The use of a noise stimulus in ADC characterization. 457-460 - Vladimír Haasz, Jaroslav Roztocil:
Testing of dynamic quality of AD modules with standard interfaces and problems connected with it. 461-464 - R. Herzer, E. Schimanek, Christoph Bokeloh, J. Lehmann:
A universal smart control IC for high-power IGBT applications. 467-470 - Jose Luis Mora, Eduardo Galvan, Francisco Colodro, Federico Barrero, Jonathan Noel Tombs, M. Barranco, Antonio Torralba, Leopoldo García Franquelo:
ASITRON: ASIC for vectorial control of induction motors and speed regulation using fuzzy-logic. 471-475 - Domenico Rossi:
New emerging applications for smart power integrated circuits: technologies implications and new design techniques. 477-484 - Jonathan Living, Bashir M. Al-Hashimi, M. Moniri:
High performance distributed arithmetic FPGA decimators for video-frequency applications. 487-490 - Tsuyoshi Takebe, Toyoji Matsumoto, Shuitsu Matsumura, Kyoko Kato:
Design of equiripple stopband even and odd order linear phase IIR filters. 491-494 - Adrian Burian, Corneliu Rusu, Pauli Kuosmanen:
Efficient realization of the M-D nonrecursive filters: from sequential implementation to mapping on systolic array processors. 495-498 - Leonel Augusto Sousa:
Bidirectional systolic arrays for digital recursive filters. 499-502 - Angus Wu, Man F. So:
An efficient VLSI implementation of four-step search algorithm. 503-506 - António Teixeira, Francisco A. C. Vaz, José Carlos Príncipe:
Some studies of European Portuguese nasal vowels using an articulatory synthesizer. 507-510 - I. Singh, Panajotis Agathoklis, Andreas Antoniou:
Image compression using a mixed-transform technique and vector quantization. 511-514 - J. Jiang, C. V. Brett:
CAM based real-time lossless image compression. 515-518 - Vassilis E. Fotopoulos, Athanassios N. Skodras:
sMAE: an improved block matching criterion. 519-522 - Mostafa A. Ibrahim, Abdel-Wahab F. Hussein, Samia A. Mashali, Ahmed H. Mohamed:
A blind image restoration system using higher-order statistics and Radon transform. 523-530 - José M. Bioucas-Dias, José M. N. Leitão:
Group lapped iterative technique for fast solution of large linear systems. 531-534 - Francisco José Mora Mas, Angel Sebastiá:
Electronic design of a high performance interface to the SCI network. 535-538 - Sergio Curinga:
Use of a statistical model for lip synthesis. 539-541 - Marcos Faúndez-Zanuy, Francesc Vallverdú, Enric Monte:
Efficient nonlinear prediction in ADPCM. 543-546 - Carmen Peláez-Moreno, Izzet Kale, Armando Malanda:
Speech coding via Balanced Model Truncation-a novel approach. 547-551 - Vojko Pahor:
A fuzzy synchronization algorithm for bimodal speech signals. 553-556 - T. K. Bysted:
Frequency-shift: a way to reduce aliasing in the complex cepstrum. 557-560
Volume 2
- Peter Pirsch, Hans-Joachim Stolberg:
VLSI architectures for multimedia. 3-11 - Lauri Sumanen, Mikko Waltari, Kari Halonen:
A 10-bit high-speed low-power CMOS D/A converter in 0.2 mm2 . 15-18 - Jin-Sheng Wang, Chin-Long Wey:
High-speed CMOS switched-current D/A converters for low-power/low-voltage signal processing applications. 19-22 - Augusto Manuel Marques, José Bastos, Michiel Steyaert, Willy Sansen:
A current steering architecture for 12-bit high-speed D/A converters. 23-26 - Bengt E. Jonsson:
A 3 V, 10 bit, 6.4 MHz switched-current CMOS A/D converter design. 27-30 - Piero Malcovati, Franco Maloberti, Maurizio Terzani:
An high-swing, 1.8 V, push-pull opamp for sigma-delta modulators. 33-36 - Chi-Hung Lin, Mohammed Ismail:
A 1.8 V low-power CMOS high-speed four quadrant multiplier with rail-to-rail differential input. 37-40 - Manfred Punzenberger, Christian C. Enz:
Log-domain filters for low-voltage low-power applications. 41-44 - Giuseppe Ferri, Alfredo Costa, Andrea Baschirotto:
A 1.2 V rail-to-rail switched buffer. 45-48 - Johann-Friedrich Luy, Bernd Adelseck:
Silicon MMICs for millimeter wave communication links. 51-54 - Mehran Mokhtari, Urban Westergren, Bo Willén, Thomas Swahn, William E. Stanchina:
InP-HBT-based VHSICs and OEICs for optical fiber communication systems. 55-58 - M. Shaalan, M. Bozzi, J. Weinzierl, H. L. Hartnagel:
An approach towards understanding an open-structure frequency-doubler. 59-63 - Arturo Sarmiento-Reyes, Rafael Vargas-Bernal, Eduard Kleihorst:
A topological approach for determining the uniqueness of the DC solution. 67-70 - Michal Tadeusiewicz:
Modeling and stability in MOS transistor circuits. 71-74 - Lubomir V. Kolev, Valeri M. Mladenov:
A linear programming implementation of a interval method for global non-linear DC analysis. 75-78 - Izzet Cem Göknar, Neslihan Serap Sengör:
Discrete-time version of Kalman-Yacubovitch-Popov lemma for non-linear systems. 79-82 - João M. P. Cardoso, Horácio C. Neto:
Towards an automatic path from JavaTM bytecodes to hardware through high-level synthesis. 85-88 - Klaus Feske, Steffen Rülke, Manfred Koegst:
FPGA based prototyping using a target driven FSM partitioning strategy. 89-92 - Malgorzata Chrzanowska-Jeske, Yang Xu:
Variable ordering for regular layout representation. 93-96 - João Canas Ferreira, José Silva Matos:
Mixed hardware/software applications on dynamically reconfigurable hardware. 97-100 - Thomas L. Carroll, Louis M. Pecora:
Using multiple attractor chaotic systems for communication. 103-106 - Andreas Abel, Marco Götz, Wolfgang Schwarz:
An analysis method for the performance comparison of communication systems. 107-110 - Hervé Dedieu, Maciej J. Ogorzalek:
Using nonlinear dynamics to improve the noise performance of chaos communication systems. 111-114 - Hiroyuki Torikai, Toshimichi Saito:
Chaotic pulse-train separation and multiplex communication. 115-118 - Maria del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee:
Automated design of folded-cascode op-amps with sensitivity analysis. 121-124 - José A. Soares Augusto, C. F. Beltrá Almeida:
Circuit equations for fast fault simulation and diagnosis of linear circuits. 125-128 - Nuno Borges de Carvalho, José Carlos Pedro:
Non-linear circuit simulation of complex spectra in the frequency domain. 129-132 - Luis Hernandez, Alejandro Quesada:
Programmable sine wave generator employing a mismatch-shaping DAC. 135-138 - Michael Mojal:
Multi bit DAC with corrective gate to drain voltage for optimum matching under gradient temperature effects. 139-142 - Omid Oliaei:
High-speed A/D and D/A converters using hybrid filter banks. 143-146 - Steve Tanner, Alexandre Heubi, Michael Ansorge, Fausto Pellandini:
An 8-bit low-power ADC array for CMOS image sensors. 147-150 - Jose P. Moreira, Chris J. M. Verhoeven:
Implementation of maximum dynamic range integrators. 153-156 - Yichuang Sun, J. Kel Fidler:
Fully-balanced structures of continuous-time MLF OTA-C filters. 157-160 - Tim Bakken, John Choma Jr.:
Stability of a continuous-time state variable filter with ORA-L and current amplifier integrators. 161-164 - Chi-Hung Lin, Tales C. Pimenta, Mohammed Ismail:
A low-voltage low-power CMOS V-I converter with rail-to-rail differential input for filtering applications. 165-168 - Sergio A. Solis-Bustos, José Silva-Martínez:
A 4 Hz low-pass continuous-time filter. 169-172 - Maria Luisa de la Fuente, Joaquín Portilla, Eduardo Artal:
Low noise Ku-band drain mixer using P-HEMT technology. 175-178 - Michael Pierschel, Wolfgang Winkler, Matthias Rossberg:
RF circuits fabricated with CMOS-compatible SiGe HBT process module. 179-182 - Joaquín Portilla, Juan Pablo Pascual, Héctor García, Eduardo Artal:
High-performance monolithic amplifiers in low microwave bands using GaAs MESFET technology. 183-186 - Giovanni Di Bernardo, Mario Lavorgna, Luigi G. Occhipinti:
Extended CNN topologies and VLSI implementations. 189-190 - Ari Paasio, Asko Kananen, Kari Halonen, Veikko Porra:
A 48 by 48 CNN chip operating with B/W images. 191-194 - Mario Salerno, Fausto Sargeni, Vincenzo Bonaiuto:
High performance interconnection architecture for large cellular neural networks. 195-198 - Ákos Zarándy, Péter Keresztes, Tamás Roska, Péter Szolgay:
CASTLE: an emulated digital CNN architecture; design issues, new results. 199-202 - Servando Espejo, Rafael Domínguez-Castro, Gustavo Liñán, Ángel Rodríguez-Vázquez:
A 64×64 CNN universal chip with analog and digital I/O. 203-206 - André Neubauer:
Genetic algorithms for adaptive non-linear predictors. 209-212 - Marcello L. R. de Campos, J. A. Apolinário Jr., Paulo S. R. Diniz:
Colored input-signal analysis of normalized data-reusing LMS algorithms. 213-216 - Ilan Druckmann, Eugene I. Plotkin, M. N. S. Swamy:
An expanded MFBLP method with reduced computational complexity for estimating sinusoids frequencies. 217-220 - Juan E. Cousseau, Paulo S. R. Diniz, Guillermo B. Sentoni, Osvaldo E. Agamennoni:
An orthogonal adaptive IIR realization for efficient MSOE optimization. 221-224 - Daehee Kim, Yo-Sung Ho:
Blocking effect reduction based on optimal filtering. 225-228 - Gianluca Setti, Gianluca Mazzini, Riccardo Rovatti:
Gaussian characterization of self-interference during synchronization of chaos based DS-CDMA systems. 231-234 - Christopher P. Silva, Albert M. Young:
Progress towards a microwave chaotic communications system: triumphs and tribulations in realizing broadband high-frequency chaotic oscillators. 235-238 - Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez, Veikko Porra:
Design considerations for a linear modulation DCSK chaos-based radio. 239-242 - C. Williams:
A robust chaotic communications system based on generalised synchronisation. 243-246 - Zhu Zheng:
Application of distributed control unit (DCU) in machine control area. 249-252 - María Dolores Valdés, María José Moure, L. Rodríguez, Enrique Mandado:
Reducing the designing time of configurable interfaces oriented to control applications. 253-257 - Renato Nunes, José Delgado:
An architecture for a home automation system. 259-262 - José Rufino, Nuno Pedrosa, José Monteiro, Paulo Veríssimo, Guilherme Arroz:
Hardware support for CAN fault-tolerant communication. 263-266 - J. Norberto Pires, José M. G. Sá da Costa:
Running an industrial robot from a typical personal computer. 267-270 - Ming-Dou Ker, Tung-Yang Chen, Chung-Yu Wu:
CMOS on-chip ESD protection design with substrate-triggering technique. 273-276 - Jiansheng Xu, Yisong Dai:
The effects of the imported spectral correlative coefficient of E n-In noise model on low noise design of an amplifier. 277-281 - Oliver Hauck, Sorin A. Huss:
Asynchronous wave pipelines for high throughput datapaths. 283-286 - Massimo Alioto, Gaetano Palumbo:
Design of CML gate with the best propagation delay. 287-290 - Lotfi Samet, Nouri Masmoudi, Mohamed W. Kharrat, Lotfi Kamoun:
A digital PID controller for real time and multi loop control: a comparative study. 291-296 - Julio Faura, Ignacio Lacadena, Antonio Torralba, Josep Maria Insenser:
Programmable analog hardware: a case study. 297-300 - Luís F. F. Brito Palma, Adelino R. Ferreira da Silva:
A virtual instrumentation support system. 301-304 - Mourad Loulou, P. Riffaud-Desgreys, Philippe Marchegay, E. Garnier:
A clock-feedthrough compensated switched current integrator. 305-308 - José Luis Cura, Eduardo de Vasconcelos, Rui L. Aguiar:
A high transimpedance-bandwidth, high dynamic range, CMOS front-end for open air optical links. 309-312 - Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo:
A 1.5 V CMOS voltage multiplier. 313-316 - Ilias Gkotsis, George Souliotis, Ioannis Haritantis:
Instrumentation amplifier based analogue interface. 317-320 - Jung Hyun Choi, Sergio Bampi:
Design of CMOS OTA amplifiers and oscillators in a digital sea-of-transistors array. 321-324 - Ming-Dou Ker:
Electrostatic discharge protection circuits in CMOS IC's using the lateral SCR devices: an overview. 325-328 - Ari Vauhkonen, Esa Tarvainen:
Inductors allow low-voltage performance for IC mixers. 329-332 - Tor Sverre Lande, Yngvar Berg:
Ultra low voltage transconductance amplifier. 333-336 - Yehea I. Ismail, Eby G. Friedman, José Luis Neves:
Transient power in CMOS gates driving LC transmission lines. 337-340 - Hassan O. Elwan, Mohammed Ismail:
Low voltage digitally controlled dB-linear CMOS VGA circuit for wireless communication. 341-344 - João Canas Ferreira, José Carlos Alves, Célio Albuquerque, José Fernando Oliveira, José Soeiro Ferreira, José Silva Matos:
Flexible hardware acceleration for nesting problems. 345-348 - Omid Oliaei, Hassan Aboushady:
Jitter effects in continuous-time ΣΔ modulators with delayed return-to-zero feedback. 351-354 - Jesper Steensgaard:
Nonlinearities in SC delta-sigma A/D converters. 355-358 - José Fernando Silva:
PWM audio power amplifiers: sigma delta versus sliding mode control. 359-362 - Per Asbeck Nielsen, Carsten Fallesen:
Double modulation scheme for switching mixers controlled by sigma-delta modulators. 363-366 - Letizia Lo Presti, Adnan Akhdar:
Efficient antialiasing decimation filter for ΔΣ converters. 367-370 - José L. Ausín, Guido Torelli, Juan Francisco Duque-Carrillo, Juan M. Carrillo, Pilar Merchán:
Programmable time-multiplexed SC filters without dynamic range degradation. 373-376 - José Manoel de Seixas, Augusto Santiago Cerqueira, Luiz Pereira Calôba:
A high-performance active adder. 377-380 - Alejandro Díaz-Sánchez, Jaime Ramírez-Angulo, Antonio Lopez, Edgar Sánchez-Sinencio:
A parallel analog median filter. 381-384 - Tomás Oliveira e Silva:
On the design of linear-in-the-parameters adaptive filters. 385-388 - Seng-Pan U, Rui Paulo Martins, José E. Franca:
A novel half-band SC architecture for efficient analog impulse sampled interpolation. 389-393 - A. Mäkynen, Juha Kostamovaara:
An application-specific PSD implemented using standard CMOS technology. 397-400 - Jugdutt Singh:
High speed multi-channel data acquisition chip. 401-404 - Charalampos Kapnistis, Konstantinos Misiakos, Nikos Haralabidis:
A mixed signal CMOS readout chain for imaging spectroscopic pixel X-ray detectors. 405-408 - Manuel Mota, Jorgen Christiansen:
A four channel, self-calibrating, high resolution, time to digital converter. 409-412 - Erfaan Sharif, Tony Dorey, Andrew Richardson:
An integrated diagnostic reconfiguration (IDR) technique for fault tolerant mixed signal microsystems. 413-416 - Riccardo Rovatti, Eleonora Franchi, Nicolò Manaresi, Alberto Bellini, Marco Tartagni:
Analog implementation of gamma-correction for CMOS cameras. 419-422 - Fernando Vidal-Verdú, Rafael Navas-González, Ángel Rodríguez-Vázquez:
A mixed-signal fuzzy controller architecture. 423-426 - Massimo Conti, Simone Orcioni, Claudio Turchetti:
A current-mode neuro-fuzzy network. 427-430 - Angel Barriga, Raouf Senhadji, Carlos Jesús Jiménez-Fernández, Iluminada Baturone, Santiago Sánchez-Solano:
A design methodology for application specific fuzzy integrated circuits. 431-434 - Mario Lavorgna, Luigi G. Occhipinti, Giovanni Di Bernardo, Riccardo Caponetto, Luigi Fortuna:
Cellular fuzzy processors: new architectures to explore complexity in locally interconnected systems. 435-438 - Zhongfu Ye, Pak-Chung Ching, Kon Max Wong:
A novel technique for the blind estimation of a channel matrix. 441-444 - João Gomes, Victor Barroso:
A multichannel lattice algorithm for real-time blind equalization. 445-448 - Hichem Besbes, Meriem Jaïdane-Saïdane, Jelel Ezzine:
Exact analysis of the tracking capability of time-varying channels: the finite alphabet inputs case. 449-452 - Sofia Ben Jebara, Meriem Jaïdane-Saïdane:
Comparison of based adaptive predictive schemes for improvement of tracking randomly time-varying systems. 453-456 - Monia Turki, Meriem Jaïdane-Saïdane:
A finite memory non stationary LMS algorithm for adaptive tracking Markovian time-varying channel. 457-460 - J. G. An, J. S. Shim, Y. M. Kim, Mike Myung-Ok Lee:
50 MHz high-speed and 5 W low-power real-time programmable video multi processor (VMP) for MPEG-2 MP@ML on 0.6 μm TLM CMOS technology. 463-466 - Massimo Bombana, Nikolay Fominykh, Giulio Gorla, Alexander Kriajev, Boris Krivosheyin, Juri Rytchagov:
IP-based design of custom field programmable network processors. 467-471 - Vassilis Paliouras, Konstantina Karagianni, Thanos Stouraitis:
A VLSI architecture for fast and accurate floating-point sine/cosine evaluation. 473-476 - S. Philip, Fabrice Monteiro, Abbas Dandache, Bernard Lepley:
A high-speed parallel DSP architecture dedicated to digital modem applications. 477-480 - Richard Forsyth, Andreas Gierlinger, Erwin Ofner:
Gepard: a parameterisable digital signal processor. 481-484 - Jan Ogrodzki:
Transient analysis of circuits with ideal switches using charge and flux substitute networks. 487-490 - Oscar da Costa Gouveia-Filho, Ana Isabela Araújo Cunha, Márcio C. Schneider, Carlos Galup-Montoro:
A compact charge-based MOSFET model for circuit simulation. 491-494 - Samuil L. Farchy, Elissaveta Gadjeva, Todor G. Kouyoumdjiev:
Fault identification in analog-discrete circuits using general-purpose analysis programs. 495-498 - Armando S. Araújo, Adriano Carvalho, J. L. Martins de Carvalho:
A method for bipolar semiconductor device modeling implementable in circuit simulators. 499-503 - Metin Yazgi, Hakan Kuntman:
A new approach for the extraction of SPICE MOSFET Level-3 static model parameters. 505-508 - Vjaceslav Georgiev, Elissaveta Gadjeva, K. Stanchev:
Nonlinear macromodels for time-domain simulation of analog-discrete circuits. 509-512 - Berk Plathner, U. Kemper, R. Montiel, M. Brandstetter, H. Werker:
Improving design efficiency by providing models for simulation of parasitic effects of passive devices. 513-516 - Hiroshi Sagesaka, Hisashi Irii, Hideki Asai:
SPADE : analog/digital mixed signal simulator with analog hardware description language. 517-520 - Abdelkerim Zitouni, Mohamed Abid, Rached Tourki:
An arbiter synthesis approach based on arbitration scheme generation/selection for HW/SW co-design. 521-526 - Valery Sklyarov, António de Brito Ferrari:
Design and implementation of control circuits based on dynamically reconfigurable FPGA. 527-530 - Mohamed Abid:
Rapid prototyping environment for design of hardware/software electronic systems. 531-535 - D. Nalbantis, Les T. Walczowski, W. A. J. Waller:
Multiple server WWW-based synthesis of VLSI circuits. 537-540 - Mohamed Azimane, Antonio Lloris Ruiz:
New short and efficient algorithm for testing random-access memories. 541-544 - Márcio C. Schneider, Carlos Galup-Montoro, Oscar da Costa Gouveia-Filho, Ana Isabela Araújo Cunha:
A single-piece charge-based model for the output conductance of MOS transistors. 545-548
Volume 3
- Eric A. Vittoz:
Analog VLSI for collective computation. 3-6 - Jorge A. Grilo, Gabor C. Temes:
Predictive correlated double sampling switched-capacitor integrators. 9-12 - Yunteng Huang, Gabor C. Temes, Paul F. Ferguson Jr.:
Offset- and gain-compensated track-and-hold stages. 13-16 - Kazuyuki Wada, Shigetaka Takagi, Nobuo Fujii:
Reduction in output DC offset voltage of integrator-based filters. 17-20 - Gaetano Palumbo, Salvatore Pennisi:
A high-performance CMOS voltage follower. 21-24 - Wolfgang Barthel, Wolfram Budde:
An 9-GHz silicon-on-insulator CMOS amplifier. 27-30 - Matthias Vorwerk, Dietmar Eggert:
A 1.8 GHz low-noise amplifier in CMOS/SIMOX technology. 31-34 - Jürgen Oehm, Klaus Schumacher:
A highly linear operational transconductance amplifier for large signal operations. 35-38 - Ulrich Kleine, T. Pasch:
Low-voltage medium Q-SC filters for high frequency communication applications. 39-42 - Abdoul Rjoub, Odysseas G. Koufopavlou:
Low-power domino logic multiplier using low-swing technique. 45-48 - Kuo-Hsing Cheng, Yu-Kwang Yeha, Farn-Sou Lian:
Low voltage low power high-speed BiCMOS multiplier. 49-50 - Minkyu Song:
Design of a low power 54×54-bit multiplier based on a pass-transistor logic. 51-56 - Hormoz Djahanshahi, Flemming Hansen, C. André T. Salama:
High-speed ECL-compatible serial I/O in 0.35 μm CMOS. 59-62 - Rui L. Aguiar, Dinis M. Santos:
Wide-area clock distribution using controlled delay lines. 63-66 - Victor Adler, Eby G. Friedman:
A repeater timing model and insertion algorithm to reduce delay in RC tree structures. 67-70 - Dongsheng Wang, Ernest S. Kuh:
A new general connectivity model and its applications to timing-driven Steiner tree routing. 71-74 - Janusz Zarebski:
Spice simulations of DC electrothermal interactions in bipolar electronic circuits. 77-80 - Rafael Rodríguez-Macías, Ángel Rodríguez-Vázquez:
A technique for fast AC statistical analysis of analog circuits. 81-84 - Stephan Zizala, Josef Eckmüller, Helmut Gräb:
Fast calculation of analog circuits' feasibility regions by low level functional measures. 85-88 - Noélia S. C. Correia, Maria do Carmo R. Medeiros:
Optimization of WDM multihop logical topologies. 91-94 - Mitsuru Nagao, Kayo Suzuki, Akira Muraki, Hiroaki Ikeda, Yoshifumi Shimodaira, Masato Yamazaki:
Retrieval of butterfly from its sketched image utilizing image navigation directory on multimedia network. 95-98 - Moshe Porat:
Video teleconferencing in multimedia systems. 99-102 - K. C. Tang, Angus K. M. Wu, Anthony S. Fong, Derek C. W. Pao:
Integrated partition integer execution unit for multimedia and conventional applications. 103-107 - Atsushi Kamo, Hiroshi Ninomiya, Teru Yoneyama, Hideki Asai:
Neural network simulator for spatiotemporal pattern analysis. 109-112 - Kazushi Umetsu, Toshimichi Saito:
An asymmetric basis function network for approximation of dynamical systems. 113-116 - Ying Li, Jiun-Ming Deng:
WAV-a weight adaptation algorithm for normalized radial basis function networks. 117-120 - Arnold Shu-Yan Wong, Kwok-Wo Wong, Chi Sing Leung:
Combining PCA and MCA by using recursive least square learning method. 121-124 - Nuno de Figueiredo Garrido, José E. Franca:
A continuous-time area detector servo demodulator for hard disk drives. 127-130 - Vítor M. Grade Tavares, José C. Príncipe:
Towards a silicon implementation of the olfactory system. 131-134 - Saulo Finco, P. Tavares, Pedro M. Santos, A. P. Casimiro, Frank Herman Behrens, Mário Lança, Maria Inês Castro Simas:
A cost effective smart power approach with NMOS based blocks in standard CMOS technology. 135-138 - Dongwei Chen, John G. Harris:
An analog VLSI circuit implementing an orthogonal continuous wavelet transform. 139-142 - Marco Brambilla, Valentino Liberali:
Efficient implementation of multiplier-free decimation filters for ΣΔ A/D conversion. 145-148 - Jorge A. Grilo, Gabor C. Temes:
The use of predictive correlated double sampling techniques in low-voltage delta-sigma modulators. 149-152 - Augusto Manuel Marques, Valentino Peluso, Michiel Steyaert, Willy M. C. Sansen:
Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters. 153-156 - José M. de la Rosa, Andreas Kaiser, Maria Belen Pérez-Verdú:
Interactive verification of switched-current sigma-delta modulators. 157-160 - Fernando Medeiro, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez:
Practical considerations for the design of cascade multi-bit high-frequency ΣΔ modulators. 161-164 - Kaushik Roy:
Leakage power reduction in low-voltage CMOS designs. 167-173 - Christian Piguet:
Design of low-power libraries. 175-180 - José C. Monteiro:
Techniques for power management at the logic level. 181-184 - Antoni Ferré, Joan Figueras:
Characterization of leakage power in CMOS technologies. 185-188 - Javier Valls, Marcos M. Peiró, Trinidad Sansaloni, Eduardo I. Boemo:
Design and FPGA implementation of digit-serial FIR filters. 191-194 - Shyh-Jye Jou, Ya-Lan Tsao, I-Ying Yang:
An all digital phase-locked loop with modified binary search of frequency acquisition. 195-198 - Daniel Massicotte, Boubker M. Elouafay:
A systolic architecture for Kalman-filter-based signal reconstruction using the wave pipeline method. 199-202 - Mladen Berekovic, Peter Pirsch:
Architecture of a coprocessor module for image compositing. 203-206 - Sergio L. Netto, Paulo S. R. Diniz:
Designing peak-constrained arbitrary-phase FIR digital filters with low passband-to-stopband energy ratio. 207-210 - Luis Parrilla, Julio Ortega, Antonio Lloris-Ruíz:
Testability of AND-EXOR logic vs. AND-OR logic. 213-216 - Joanna Sapiecha, Krzysztof Sapiecha, Stanislaw Deniziak:
HTDD based parallel fault simulator. 217-220 - Chris D. Chalk, Mark Zwolinski:
A design for test technique to increase the resolution of analogue supply current tests. 221-224 - Matthew Worsman, Mike W. T. Wong:
Nonlinear circuit fault diagnosis with large change sensitivity. 225-228 - P. Garino, A. Finotello, M. Gandini, M. Marchisio, Martin Gumm, Friederich Mombers, Stephanie Dogimont, I. Remi:
A flexible MIMD pixel processor for high quality MPEG-2 motion and vector processing. 231-234 - Armando Malanda-Trigueros, Aníbal R. Figueiras-Vidal:
A refinement algorithm for vector quantization codebook design. 235-238 - Yong He, Ishfaq Ahmad, Ming L. Liou:
A shape-adaptive partitioning method for MPEG-4 video encoding. 239-242 - Irena Koprinska, Sergio Carrato:
Video segmentation of MPEG compressed data. 243-246 - Pedro A. Amado Assunção, Mohammed Ghanbari:
Bit rate control of internetworking video transcoders. 247-250 - Fernando D. Nunes, Jorge Santos, Maria E. Manso:
Two-layer perceptron for fast plasma density evaluation in broadband reflectometry. 253-256 - Chi-Kwong Chan, Lee-Ming Cheng:
The CHNN nonlinear combination generator. 257-260 - José Manoel de Seixas, D. O. Damázio:
A neural discriminator capable to identify impurities in the data sample. 261-264 - Stanislaw Osowski, Krzysztof Siwek:
Self-organizing neural network for fault location in electrical circuits. 265-268 - Silvia Padoan, Andrea Boni, Carlo Morandi, F. Venturi:
A novel coding scheme for the ROM of parallel ADCs, featuring reduced conversion noise in the case of single bubbles in the thermometer code. 271-274 - George I. Bourdopoulos, Aristodemos Pnevmatikakis, Theodore L. Deliyannis:
Generalized linear model for ΣΔ modulators. 275-278 - Gaetano Palumbo, Salvatore Pennisi:
A technique for the reduction of the input resistance of current-mode circuits. 279-282 - Alexandre S. de la Vega, Antônio Carlos M. de Queiroz, Paulo S. R. Diniz:
A switched-current slice of cells for adaptive filters. 283-286 - Tsung-Sum Lee, Yuh-Dong Chen:
A BiCMOS low-voltage transconductor for VHF continuous-time filters. 287-290 - Hector Recoules, Rachid Bouchakour, Patrick Loumeau:
A comparative study of two SC-CMFB networks used in fully differential OTA. 291-294 - Tuna B. Tarim, H. Hakan Kuntman, Mohammed Ismail:
Statistical design of a D/A converter based on the current division technique. 295-298 - Thomas Toifl, Paulo Moreira, Alessandro Marchioro, Pisana Placidi:
Analysis of parameter-independent PLLs with bang-bang phase-detectors. 299-302 - Luiz Lenarth Gabriel Vermaas, Carlos Renato T. de Mori, Robson L. Moreno, Adriano M. Pereira, Edgar Charry R.:
A bandgap voltage reference using digital CMOS process. 303-306 - Nobukazu Takai, Nobuo Fujii:
GaAs MESFET multi-output current mirrors and their application to high frequency filters. 307-310 - Aristides Kiranas, Yannis Papananos:
Design issues towards the integration of passive components in silicon RF VCOs. 311-314 - Pieter Rombouts, Ludo Weyten:
Dynamic element matching for pipelined A/D conversion. 315-318 - J.-Ph. Lambert, Abbas Dandache, Fabrice Monteiro, Bernard Lepley:
Design of radiofrequency stages for a high rate digital modem. 319-322 - Rami Ahola, Kari Halonen:
A 4 GHz CMOS multiple modulus prescaler. 323-326 - R. C. Sousa, T. T. Galvão, J. J. Sun, P. P. Freitas:
Spin polarized tunneling for memory cell application. 327-330 - Mihai A. T. Sanduleanu, A. J. M. van Tuijl, R. F. Wassenaar, M. C. Lammers, H. Wallinga:
A low noise, low residual offset, chopped amplifier for mixed level applications. 333-336 - Dorra Masmoudi, Wouter A. Serdijn, Jan Mulder, Albert C. van der Woerd, Jean Tomas, Jean Paul Dom:
A new current mode synthesis method for dynamic translinear filters and its application in hearing aids. 337-340 - Omid Oliaei, Patrick Loumeau:
A low-supply SI-cell using threshold control. 341-344 - Thomas Pasch, Ulrich Kleine, R. Klinke:
A low voltage differential OpAmp with novel common mode feedback. 345-348 - Jelena Popovic, Borivoje Nikolic, K. Wayne Current, Aleksandra Pavasovic, Dragan Vasiljevic:
CMOS implementation of low-power oscillators based on the modified Fabre-Normand current conveyor. 349-352 - Kimmo Lasanen, Jussi Tervaluoto, Antti Ruha, Juha Röning:
A structure for extending the linear input voltage range of a differential input stage. 355-358 - Vladimir I. Prodanov, Michael M. Green:
New CMOS universal constant-Gm input stage. 359-362 - Juan M. Carrillo, José L. Ausín, Pilar Merchán, J. Francisco Duque-Carrillo:
Feedback vs. feedforward common-mode control: a comparative study. 363-366 - Santiago Celma, F. Pérez, Pedro A. Martínez:
Simple compensation techniques for current feedback op-amps. 367-370 - Brett Wilson:
Voltage amplification using a transconductance feedback amplifier. 371-374 - Sergio Callegari, Gianluca Setti:
Cell biasing and balancing in E-cell based single-ended log filters. 377-380 - Jie Wu, Ezz I. El-Masry:
Synthesis of follow-the-leader feedback log-domain filters. 381-384 - Emmanuel M. Drakakis, Alison J. Payne:
Leapfrog log-domain filters. 385-388 - Antonio López, Alfonso Carlosena:
The exponential CCII-, a building block for log-domain circuits. 389-392 - Solon Despotopoulos, Emmanuel M. Drakakis, Christofer Toumazou:
An investigation of log domain current feedback amplifiers. 393-396 - Rui J. P. de Figueiredo:
A generalized spline framework for mixed mode signal processing. 399-400 - Ewa Hermanowicz:
A nearly optimal variable fractional delay filter with extracted Chebyshev window. 401-404 - Rajeev Gandhi, Sanjit K. Mitra:
A new approach to the design of two-channel perfect reconstruction filter banks. 405-408 - A. Lee, Majid Ahmadi, Reza S. Lashkari:
Design of stable 2-D recursive filters using power-of-two coefficients. 409-412 - Carlos Romero, José I. Acha, Joaquín Madrid:
Multirate structures for very fast narrow-band digital filtering. 413-416 - Marcelino B. Santos, Fernando M. Gonçalves, Michael J. Ohletz, João Paulo Teixeira:
Defect-oriented testing of analogue and mixed signal ICs. 419-424 - Andrew Richardson, Andreas Lechner, Thomas Olbrich:
Design for testability strategies for mixed signal & analogue designs-from layout to system. 425-432 - Ian M. Bell, Stephen J. Spinks:
Evaluation and comparison of structural test methodologies for analogue and mixed signal circuits. 433-436 - Eduardo J. Peralías, Adoración Rueda, José L. Huertas:
CMOS pipelined A/D converters with concurrent error detection capability. 437-440 - José Silva Matos, José Machado da Silva:
Mixed-Signal Board Level DfT Techniques Using IEEE P1149.4. 441-446 - Pelegrín Camacho, Fabián Arrebola, Francisco Sandoval:
Adaptive multifovea sensors for mobiles tracking. 449-452 - Ferran Lisa-Mingo, Jordi Carrabina:
A PCI-based custom computer for real time image processing. 453-456 - Fernando J. P. Lopes, Mohammed Ghanbari:
Improved motion compensation with overlapped spatial transformation. 457-460 - Yossi Shapiro, Moshe Porat:
Image representation and reconstruction from spectral amplitude or phase. 461-464 - Fernando B. M. Duarte, J. A. Tenreiro Machado:
Kinematic optimization of redundant and hyper-redundant robot trajectories. 467-470 - Luis Filipe Baptista, Jorge M. Martins, Carlos B. Cardeira, José M. G. Sá da Costa:
An open architecture for position and force control of robotic manipulators. 471-474 - Dinis G. Fernandes, Pedro U. Lima:
A testbed for robotic visual servoing and catching of moving objects. 475-478 - Jorge Lobo, Jorge Dias:
Ground plane detection using visual and inertial data fusion. 479-482 - Artur Arsénio, M. Isabel Ribeiro:
Absolute localization of mobile robots using natural landmarks. 483-486 - Dalibor Biolek:
Identification of unstable DC operating points. 489-492 - M. K. Külmiz Cevik:
Boundary Nevanlinna Pick interpolation for maximum power transfer. 493-496 - Corneliu Rusu, Ioan Gavrea, Pauli Kuosmanen:
On phase approximation by gain differences. 497-500 - Paul Cristea, Rodica Tuduce:
Exploring the range of transitions in idealized switched networks. 501-504 - Augusto Manuel Marques, Yves Geerts, Michiel Steyaert, Willy Sansen:
Settling time analysis of third order systems. 505-508 - Francisco Martín, Félix Carrique, Carlos Criado:
Some results about the behaviour of the characteristic frequencies in electric circuits. 509-512 - Ahmed S. Elwakil, Michael Peter Kennedy:
High frequency RC chaos generator. 513-516 - Taku Katagiri, Toshimichi Saito:
Islands induced by periodic perturbations to an autonomous chaos generator. 517-520 - Erik Lindberg, Krishnamurthy Murali:
An eigenvalue study of the MLC circuit. 521-524 - João Nuno Matos, Atílio Gameiro, R. Silva, J. Figueiredo, Mateo Burgos-García, Blas-Pablo Dorta-Naranjo:
RF/SS system for wireless local loop. 525-528 - Alexej S. Adonin, Konstantin O. Petrosjanc, Igor V. Poljakov:
Monolith optoelectronic integrated circuit with built-in photo-voltaic supply for control and monitoring. 529-531 - P. Wouters, P. Van Oostende, L. Dawance, B. Graindourze:
A high performant 0.5 μm CMOS single chip ISDN network termination based on an embedded core and co-processor architecture. 533-536 - Marcia G. Méndez-Rivera, Ari Yakov Valero-López, José Silva-Martínez, Edgar Sánchez-Sinencio:
Efficient clock recovery architecture. 537-540 - Orlando Frazão, Antonio F. Cunha, Pedro Tavares, L. Ribeiro, Jose Ferreira da Rocha:
Modeling of a 4×10 Gbps all-optical clock extraction system. 541-544 - Takenobu Matsuura, Hirokazu Togiishi:
Two dimensional AR model of signing process and its application to on-line signature verification. 545-548
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