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ORCID28th ISCA 2001: Göteborg, Sweden
- Per Stenström:
Proceedings of the 28th Annual International Symposium on Computer Architecture, ISCA 2001, Göteborg, Sweden, June 30-July 4, 2001. ACM 2001, ISBN 0-7695-1162-7
Multithreading and Speculation
- Craig B. Zilles, Gurindar S. Sohi:
Execution-based prediction using speculative slices. 2-13 - Jamison D. Collins, Hong Wang, Dean M. Tullsen, Christopher J. Hughes
, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen:
Speculative precomputation: long-range prefetching of delinquent loads. 14-25 - Rajeev Balasubramonian, Sandhya Dwarkadas, David H. Albonesi:
Dynamically allocating processor resources between nearby and distant ILP. 26-37
Memory Systems Issues
- Chi-Keung Luk:
Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors. 40-51 - Murali Annavaram, Jignesh M. Patel, Edward S. Davidson:
Data prefetching by dependence graph precomputation. 52-61 - Vinodh Cuppu, Bruce L. Jacob:
Concurrency, latency, or system overhead: which has the largest impact on uniprocessor DRAM-system performance?. 62-71
Processor Architecture
- Brian A. Fields, Shai Rubin, Rastislav Bodík:
Focusing processor policies via critical-path prediction. 74-85 - Timothy Sherwood, Brad Calder:
Automated design of finite state machine predictors for customized processors. 86-97 - Youfeng Wu, Dong-yuan Chen, Jesse Fang:
Better exploration of region-level value locality with integrated computation reuse and value prediction. 98-108
Communication Support
- Lisa Wu, Christopher T. Weaver, Todd M. Austin:
CryptoManiac: a fast flexible architecture for secure communication. 110-119 - Ki Hwan Yum, Eun Jung Kim, Chita R. Das:
QoS provisioning in clusters: an investigation of Router and NIC design. 120-129
Cache Management
- Srikanth T. Srinivasan, Roy Dz-Ching Ju, Alvin R. Lebeck, Chris Wilkerson:
Locality vs. criticality. 132-143 - An-Chow Lai, Cem Fide, Babak Falsafi:
Dead-block prediction & dead-block correlating prefetchers. 144-154 - Alex Ramírez, Luiz André Barroso, Kourosh Gharachorloo, Robert S. Cohn, Josep Lluís Larriba-Pey, P. Geoffrey Lowney, Mateo Valero:
Code layout optimizations for transaction processing workloads. 155-164
Architectural Impact of Emerging Technologies
- Michael T. Niemier, Peter M. Kogge:
Exploring and exploiting wire-level pipelining in emerging technologies. 166-177 - Seth Copen Goldstein, Mihai Budiu:
NanoFabrics: spatial computing using molecular electronics. 178-191
Shared-Memory Multiprocessors
- David Lie, Andy Chou, Dawson R. Engler, David L. Dill:
A simple method for extracting models for protocol code. 192-203 - Milos Prvulovic, María Jesús Garzarán, Lawrence Rauchwerger, Josep Torrellas:
Removing architectural bottlenecks to the scalability of speculative parallelization. 204-215
Energy-Effective Designs
- R. Iris Bahar, Srilatha Manne:
Power and energy reduction via pipeline balancing. 218-229 - Daniele Folegnani, Antonio González:
Energy-effective issue logic. 230-239 - Stefanos Kaxiras, Zhigang Hu, Margaret Martonosi:
Cache decay: exploiting generational behavior to reduce cache leakage power. 240-251
Performance Tools and Evaluations
- Christopher J. Hughes, Praful Kaul, Sarita V. Adve, Rohit Jain, Chanik Park, Jayanth Srinivasan:
Variability in the execution of multimedia applications and implications for architecture. 254-265 - Rajagopalan Desikan, Doug Burger, Stephen W. Keckler:
Measuring Experimental Error in Microprocessor Simulation. 266-277 - S. Subramanya Sastry, Rastislav Bodík, James E. Smith:
Rapid profiling via stratified sampling. 278-289
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