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ISCAS 2004: Vancouver, BC, Canada - Volume 1
- Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004. IEEE 2004, ISBN 0-7803-8251-X
- Arun Ravindran, Anup Savla, Jennifer Leonard:
Digital error correction and calibration of gain non-linearities in a pipelined ADC. 1-4 - Kamal El-Sankary, Mohamad Sawan:
A new digital background calibration technique for pipelined ADC. 5-8 - Tae-Hwan Oh, Ho-Young Lee, Ho-Jin Park, Jae-Whui Kim:
A 1.8V 8-bit 250Msample/s Nyquist-rate CMOS pipelined ADC. 9-12 - Martin Kinyua, Franco Maloberti, William Gosney:
Digital background auto-calibration of DAC non-linearity in pipelined ADCs. 13-16 - Peter Bogner:
A 28mW 10b 80MS/s pipelined ADC in 0.13µm CMOS. 17-20 - Jader A. De Lima, Fernando M. Alcaide:
On designing linearly tunable high-Q OTA-C filters with low sensitivity. 21-24 - Francisco Serra-Graells
, Xavier Redondo:
Exact design of all-MOS log filters. 25-28 - Pamela Abshire, Eric Liu Wong, Yiming Zhai, Marc H. Cohen:
Adaptive log domain filters using floating gate transistors. 29-32 - Ravi Chawla, Haw-Jing Lo, Arindam Basu
, Paul E. Hasler, Bradley A. Minch:
A fully programmable log-domain bandpass filter using multiple-input translinear elements. 33-36 - Chun-Ming Chang:
6.61MHz to 317MHz nth-order current-mode low-pass and high-pass OTA-only-without-C filter. ISCAS (1) 2004: 37-40 - Ming-Dou Ker, Jung-Sheng Chen, Ching-Yun Chu:
A CMOS bandgap reference circuit for sub-1-V operation without using extra low-threshold-voltage device. ISCAS (1) 2004: 41-44 - Armin Tajalli, Seyed Mojtaba Atarodi
, Abbas Khodaverdi, Farzad Sahandi Esfanjani:
Design and optimization of a high PSRR CMOS bandgap voltage reference. 45-48 - Chi Yat Leung, Ka Nang Leung, Philip K. T. Mok:
Design of a 1.5-V high-order curvature-compensated CMOS bandgap reference. 48-52 - Laleh Najafizadeh, Igor M. Filanovsky:
Towards a sub-1 V CMOS voltage reference. ISCAS (1) 2004: 53-56 - Ferdinando Bedeschi, Edoardo Bonizzoni, Andrea Fantini, Claudio Resta, Guido Torelli:
A low-power low-voltage MOSFET-only voltage reference. 57-60 - Hanjun Jiang, Haibo Fei, Degang Chen, Randall L. Geiger:
A background digital self-calibration scheme for pipelined ADCs based on transfer curve estimation. 61-64 - Anup Savla, Jennifer Leonard, Arun Ravindran:
A novel queuing architecture for background calibration of pipeline ADCs. ISCAS (1) 2004: 65-68 - Reza Lotfi, Mohammad Taherzadeh-Sani, Omid Shoaei:
A 12-bit 40MSPS 3.3-V 56-mW pipelined A/D convereter in 0.25-µm CMOS [convereter read converter]. ISCAS (1) 2004: 69-72 - Babak Nejati, Omid Shoaei:
A 10-bit, 3.3-V, 60MSample/s, combined radix<2 and 1.5-bit/stage pipelined analog-to-digital converter. ISCAS (1) 2004: 73-76 - Hamid Movahedian, Meysam Azin, Mehrdad Sharif Bakhtiar:
A low voltage low power 8-bit folding/interpolating ADC with rail-to-rail input range. ISCAS (1) 2004: 77-80 - Tom J. Kazmierski, Fazrena A. Hamid:
Behavioral modelling of RF filters in VHDL-AMS for automated architectural and parametric optimization. ISCAS (1) 2004: 81-84 - José L. Ausín, J. Francisco Duque-Carrillo, Guido Torelli, Miguel Angel Domínguez:
A design strategy for area efficient high-order high-Q SC filters. ISCAS (1) 2004: 85-88 - Drazen Jurisic, George S. Moschytz, Neven Mijat:
Low active-sensitivity allpole active-RC filters using impedance tapering. ISCAS (1) 2004: 89-92 - Taner Sumesaglam, Aydin I. Karsilayan:
Digital tuning of analog bandpass filters based on envelope detection. ISCAS (1) 2004: 93-96 - David W. Graham, Paul D. Smith, Richard Ellis, Ravi Chawla, Paul E. Hasler:
A programmable bandpass array using floating-gate elements. ISCAS (1) 2004: 97-100 - Bo Shi, Michael Yan Wah Chia:
Design of a SiGe low-noise amplifier for 3.1-10.6 GHz ultra-wideband radio. ISCAS (1) 2004: 101-104 - Su-Tarn Lim, John R. Long:
A feedforward compensated high-linearity differential transconductor for RF applications. ISCAS (1) 2004: 105-108 - Sumit Bagga, Giuseppe de Vita, Sandro A. P. Haddad, Wouter A. Serdijn, John R. Long:
A PPM Gaussian pulse generator for ultra-wideband communications. ISCAS (1) 2004: 109-112 - Xuejin Wang, Aykut Dengi, Sayfe Kiaei:
A high IIP3 X-band BiCMOS mixer for radar applications. ISCAS (1) 2004: 113-116 - Jinho Park, David J. Allstot:
A 12.5 GHz RF matrix amplifier in 180nm SOI CMOS. 117-20 - Pedro M. Figueiredo, João C. Vital:
Termination of averaging networks in flash ADCs. ISCAS (1) 2004: 121-124 - Chun-Cheng Huang, Jieh-Tsorng Wu:
A statistical background calibration technique for flash analog-to-digital converters. 125-128 - Erik Sall, Mark Vesterbacka, K. Ola Andersson:
A study of digital decoders in flash analog-to-digital converters. ISCAS (1) 2004: 129-132 - Ovidiu Carnu, Adrian Leuciuc:
Optimal offset averaging for flash and folding A/D converters. ISCAS (1) 2004: 133-136 - Quentin Diduck, Martin Margala:
6-bit low power low area frequency modulation based flash ADC. ISCAS (1) 2004: 137-140 - Igor M. Filanovsky, Arie van Staveren, Chris J. M. Verhoeven:
Synthesis of amplifier transfer function using time-domain response. 141-144 - Sandro A. P. Haddad, Nanko Verwaal, Richard Houben, Wouter A. Serdijn:
Optimized dynamic translinear implementation of the Gaussian wavelet transform. ISCAS (1) 2004: 145-148 - Mladen Vucic, Goran Molnar, Hrvoje Babic:
Method for equalizer design based on time-domain symmetry. ISCAS (1) 2004: 149-152 - Roberto Gómez-García, José I. Alonso:
Exact synthesis of bandpass responses using an isolated cascade connection of same order lowpass and highpass filters. ISCAS (1) 2004: 153-156 - Yannis P. Tsividis:
Mixing domains in signal processing. ISCAS (1) 2004: 157-160 - Luca Romanò, Salvatore Levantino, Andrea Bonfanti, Carlo Samori, Andrea L. Lacaita:
Phase noise and accuracy in quadrature oscillators. ISCAS (1) 2004: 161-164 - Luís Bica Oliveira, Jorge R. Fernandes, Igor M. Filanovsky, Chris J. M. Verhoeven:
A 2.4 GHz CMOS quadrature LC-oscillator/mixer. ISCAS (1) 2004: 165-168 - Paola Tortori, Davide Guermandi, Eleonora Franchi, Antonio Gnudi:
Quadrature VCO based on direct second harmonic locking. ISCAS (1) 2004: 169-172 - Sebastian Magierowski, Krzysztof Iniewski, Stefan Zukotynski:
A wideband LC-VCO with enhanced PSRR for SOC applications. ISCAS (1) 2004: 173-176 - Aleksandar Tasic, Wouter A. Serdijn, John R. Long:
DCS1800/WCDMA adaptive voltage-controlled oscillator. ISCAS (1) 2004: 177-180 - Lourans Samid, Patrick Volz, Yiannos Manoli:
A dynamic analysis of a latched CMOS comparator. 181-184 - Herng-Jer Lee, Chia-Chi Chu, Wu-Shiung Feng:
Generalizations of adjoint networks technique for RLC interconnects model-order reductions. ISCAS (1) 2004: 185-188 - Shyam Subramanian, David V. Anderson, Paul E. Hasler:
Synthesis of static multiple input multiple output MITE networks. ISCAS (1) 2004: 189-192 - Makeswaran Loganathan, Suvarcha Malhotra, Pamela Abshire:
Information capacity and power efficiency in operational transconductance amplifiers. ISCAS (1) 2004: 193-196 - Arvind Kumar, Sandip Tiwari:
A power-performance adaptive low voltage analog circuit design using independently controlled double gate CMOS technology. ISCAS (1) 2004: 197-200 - Haibin Huang, Ezz I. El-Masry:
An 89dB low-power CMOS Sigma Delta modulator for Bluetooth application. ISCAS (1) 2004: 201-204 - José M. García-González, Sara Escalera, José M. de la Rosa, Oscar Guerra, Fernando Medeiro, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez:
A 0.35µm CMOS 17-bit@40kS/s sensor A/D interface based on a programmable-gain cascade 2-1 Sigma Delta modulator. 205-208 - Olujide A. Adeniran, Andreas Demosthenous, Chris Clifton, Sam Atungsiri, Randeep Soin:
A CMOS low-power ADC for DVB-T and DVB-H systems. ISCAS (1) 2004: 209-212 - Angelo W. Pereira, Daniel J. Allen, Paul E. Hasler:
A 0.5µm CMOS programmable discrete-time Delta-Sigma modulator with floating gate elements. ISCAS (1) 2004: 213-216 - Sami Karvonen, Tom A. D. Riley, Juha Kostamovaara:
A 50-MHz CMOS quadrature charge sampling circuit with 66 dB SFDR. ISCAS (1) 2004: 217-220 - Omid Oliaei:
Spectral analysis of signals experiencing nonstationary stochastic time-shifts. ISCAS (1) 2004: 221-224 - Reuben Wilcock, Bashir M. Al-Hashimi:
Power-conscious design methodology for class-A switched-current wave filters. ISCAS (1) 2004: 225-228 - Ralf M. Philipp, Ralph Etienne-Cummings:
Low power current rectifiers for large scale current-mode signal processing. ISCAS (1) 2004: 229-232 - Phil Corbishley, Esther Rodríguez-Villegas, Chris Toumazou:
An ultra-low power analogue directionality system for digital hearing aids. ISCAS (1) 2004: 233-236 - Chengming He, Kuangming Yap, Degang Chen, Randall L. Geiger:
NTH order circular symmetry pattern and hexagonal tesselation: two new layout techniques cancelling nonlinear gradient. ISCAS (1) 2004: 237-240 - Jangsup Yoon, William R. Eisenstadt:
Lumped passive circuits for 5GHz embedded test of RF SoCs. ISCAS (1) 2004: 241-244 - Qizhang Yin, Robert M. Fox, William R. Eisenstadt:
A translinear-based RF RMS detector for embedded test. ISCAS (1) 2004: 245-248 - Zhongjun Yu, Degang Chen, Randall L. Geiger:
The SRE/SRM approach for spectral testing of AMS circuits. ISCAS (1) 2004: 249-252 - Peter M. Levine, Gordon W. Roberts:
A calibration technique for a high-resolution flash time-to-digital converter. ISCAS (1) 2004: 253-256 - Sara Escalera, José M. García-González, Oscar Guerra, José M. de la Rosa, Fernando Medeiro, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez:
An alternative DFT methodology to test high-resolution Sigma Delta modulators. ISCAS (1) 2004: 257-260 - Igor M. Filanovsky:
Reactance network shaping a sinusoidal pulse with sinusoidal envelope of finite duration. ISCAS (1) 2004: 261-264 - Ernst Goepel:
Active RC networks: what benefit is there in having conjugate real zeros in the second-order transfer function? ISCAS (1) 2004: 265-268 - Timo Rahkonen, Jyri Kortekangas:
Mixed-mode parameter analysis of fully differential circuits. ISCAS (1) 2004: 269-272 - Herminio Martínez, Eva Vidal, Eduard Alarcón, Alberto Poveda:
Dynamic modelling of analog integrated filters for the stability study of on-chip automatic tuning loops. ISCAS (1) 2004: 273-276 - Tetsuo Nishi, Masato Ogata:
Simultaneous realization of Z21/Z11 and Y21 of an RC two-port. ISCAS (1) 2004: 277-280 - Sunil Rafeeque, Vinita Vasudevan:
An on-chip DNL estimation and reconfiguration for improved linearity in current steering DAC. ISCAS (1) 2004: 281-284 - Martin Clara, Andreas Wiesbauer, Wolfgang Klatzer:
Nonlinear distortion in current-steering D/A-converters due to asymmetrical switching errors. ISCAS (1) 2004: 285-288 - Matthias Keller, Yiannos Manoli, Friedel Gerfers:
A calibration method for current steering digital to analog converters in continuous time multi-bit sigma delta modulators. ISCAS (1) 2004: 289-292 - Tao Chen, Georges G. E. Gielen:
Modelling of the impact of the current source output impedance on the SFDR of current-steering CMOS D/A converters. ISCAS (1) 2004: 293-296 - Jussi Pirkkalaniemi, Marko Kosunen, Mikko Waltari, Kari Halonen:
A digital calibration for a 16-bit, 400-MHz current-steering DAC. ISCAS (1) 2004: 297-300 - Teresa Serrano-Gotarredona, Rafael Serrano-Gotarredona, Bernabé Linares-Barranco:
Hardware implementation of complex reaction-diffusion neural networks using log-domain techniques. ISCAS (1) 2004: 301-304 - Vishnu Ravinuthula, John G. Harris:
Time-based arithmetic using step functions. ISCAS (1) 2004: 305-308 - Ethan Farquhar, Paul E. Hasler:
A bio-physically inspired silicon neuron. ISCAS (1) 2004: 309-312 - Ethan Farquhar, David N. Abramson, Paul E. Hasler:
A reconfigurable bidirectional active 2 dimensional dendrite model. ISCAS (1) 2004: 313-316 - Christal Gordon, Ethan Farquhar, Paul E. Hasler:
A family of floating-gate adapting synapses based upon transistor channel models. 317-20 - Ming-Dou Ker, Shih-Lun Chen, Chia-Sheng Tsai:
A new charge pump circuit dealing with gate-oxide reliability issue in low-voltage processes. ISCAS (1) 2004: 321-324 - Susanta Sengupta, Kanan Saurabh, Phillip E. Allen:
A process, voltage, and temperature compensated CMOS constant current reference. ISCAS (1) 2004: 325-328 - Chua-Chin Wang, Yih-Long Tseng, Tzung-Je Lee, Ron Hu:
High-PSR bias circuitry for NTSC sync separation. ISCAS (1) 2004: 329-332 - Edgar Mauricio Camacho-Galeano, Carlos Galup-Montoro, Márcio C. Schneider:
Design of an ultra-low-power current source. ISCAS (1) 2004: 333-336 - Tobi Delbrück, André van Schaik:
Bias current generators with wide dynamic range. ISCAS (1) 2004: 337-340 - Marc Pastre, Maher Kayal:
High-precision DAC based on a self-calibrated sub-binary radix converter. ISCAS (1) 2004: 341-344 - Jeroen De Maeyer, Pieter Rombouts, Ludo Weyten:
Addressing static and dynamic errors in bandpass unit element multibit DAC's. ISCAS (1) 2004: 345-348 - Saeed Saeedi, Saeid Mehrmanesh, Seyed Mojtaba Atarodi
, Hesam Amir Aslanzadeh:
A 1-V 400MS/s 14bit self-calibrated CMOS DAC with enhanced dynamic linearity. 349-352 - Kuo-Hsing Cheng, Tsung-Shen Chen, Chia Ming Tu:
A 14-bit, 200 MS/s digital-to-analog converter without trimming. ISCAS (1) 2004: 353-358 - Guillermo J. Serrano, Paul E. Hasler:
A floating-gate DAC array. ISCAS (1) 2004: 357-360 - Bernabé Linares-Barranco, Teresa Serrano-Gotarredona, Rafael Serrano-Gotarredona, Luis A. Camuñas:
On leakage current temperature characterization using sub-pico-ampere circuit techniques. ISCAS (1) 2004: 361-364 - Inchang Seo, Robert M. Fox:
Comparison of quasi-/pseudo-floating gate techniques. ISCAS (1) 2004: 365-368 - Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins:
A generalized timing-skew-free, multi-phase clock generation platform for parallel sampled-data systems. ISCAS (1) 2004: 369-372 - Guillermo J. Serrano, Paul D. Smith, Haw-Jing Lo, Ravi Chawla, Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler:
Automatic rapid programming of large arrays of floating-gate elements. ISCAS (1) 2004: 373-376 - Bernabé Linares-Barranco, Teresa Serrano-Gotarredona, Rafael Serrano-Gotarredona, Gustavo Vicente-Sánchez:
On mismatch properties of MOS and resistors calibrated ladder structures. ISCAS (1) 2004: 377-380 - Ilkka Nissinen, Juha Kostamovaara:
A low voltage CMOS constant current-voltage reference circuit. ISCAS (1) 2004: 381-384 - Ka Nang Leung, Philip K. T. Mok, Sai Kit Lau:
A low-voltage CMOS low-dropout regulator with enhanced loop response. ISCAS (1) 2004: 385-388 - Walter Aloisi, Stello Matteo Billé, Gaetano Palumbo:
Low-voltage linear voltage regulator suitable for memories. 389-392 - Vladislav Y. Potanin, Elena E. Potanina:
High-voltage-tolerant power supply in a low-voltage CMOS technology. 393-396 - Preetam Tadeparthy:
A CMOS bandgap reference with correction for device-to-device variation. 397-400 - Pieter Rombouts, Jeroen De Maeyer, Johan Raman, Ludo Weyten:
Systematic design of double-sampling Sigma Delta ADC's with modified NTF. 401-404 - Maurits Ortmanns, Markus Kuderer, Yiannos Manoli, Friedel Gerfers:
A cascaded continuous-time Sigma Delta modulator with 80 dB dynamic range. 405-408 - Ut-Va Koc, Jaesik Lee:
Direct RF sampling continuous-time bandpass Delta-Sigma A/D converter design for 3G wireless applications. 409-412 - Wern Ming Koe, Franco Maloberti:
Feed-forward path and gain-scaling - a swing and distortion reduction scheme for second order sigma-delta modulator. 413-416 - Jannik Hammel Nielsen, Erik Bruun
:
A low-power 10-bit continuous-time CMOS Sigma Delta A/D converter. 417-420 - Belén Calvo, Santiago Celma, Maria Teresa Sanz:
CMOS digitally programmable cell for high frequency amplification and filtering. 421-424 - Tomoyuki Nakayama, Toshihiko Yamasaki, Tadashi Shibata:
Quasi-parallel multi-path detection architecture using floating-gate-MOS-based CDMA matched filters. 425-428 - Jacqueline S. Pereira, Antonio Petraglia, Franco Maloberti:
A 0.18µm CMOS SC lowpass filter for Bluetooth channel selection. 429-432 - Shelly Xiao, José B. Silva, Un-Ku Moon, Gabor C. Temes:
A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications. 433-436 - Sami Karvonen, Tom A. D. Riley, Sami Kurtti, Juha Kostamovaara:
A 50-MHz BiCMOS quadrature charge sampler and complex bandpass SC filter for narrowband applications. 437-440 - Abdelohahab Djemouai, Mohamad Sawan:
New CMOS current-mode amplitude shift keying demodulator (ASKD) dedicated for implantable electronic devices. 441-444 - Alfredo Arnaud, Carlos Galup-Montoro:
A fully integrated 0.5-7 Hz CMOS bandpass amplifier. 445-448 - Timothy G. Constandinou
, Julius Georgiou, Chris Toumazou:
A nano-power tuneable edge-detection circuit. 449-452 - Fausto Borghetti, Lorenzo Farina, Piero Malcovati, Franco Maloberti:
A high speed and low power CMOS current comparator for photon counting systems. 453-456 - Harpreet S. Narula, John G. Harris:
VLSI potentiostat for amperometric measurements for electrolytic reactions. 457-460 - Shubha Bommalingaiahnapallya, Ramesh Harjani:
Low power implementation of an n-tone Sigma Delta converter. 461-464 - Mohammad Yavari, Omid Shoaei:
Low-voltage sigma-delta modulator topologies for broadband applications. 465-468 - Mitsuhiko Yagyu, Akinori Nishihara:
Fast and efficient algorithm to design noise-shaping FIR filters for high-order overload-free stable sigma-delta modulators. 469-472 - Kye-Shin Lee, Yunyoung Choi, Franco Maloberti:
Domino free 4-path time-interleaved second order sigma-delta modulator. 473-476 - Ralph Mason, Chris DeVries, Eugene Ivanov:
An RF sub-sampling mixer, PGA and Sigma Delta ADC for conversion at 900 MHz. 477-480 - Chengming He, Le Jin, Degang Chen, Randall L. Geiger:
Robust design of high gain amplifiers using dynamical systems and bifurcation theory. 481-484 - Gaetano Palumbo, Salvatore Pennisi:
Harmonic distortion in three-stage nested-Miller-compensated amplifiers. 485-488 - Craig Petrie, Tianxue Sun, Matthew R. Miller:
A high-gain offset-compensated differential amplifier. 489-492 - Xiaohua Fan, Chinmaya Mishra, Edgar Sánchez-Sinencio:
Single Miller capacitor compensated multistage amplifiers for large capacitive load applications. 493-496 - Preetam Tadeparthy:
An improved frequency compensation techinique for low power, low voltage CMOS amplifiers [techinique read technique]. 497-500 - Andre Vilas Boas, Alfredo Olmos:
A temperature compensated digitally trimmable on-chip IC oscillator with low voltage inhibit capability. 501-504 - Nikolas Stefanou, Sameer R. Sonkusale:
High speed array of oscillator-based truly binary random number generators. 505-508 - Mourad Oulmane, Gordon W. Roberts:
A CMOS time amplifier for Femto-second resolution timing measurement. 509-512 - Jerzy J. Dabrowski:
Fault modeling of RF blocks based on noise analysis. 513-516