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ORCIDISCAS 2019: Sapporo, Japan
- IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019. IEEE 2019, ISBN 978-1-7281-0397-6
- Tommaso Addabbo, Ada Fort, Marco Mugnaini, Hadis Takaloo
, Valerio Vignoli, Nicola Petra:
Piecewise Linear Chaotic Maps in Current Mode CMOS Circuits: Nonlinear Distortion Analysis. 1-5 - Elizabeth Adams, Suganthi Venkatachalam, Seok-Bum Ko:
Energy-Efficient Approximate MAC Unit. 1-4 - Jiang Jiang, Haicheng Tu, Yongxiang Xia, Xiang Zhou, Xi Chen:
Robustness of Power Grids Based on a Probability Model of Node Failures. 1-5 - Imon Mondal:
Effect of Circuit Non-Idealities on Active On-Chip Delay Lines. 1-5 - Budianto, Wicky Law, Daniel Pak-Kong Lun:
Deep Learning Based Period Order Detection in Structured Light Three-Dimensional Scanning. 1-5 - Hong Ming Chiu, Kuan-Chih Lin, Tian Sheuan Chang:
Run Time Adaptive Network Slimming for Mobile Environments. 1-4 - Prateek Gupta, Shirisha Gourishetty, Harshini Mandadapu, Zia Abbas:
PVT Variations Aware Robust Transistor Sizing for Power-Delay Optimal CMOS Digital Circuit Design. 1-5 - Cuei-Ling Hsieh, Yi-Chun Hsieh, Jung-Hsun Lin, Hong-Shen Chen, Chieh-Ying Yang, Jenny Yi-Chun Liu:
Signal Generation Techniques in CMOS for Millimeter-Wave and Terahertz Applications. 1-5 - Alexander Serb, Themis Prodromakis:
An Analogue-Domain, Switch-Capacitor-Based Arithmetic-Logic Unit. 1-5 - Jiaxi Zhang, Wentai Zhang, Guojie Luo, Xuechao Wei, Yun Liang, Jason Cong:
Frequency Improvement of Systolic Array-Based CNNs on FPGAs. 1-4 - Florent Cilici, Manuel J. Barragán, Salvador Mir, Estelle Lauga-Larroze, Sylvain Bourdel, Gildas Léger:
Yield Recovery of mm-Wave Power Amplifiers using Variable Decoupling Cells and One-Shot Statistical Calibration. 1-5 - Frank Sill Torres, Alberto García Ortiz, Rolf Drechsler:
HotAging - Impact of Power Dissipation on Hardware Degradation. 1-5 - Xiaohua Huang, Kunnong Zeng, Woogeun Rhee, Zhihua Wang:
A Noise and Spur Reduction Technique for ΔΣ Fractional-N Bang-Bang PLLs with Embedded Phase Domain Filtering. 1-4 - Naoaki Kokubun, Akira Yamaga, Hironori Uchikawa, Daiki Watanabe:
Circuit-Size Reduction for Parallel Chien Search using Minimal Polynomial Degree Reduction. 1-5 - Aleksandra Lekic, Abdelali El Aroudi, Dusan M. Stipanovic:
Polytopic Control of a PV-Fed SEPIC DC-DC Converter. 1-5 - Vahur Kampus, Robert Teschner, Ulrich Gaier, Thomas Linder, Gerhard Nössing, Martin Trojer:
Five-Stage, Power Efficient, Dual Rail, 100MHz, 10dB Programmable Gain Amplifier with Down-Stepping Functions in 28nm CMOS. 1-5 - Yasushi Fuwa, Masato Futagawa, Mitsuru Komatsu:
Establishment of Technology for Constructing Sensor Networks to Support Safe and Secure Areas in Collaboration with the Local Government. 1-5 - Hamidreza Taghvaee, Sergi Abadal, Julius Georgiou, Albert Cabellos-Aparicio, Eduard Alarcón:
Fault Tolerance in Programmable Metasurfaces: The Beam Steering Case. 1-5 - Xinmiao Zhang, Yok Jye Tang:
Reducing Parallel Linear Feedback Shift Register Complexity Through Input Tap Modification. 1-5 - Magni Hussain, W. K. Jenkins:
Effectiveness of the Bio-Inspired Firefly Algorithm in Adaptive Signal Processing for Nonlinear Systems. 1-4 - Jitka Kocnová, Zdenek Vasícek:
EA-Based Refactoring of Mapped Logic Circuits. 1-5 - Ginés Doménech-Asensi, Tom J. Kazmierski:
An Efficient Numerical Solution Technique for VLSI Interconnect Equations on Many-Core Processors. 1-5 - Yi-Chia Chen, Shao-Yung Lu, Yu-Te Liao:
Power-Efficient Cyclic Voltammetric Electrochemical Sensing Readout Circuitry with Current-Reducer Ramp Waveform Generation. 1-5 - Jian Wang, Xianbin Li, Guangteng Fan, Zhouhui Tuo:
A Parallel Radix-2k FFT Processor using Single-Port Merged-Bank Memory. 1-5 - Leo Rogers, John McAllister:
Window Size Estimation for Nearest Neighbour Compliant Quantum Circuit Mapping. 1-5 - Mahmoud A. A. Ibrahim, Marvin Onabajo:
Sinusoidal Signal Generation Through Successive Integration. 1-5 - Fengyuan Liu, Nivasan Yogeswaran, William Taube Navaraj, Ravinder Dahiya:
Flexible Logic Circuits by using Van Der Waals Contacted Graphene Field-Effect Transistors. 1-5 - Duy P. Nguyen, Xuan-Tu Tran, Nguyen L. K. Nguyen, Phat T. Nguyen, Anh-Vu Pham:
A Wideband High Efficiency Ka-Band MMIC Power Amplifier for 5G Wireless Communications. 1-5 - Shen-Fu Hsiao, Pei-Hsuan Wu, Jien-Min Chen, Kun-Chih Chen:
Dual-Precision Acceleration of Convolutional Neural Network Computation with Mixed Input and Output Data Reuse. 1-4 - Wenjing Wang, Cong Li, Jiatuo Xu, Xiang Li:
Bridging Fatty Liver Disease and Traditional Chinese Medicine: A Complex Network Approach. 1-5 - Mousam Hossain, Ashiq A. Sakib, Sudarshan K. Srinivasan, Scott C. Smith:
An Equivalence Verification Methodology for Asynchronous Sleep Convention Logic Circuits. 1-5 - Indrajit Das, Nagarjuna Nallam:
Systematic Generation of Flicker and Thermal Noise Canceling Circuits. 1-4 - Xavier Aragonès, Diego Mateo, Enrique Barajas, Albert Crespo-Yepes, Rosana Rodríguez, Javier Martín-Martínez, Montserrat Nafría:
Aging in CMOS RF Linear Power Amplifiers: Experimental Comparison and Modeling. 1-5 - Zhixuan Wang, Yuan Zhong, Cheng Chen, Le Ye, Qianqian Huang, Libo Yang, Yangyuan Wang, Ru Huang:
Ultra-Low Power Hybrid TFET-MOSFET Topologies for Standard Logic Cells with Improved Comprehensive Performance. 1-5 - Zongxian Li, Sheng Li, Lantian Xue, Yonghong Tian:
Semi-Siamese Network for Content-Based Video Relevance Prediction. 1-5 - ChenYang Xia, YouZhe Fan, Chi-Ying Tsui:
A Two-Staged Adaptive Successive Cancellation List Decoding for Polar Codes. 1-5 - Sanggeun Jeon, Jae-Sung Rieh, Moonil Kim:
WR-3 Band Integrated Circuits in InP HBT Technology. 1-5 - Heng Lee, Yi-Heng Wu, Yu-Sheng Lin, Shao-Yi Chien:
Convolutional Neural Network Accelerator with Vector Quantization. 1-5 - He Wang, Nicoleta Cucu Laurenciu, Yande Jiang, Sorin Dan Cotofana:
Atomistic-Level Hysteresis-Aware Graphene Structures Electron Transport Model. 1-5 - Yihan Zhang, Jiajing Wu, Zhenhao Chen, Yuxuan Huang, Zibin Zheng:
Sequential Node/Link Recovery Strategy of Power Grids Based on Q-Learning Approach. 1-5 - Kiyoshi Nishikawa:
Low Variance Adaptation Method for the LMS-Type Adaptive Filters Based on the Gaussian Model. 1-5 - Florian Schraut, Holger Eisenreich, Sebastian Höppner, Christian Mayr:
A Fast Lock-In Ultra Low-Voltage ADPLL Clock Generator with Adaptive Body Biasing in 22nm FDSOI Technology. 1-5 - Vinay Chakravarthi Gogineni, Mrityunjoy Chakraborty:
Partial Diffusion Affine Projection Algorithm Over Clustered Multitask Networks. 1-5 - Qi Nie, Sharad Malik:
SpFlow: Memory-Driven Data Flow Optimization for Sparse Matrix-Matrix Multiplication. 1-5 - Mario Osta, Ali Ibrahim, Michele Magno, Manuel Eggimann, Antonio Pullini, Paolo Gastaldo, Maurizio Valle:
An Energy Efficient System for Touch Modality Classification in Electronic Skin Applications. 1-4 - Pei Peng, Zidong Wang, Zijun Wei, Zhongzheng Tian, Muchan Li, Liming Ren, Yunyi Fu:
Radio-Frequency Power Amplifier Based on CVD Graphene Field-Effect Transistor. 1-4 - Ângelo Nery Crestani Vieira, Paulo Silas Severo de Souza, Wagner dos Santos Marques, Marcelo Da Silva Conterato, Tiago Coelho Ferreto, Marcelo Caggiani Luizelli, Arthur Francisco Lorenzon, Antonio Carlos Schneider Beck Filho, Fábio Diniz Rossi, Jorji Nonaka:
The Impact of Parallel Programming Interfaces on the Aging of a Multicore Embedded Processor. 1-5 - Mineo Kaneko:
A Novel Framework for Procedural Construction of Parallel Prefix Adders. 1-5 - Franz Marcus Schüffny, Sebastian Höppner, Alexander Oefelein, Christian Mayr:
A Multi-Bit PFD Architecture for ADPLLs with Built-In Jitter Self-Calibration. 1-5 - Jongho Kim, Heesu Kim, Hussam Amrouch, Jörg Henkel, Andreas Gerstlauer, Kiyoung Choi:
Aging Gracefully with Approximation. 1-5 - Kuan-Hsien Liu, Tsung-Jung Liu, Chia-Ching Wang, Hsin-Hua Liu, Soo-Chang Pei:
Modern Architecture Style Transfer for Ruin or Old Buildings. 1-5 - Jing Wang, Yici Cai, Ming Yan, Qiang Zhou:
Composite Optimization for Electromigration Reliability and Noise in Power Grid Networks. 1-5 - Ren Li, Reem Alhadrami, Hossein Fariborzi:
BEOL NEM Relay Based Sequential Logic Circuits. 1-4 - Choujun Zhan, Fujian Wu, Zhengdong Wu, Chi K. Tse:
Daily Rainfall Data Construction and Application to Weather Prediction. 1-5 - Irina Kataeva, Shigeki Ohtsuka, Hussein Nili, Hyungjin Kim, Yoshihiko Isobe, Koichi Yako, Dmitri B. Strukov:
Towards the Development of Analog Neuromorphic Chip Prototype with 2.4M Integrated Memristors. 1-5 - Zhe-An Zheng, Vita Pi-Ho Hu:
Improved Read Stability and Writability of Negative Capacitance FinFET SRAM Cell for Subthreshold Operation. 1-5 - Zhengxin Wang, Huihui Yang, Long-xia Qian, Min Xiao, Guo-Ping Jiang, Jinxing Lin:
Synchronization in Heterogeneous Networks Coupled of LC Oscillators Via Sampled-Data Control. 1-5 - Pi-Feng Chiu, Won Ho Choi, Wen Ma, Minghai Qin, Martin Lueker-Boden:
A Binarized Neural Network Accelerator with Differential Crosspoint Memristor Array for Energy-Efficient MAC Operations. 1-5 - Shanthi Pavan:
Simplified Analysis of Total Integrated Noise in Passive Switched-Capacitor and N-Path Filters. 1-5 - Ahmed E. Amer, Ahmed Ashry, Mohamed A. Y. Abdalla, Islam A. Eshrah:
Gilbert Based Power Detector for 5G mm-Wave Transceivers Built-in-Self Test. 1-5 - Lih-Yih Chiou, Chung-Han Wu, Po-Cheng Wei:
A Reliable Delay-Based Physical Unclonable Function with Dark-Bit Avoidance. 1-4 - Wenjian Liu, Jun Lin, Zhongfeng Wang:
USCA: A Unified Systolic Convolution Array Architecture for Accelerating Sparse Neural Network. 1-5 - Keigo Nakatani, Yutaro Yamaguchi, Yuji Komatsuzaki, Shintaro Shinjo:
Millimeter-Wave GaN Power Amplifier MMICs for 5G Application. 1-4 - Mummadi Veerachary:
Design and Analysis of Split-Inductor Based Buck-Boost Converters. 1-5 - Joan Aymerich, Michele Dei, Lluís Terés, Francisco Serra-Graells:
A 72-µW 90-dB Wide-Range Potentiostatic CMOS ΔΣ Modulator with Flicker Noise Cancellation for Smart Electrochemical Sensors. 1-5 - Kayode Sanni, Andreas G. Andreou:
A Mixed-Signal Successive Approximation Architecture for Energy-Efficient Fixed-Point Arithmetic in 16nm FinFET. 1-5 - Thomas Jüngling, Thomas Lymburn, Thomas Stemler, Débora C. Corrêa, David M. Walker, Michael Small:
Reconstruction of Complex Dynamical Systems from Time Series using Reservoir Computing. 1-5 - Zi Yuan Gao, Chia-Ping Chen:
AI Deep Learning with Multiple Labels for Sentiment Classification of Tweets. 1-5 - Sebastian Pointner, Andreas Grimmer, Robert Wille:
Exact Stimuli Minimization for Simulation-Based Verification. 1-5 - Zhufei Chu, Winston Haaswijk, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli:
Exact Synthesis of Boolean Functions in Majority-of-Five Forms. 1-5 - Calvin Yoji Lee, Ahmed ElShater, Praveen Kumar Venkatachala, Hang Hu, Bohui Xiao, Un-Ku Moon:
Application of Ring-Amplifiers for Low-Power Wide-Bandwidth Digital Subsampling ADC-PLL. 1-5 - Hangxuan Cui, Jun Lin, Suwen Song, Zhongfeng Wang:
A New Probabilistic Gradient Descent Bit Flipping Decoder for LDPC Codes. 1-5 - Mahmoud Nazmy, Omar A. Nasr, Hossam Ali Hassan Fahmy:
A Novel Generic Low Latency Hybrid Architecture for Parallel Pipelined Radix-2k Feed Forward FFT. 1-5 - Fikre Tsigabu Gebreyohannes, Marie-Minerve Louërat, Hassan Aboushady:
Design of a 4th-Order Feed-Forward-Compensated Operational Amplifier for Multi-GHz Sampling Frequency Continuous-Time Bandpass Sigma-Delta Modulators. 1-5 - Nicholas Miscourides, Pantelis Georgiou:
Mismatch Compensation in ISFET Arrays using a Parasitic Programmable Gate. 1-5 - Yusuke Kimura, Amir Masoud Gharehbaghi, Masahiro Fujita:
Signal Selection Methods for Efficient Multi-Target Correction. 1-5 - Sheng Zhang, Wei Xing Zheng:
Subband Adaptive Filtering Algorithm Over Functional Link Neural Network. 1-4 - Andresso da Silva, I. S. Guarany, B. Arruda, Edmar Candeia Gurjão, R. S. Freire:
A Method for Anomaly Prediction in Power Consumption using Long Short-Term Memory and Negative Selection. 1-5 - Yerbol Akhmetov, Alex Pappachen James:
Probabilistic Neural Network with Memristive Crossbar Circuits. 1-5 - Shengwei Ke, Jianping Hu, Xiaoxiao Xu:
Independent-Gate P-Type TFETs using Double Heterojunction Structures. 1-5 - Rintaro Yanagi, Ren Togo, Takahiro Ogawa, Miki Haseyama:
Scene Retrieval from Multiple Resolution Generated Images Based on Text-to-Image GAN. 1-5 - Lini Zheng, Zhen Chen, Wuyang Su, Sen Li, Xi Chen, Xiangdong Liu, Zhen Li:
Event-Trigger Strategy Design and Its Comparative Study for Dynamic State Estimation in Power Systems. 1-5 - Nico Angeli, Oliver Bachmann, Klaus Hofmann:
A 2.5 GHz All-Digital Multiphase DLL and Phase Shifter in 65 nm CMOS using a Scalable Phase-to-Digital Converter. 1-5 - Jill C. Mayeda, Jerry Tsay, Donald Y. C. Lie, Jerry Lopez:
Effective AM-PM Cancellation with Body Bias for 5G CMOS Power Amplifier Design in 22nm FD-SOI. 1-4 - Suman Deb, Anupam Chattopadhyay:
Spintronic Device-Structure for Low-Energy XOR Logic using Domain Wall Motion. 1-5 - Hongjiang Yu, Zhiheng Ouyang, Wei-Ping Zhu, Benoît Champagne, Yunyun Ji:
A Deep Neural Network Based Kalman Filter for Time Domain Speech Enhancement. 1-5 - Dwaipayan Ray, Nithin V. George, Pramod Kumar Meher:
Analysis and Design of Approximate Inner-Product Architectures Based on Distributed Arithmetic. 1-5 - Kazuya Takano, Keiko Kirihara, Kenichi Kawaguchi, Tomonori Usui:
Highway Facilities on the Joban Expressway to Contribute to the Reconstruction of the Tohoku Region. 1-5 - Suwen Song, Jing Tian, Jun Lin, Zhongfeng Wang:
A Novel Low-Complexity Joint Coding and Decoding Algorithm for NB-LDPC Codes. 1-5 - Ting Guo, Bo Chen, Kai Tang, Liheng Lou, Zhongyuan Fang, Bo Yu, Shaoqiang Zhang, Yuanjin Zheng:
A Two-Stage Push-Pull Power Amplifier with Electro-Thermal Effects Study in 130 nm SOI CMOS for IEEE 802.11ac Applications. 1-4 - Takahiro Hosaka, Trong-Thuc Hoang, Van-Phuc Hoang, Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham:
Live Demonstration: Real-Time Auto-Exposure Histogram Equalization Video-System using Frequent Items Counter. 1 - Walter D. Leon-Salas, Xiaozhe Fan, Seungjin Lee:
Live Demonstration: A Wireless Sensor using a Solar Cell Optical Transceiver. 1 - Takashi Ohira, Satoshi Tsukamoto, Naoki Sakai, Shinji Abe, Masayoshi Sugino, Nobukazu Sakura, Kunihiko Sasaki:
Live Demonstration: An HF Capacitive Wireless Power Transfer to a Quad-Rotor Drone. 1 - Ramiro Taco, Itamar Levi, Marco Lanuzza, Alexander Fish:
Live Demo: An 88fJ / 40 MHz [0.4V] - 0.61pJ / 1GHz [0.9V] Dual Mode Logic 8×8-Bit Multiplier Accumulator with a Self-Adjustment Mechanism in 28 nm FD-SOI. 1 - Tomoya Arakawa, Joshin Sone, Mitsuji Okada, Mototsugu Hamada, Tadahiro Kuroda:
Live Demonstration: A Non-Contact Transmission Line Connector for USB3.1 HD-Video Streaming. 1 - Sheng Ma, Libo Huang, Yuanwu Lei, Yang Guo, Zhiying Wang:
An Efficient Direct Memory Access (DMA) Controller for Scientific Computing Accelerators. 1-5 - Nattapong Hatchavanich, Anawach Sangswang, Mongkol Konghirun:
Effects of Intermediate Coil Position in a Triple-Coil Series-Series Compensation in Wireless Power Transfer. 1-5 - Yecheng Lyu, Lin Bai, Xinming Huang:
Road Segmentation using CNN and Distributed LSTM. 1-5 - Dameng Yu, Hui Xiong, Qing Xu, Jianqiang Wang, Keqiang Li:
Continuous Pedestrian Orientation Estimation using Human Keypoints. 1-5 - Prateek Kumar Sharma, Nagarjuna Nallam:
Linearity and NF Tradeoff in Input-Matched N-Path Mixer-First Receivers with Shunt-Feedback TIAs. 1-4 - Xiaowen Bi, Wallace K. S. Tang, Zeyu Han, Jianfeng Zhou:
Distributing Electric Vehicles to the Right Charging Queues. 1-5 - Mahdi Rajabzadeh, Jonathan Ungethuem, Holger Mandry, Carolin Schilpp, Oliver Wittekindt, Maurits Ortmanns:
An Evaluation Study of Various Excitation Signals for Electrical Impedance Spectroscopy. 1-5 - Erus Rustami, Kiyotaka Sasagawa, Yasumi Ohta, Makito Haruta, Toshihiko Noda, Takashi Tokuda, Jun Ohta:
A Thin Composite Emission Filter and Fiber Coupled Laser Excitation for Implantable Fluorescence Imager Application. 1-4 - Longjie Li, Saman S. Abeysekera:
Motion Artefact Removal using Single Beat Classification of Photoplethysmographic Signals. 1-4 - Fabio Pareschi, Raul Blecic, Mauro Mangia, Adrijan Baric, Riccardo Rovatti, Gianluca Setti:
Tuning a Resonant DC/DC Converter on the Second Harmonic for Improving Performance: A Case Study. 1-5 - Federico Bizzarri, Angelo Brambilla, Abdelali El Aroudi:
Nonlinear Analysis of a DC-DC Boost Converter Working as a Maximum Power Point Tracker using Analog-Mixed-Signal Circuit Simulation. 1-5 - Nicola Lupo, Francesco Ravelli, Michele Bartolini, Paolo Pulici, Maurizio Nessi, Franco Maloberti, Edoardo Bonizzoni:
Study of DAC Architectures for Integrated Laser Driver Systems. 1-5 - Josep Maria Margarit-Taulé, Pablo Giménez-Gómez, Roger Escudé-Pujol, Manuel Gutiérrez-Capitán, Cecilia Jiménez-Jorquera, Shih-Chii Liu:
Live Demonstration: A Portable Microsensor Fusion System with Real-Time Measurement for On-Site Beverage Tasting. 1 - Pengfei Xu, Yue Wang, Yang Zhao, Yingyan Lin:
Live Demonstration: Bringing Powerful Deep Learning into Daily-Life Devices (Mobiles and FPGAs) Via Deep k-Means. 1 - Daniel Gutierrez-Galan, Juan Pedro Dominguez-Morales, Fernando Perez-Peña, Angel Jiménez-Fernandez, Alejandro Linares-Barranco:
Live Demonstration: Neuromorphic Robotics, from Audio to Locomotion Through Spiking CPG on SpiNNaker. 1 - Ava Hedayatipour, Kendra Anderson, Nicole McFarlane:
Live Demonstration: A Temperature Sensor with Analog Encryption. 1 - Yue Gao, Boxiao Liu, Hui Li, Yongfu Li, Guoxing Wang, Yong Lian, Chun-Huat Heng:
Live Demonstration: A Pulmonary Conditions Monitor Based on Electrical Impedance Tomography Measurement. 1 - Khushal Sethi, Manan Suri:
Optimized Implementation of Neuromorphic HATS Algorithm on FPGA. 1-5 - Mafalda Benido, Taimur Gibran Rabuske, Jorge R. Fernandes:
Injection Locked Oscillators with Current Reuse. 1-4 - Motoki Ishizaki, Atsushi Kurokawa:
Power Transfer System Combining Wireless Resonators and Wired Three-Coil Repeater. 1-4 - Tran Thi Thao Nguyen, Yuhei Nagao, Nico Surantha, Masayuki Kurosaki, Hiroshi Ochi:
Live Demonstration: Accurate Time Synchronization for Industrial Wireless LAN Systems. 1