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ORCIDISPD 2023: Virtual Event, USA
- David G. Chinnery, Iris Hui-Ru Jiang:
Proceedings of the 2023 International Symposium on Physical Design, ISPD 2023, Virtual Event, USA, March 26-29, 2023. ACM 2023, ISBN 978-1-4503-9978-4
Session 1: Opening Session and Keynote I
- Alberto L. Sangiovanni-Vincentelli
, Zheng Liang, Zhe Zhou, Jiaxi Zhang:
Automated Design of Chiplets. 1-8
Session 2: Routing
- Fangzhou Wang, Jinwei Liu, Evangeline F. Y. Young:
FastPass: Fast Pin Access Analysis with Incremental SAT Solving. 9-16 - Yun-Jhe Jiang, Shao-Yun Fang:
Pin Access-Oriented Concurrent Detailed Routing. 17-25 - Hao Chen, Kai-Chieh Hsu, Walker J. Turner, Po-Hsuan Wei, Keren Zhu, David Z. Pan, Haoxing Ren:
Reinforcement Learning Guided Detailed Routing for Custom Circuits. 26-34 - Jai-Ming Lin, Yu-Tien Chen, Yang-Tai Kung, Hao-Jia Lin:
Voltage-Drop Optimization Through Insertion of Extra Stripes to a Power Delivery Network. 35-43 - Chia-Tung Ho, Alvin Ho, Matthew Fojtik, Minsoo Kim, Shang Wei, Yaguang Li, Brucek Khailany, Haoxing Ren:
NVCell 2: Routability-Driven Standard Cell Layout in Advanced Nodes with Lattice Graph Routability Model. 44-52
Session 3: 3D ICs, Heterogeneous Integration, and Packaging I
- Meng Lian, Yushen Zhang, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann:
FXT-Route: Efficient High-Performance PCB Routing with Crosstalk Reduction Using Spiral Delay Lines. 53-61 - Sai Pentapati, Anthony Agnesina, Moritz Brunion, Yen-Hsiang Huang, Sung Kyu Lim:
On Legalization of Die Bonding Bumps and Pads for 3D ICs. 62-70 - Hung-Ming Chen, Chu-Wen Ho, Shih-Hsien Wu, Wei Lu, Po-Tsang Huang, Hao-Ju Chang, Chien-Nan Jimmy Liu:
Reshaping System Design in 3D Integration: Perspectives and Challenges. 71-77
Session 4: 3D ICs, Heterogeneous Integration, and Packaging II
- Erica Douglas, Julia Deitz, Timothy Ruggles, Daniel Perry, Damion Cummings, Mark Rodriguez, Nichole Valdez, Brad Boyce:
Co-design for Heterogeneous Integration: A Failure Analysis Perspective. 78-79 - Taylor Hogan:
Goal Driven PCB Synthesis Using Machine Learning and CloudScale Compute. 80 - Victor Moroz:
Gate-All-Around Technology is Coming.: What's Next After GAA? 81
Session 5: Analog Design
- Dan Fritchman:
VLSIR - A Modular Framework for Programming Analog & Custom Circuits & Layouts. 82-83 - Ahmet Faruk Budak, Keren Zhu, Hao Chen, Souradip Poddar, Linran Zhao, Yaoyao Jia, David Z. Pan:
Joint Optimization of Sizing and Layout for AMS Designs: Challenges and Opportunities. 84-92 - Helmut Graeb, Markus Leibl:
Learning from the Implicit Functional Hierarchy in an Analog Netlist. 93-100 - Sachin S. Sapatnekar:
The ALIGN Automated Analog Layout Engine: Progress, Learnings, and Open Issues. 101-102 - Soner Yaldiz:
Analog Layout Automation On Advanced Process Technologies. 103
Session 6: Keynote II
- Burn J. Lin:
Immersion and EUV Lithography: Two Pillars to Sustain Single-Digit Nanometer Nodes. 104
Session 7: DFM, Reliability, and Electromigration
- Shao-Yun Fang:
Advanced Design Methodologies for Directed Self-Assembly. 105 - Olalla Varela Pedreira, Houman Zahedmanesh, Youqi Ding, Ivan Ciofi, Kristof Croes:
Challenges for Interconnect Reliability: From Element to System Level. 106 - Susann Rothe, Jens Lienig:
Combined Modeling of Electromigration, Thermal and Stress Migration in AC Interconnect Lines. 107-114 - Nestor E. Evmorfopoulos, Mohammad Abdullah Al Shohel, Olympia Axelou, Pavlos Stoikos, Vidya A. Chhabria, Sachin S. Sapatnekar:
Recent Progress in the Analysis of Electromigration and Stress Migration in Large Multisegment Interconnects. 115-123 - Armen Kteyan, Valeriy Sukharev, Alexander Volkov, Jun-Ho Choy, Farid N. Najm, Yong Hyeon Yi, Chris H. Kim, Stéphane Moreau:
Electromigration Assessment in Power Grids with Account of Redundancy and Non-Uniform Temperature Distribution. 124-132
Session 8: Placement
- Pengwen Chen, Chung-Kuan Cheng, Albert Chern, Chester Holtz, Aoxi Li, Yucheng Wang:
Placement Initialization via Sequential Subspace Optimization with Sphere Constraints. 133-140 - Yi-Chen Lu, Haoxing Ren, Hao-Hsiang Hsiao, Sung Kyu Lim:
DREAM-GAN: Advancing DREAMPlace towards Commercial-Quality using Generative Adversarial Learning. 141-148 - Anthony Agnesina, Puranjay Rajvanshi, Tian Yang, Geraldo Pradipta, Austin Jiao, Ben Keller, Brucek Khailany, Haoxing Ren:
AutoDMP: Automated DREAMPlace-based Macro Placement. 149-157 - Chung-Kuan Cheng, Andrew B. Kahng, Sayak Kundu, Yucheng Wang, Zhiang Wang:
Assessment of Reinforcement Learning for Macro Placement. 158-166
Session 9: New Computing Techniques and Accelerators
- Evangeline F. Y. Young:
GPU Acceleration in Physical Synthesis. 167 - Zhiyao Xie:
Efficient Runtime Power Modeling with On-Chip Power Meters. 168-174 - Rachel Selina Rajarathnam, Zixuan Jiang, Mahesh A. Iyer, David Z. Pan:
DREAMPlaceFPGA-PL: An Open-Source GPU-Accelerated Packer-Legalizer for Heterogeneous FPGAs. 175-184
Session 10: Lifetime Achievement Commemoration for Professor Malgorzata Marek-Sadowska
- Aida Todri-Sanial:
Building Oscillatory Neural Networks: AI Applications and Physical Design Challenges. 185-186 - Chih-Tsun Huang, Juin-Ming Lu, Yao-Hua Chen, Ming-Chih Tung, Shih-Chieh Chang:
Optimization of AI SoC with Compiler-assisted Virtual Design Platform. 187-193 - Xiang Qiu:
Challenges and Opportunities for Computing-in-Memory Chips. 194 - Malgorzata Marek-Sadowska:
ISPD 2023 Lifetime Achievement Award Bio. 265
Session 11: Keynote III
- Anima Anandkumar:
Neural Operators for Solving PDEs and Inverse Design. 195
Session 12: Quantum Computing
- Leon Stok:
Quantum Challenges for EDA. 196 - Anne Y. Matsuura:
Developing Quantum Workloads for Workload-Driven Co-design. 197 - Robert Wille, Lukas Burgholzer:
MQT QMAP: Efficient Quantum Circuit Mapping. 198-204
Session 13: Panel on EDA for Domain Specific Computing
- Iris Hui-Ru Jiang, David G. Chinnery:
EDA for Domain Specific Computing: An Introduction for the Panel. 205 - Desmond A. Kirkpatrick:
Software-driven Design for Domain-specific Compute. 206 - Tim Ansell:
Google Investment in Open Source Custom Hardware Development Including No-Cost Shuttle Program. 207 - Zhiru Zhang, Matthew Hofmann, Andrew Butt:
A Case for Open EDA Verticals. 208-209 - Alireza Kaviani:
Addressing the EDA Roadblocks for Domain-specific Compilers: An Industry Perspective. 210 - Hanchen Ye, HyeGang Jun, Jin Yang, Deming Chen:
High-level Synthesis for Domain Specific Computing. 211-219
Session 14: Hardware Security and Bug Fixing
- Jhih-Wei Hsu, Kuan-Cheng Chen, Yan-Syuan Chen, Yu-Hsiang Lo, Yao-Wen Chang:
Security-aware Physical Design against Trojan Insertion, Frontside Probing, and Fault Injection Attacks. 220-228 - Fangzhou Wang, Qijing Wang, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Lilas Alrahis, Ozgur Sinanoglu, Johann Knechtel, Tsung-Yi Ho, Evangeline F. Y. Young:
Security Closure of IC Layouts Against Hardware Trojans. 229-237 - Saideep Sreekumar, Mohammed Ashraf, Mohammed Thari Nabeel, Ozgur Sinanoglu, Johann Knechtel:
X-Volt: Joint Tuning of Driver Strengths and Supply Voltages Against Power Side-Channel Attacks. 238-246 - Jianjun Xu, Jiayu He, Jingyan Zhang, Deheng Yang, Jiang Wu, Xiaoguang Mao:
Validating the Redundancy Assumption for HDL from Code Clone's Perspective. 247-255
Session 15: ISPD 2023 Contest Results and Closing Remarks
- Mohammad Eslami, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri, Samuel Pagliarini:
Benchmarking Advanced Security Closure of Physical Layouts: ISPD 2023 Contest. 256-264
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